drm/amdgpu: correct reference clock value on navi10

remove the divisor 4

Signed-off-by: Tao Zhou <[email protected]>
Acked-by: Jack Xiao <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index ae3a407b16a3..a3692dba64ff 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -122,7 +122,7 @@ static u32 nv_get_config_memsize(struct amdgpu_device *adev)
 
 static u32 nv_get_xclk(struct amdgpu_device *adev)
 {
-	return adev->clock.spll.reference_freq / 4;
+	return adev->clock.spll.reference_freq;
 }