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2008-07-29sh: migrate to arch/sh/include/Paul Mundt14-584/+0
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-07-28sh: Add SuperH Mobile MSTPCR bits to clock frameworkMagnus Damm1-0/+3
Handle module stop clock bits in MSTPCRn through the clock framework. The clocks are named after the bits in the data sheet. The association between bit number and hardware block is processor specific. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-07-28sh: update sh7343 codeYoshihiro Shimoda1-0/+1
updated the following codes for SH7343: - add register_intc_controller() - add EARLY_SCIF_CONSOLE_PORT - add define of CPG register Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-07-28sh: Optimized flush_icache_range() implementation.Chris Smith1-1/+0
Add implementation of flush_icache_range() suitable for signal handler and kprobes. Remove flush_cache_sigtramp() and change signal.c to use flush_icache_range(). Signed-off-by: Chris Smith <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-04-18sh: Add support for SH7723 CPU subtype.Paul Mundt2-3/+8
This adds basic support for the SH7723 MobileR2 CPU. Signed-off-by: Paul Mundt <[email protected]>
2008-02-14sh: add support for sh7366 processorMagnus Damm1-1/+3
This patch adds sh7366 cpu supports. Just the most basic things like interrupt controller, clocks and serial port are included at this point. Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Add support for SH7763 CPU subtype.Yoshihiro Shimoda1-1/+2
Signed-off-by: Yoshihiro Shimoda <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Support denormalization on SH-4 FPU.Stuart Menefy1-0/+32
Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Clean up places that make 29-bit physical assumptions.Stuart Menefy1-1/+7
Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28rtc: rtc-sh: Split out the CPU defs to asm/cpu/.Paul Mundt1-0/+8
With all of the different CPU types this was getting a but unwieldly. Since sh64 is now integrated, we don't have to worry about multiple architectures caring about the header definitions. Split out the defs for each asm/cpu/ to make rtc-sh slightly less visually offensive. Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Invalidate the TLB after applying PMB mappings.Stuart Menefy1-0/+2
Signed-off-by: Stuart Menefy <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Split out cache status bits per-CPU family.Paul Mundt1-0/+5
Signed-off-by: Paul Mundt <[email protected]>
2008-01-28sh: Split out PXSEG segmentation per-CPU family.Paul Mundt1-0/+6
The CPU family abstraction already exists, so move out the PXSEG definition for each one. SH-2A already has this special cased, and SH-5 will as well. Signed-off-by: Paul Mundt <[email protected]>
2007-10-08sh: Fix SH-4 DMAC CHCR masking.Adrian McMenamin1-1/+1
This patch fixes the DMA cascade by masking the correct bits. Tested and working with Dreamcast PVR2 DMA. With this patch applied the existing mainline code in arch/sh/drivers/dma/dma-sh.c works, whereas before I was patching that to get round this problem. Signed-off-by: Adrian McMenamin <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-09-21sh: Fix up extended mode TLB for SH-X2+ cores.Paul Mundt1-3/+11
The extended mode TLB requires both 64-bit PTEs and a 64-bit pgprot, correspondingly, the PGD also has to be 64-bits, so fix that up. The kernel and user permission bits really are decoupled in early cuts of the silicon, which means that we also have to set corresponding kernel permissions on user pages or we end up with user pages that the kernel simply can't touch (!). Finally, with those things corrected, really enable MMUCR.ME and correct the PTEA value (this simply needs to be the upper 32-bits of the PTE, with the size and protection bit encoding). Signed-off-by: Paul Mundt <[email protected]>
2007-07-25sh: remove support for sh73180 and solution engine 73180Magnus Damm1-1/+1
This patch removes old dead code: - kill off sh73180 cpu support - get rid of broken solution engine 73180 board support Signed-off-by: Magnus Damm <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-06-20sh: Preliminary support for the SH-X3 CPU.Paul Mundt2-24/+35
This adds basic support for UP SH-X3. Signed-off-by: Paul Mundt <[email protected]>
2007-05-31sh: trivial build cleanups.Evgeniy Polyakov1-0/+3
Several errors were spotted during building for custom config (SMP included). Although SMP still does not compile (no ipi and __smp_call_function) and does not work, this looks a bit cleaner. Some other errors obtained via gcc-4.1.0 build. Signed-off-by: Evgeniy Polyakov <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-05-09sh: dma: use __maybe_unusedDavid Rientjes2-2/+2
There is no such thing as labeling a variable as __attribute__((used)). Since ts_shift is not referenced in inline assembly, we assume that we're simply suppressing a warning here if the variable is declared but unreferenced. Cc: Paul Mundt <[email protected]> Signed-off-by: David Rientjes <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2007-05-07sh: SH7722 clock framework support.dmitry pervushin1-0/+4
This adds support for the SH7722 (MobileR) to the clock framework. Signed-off-by: dmitry pervushin <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-05-07sh: Add SH7785 Highlander board support (R7785RP).Paul Mundt1-0/+4
This adds preliminary support for the SH7785-based Highlander board. Some of the Highlander support code is reordered so that most of it can be reused directly. This also plugs in missing SH7785 checks in the places that need it, as this is the first board to support the CPU. Signed-off-by: Paul Mundt <[email protected]>
2007-03-05sh: Revert lazy dcache writeback changes.Paul Mundt1-0/+2
These ended up causing too many problems on older parts, revert for now.. Signed-off-by: Paul Mundt <[email protected]>
2007-02-13sh: Missing flush_dcache_all() proto in cacheflush.h.Paul Mundt1-0/+1
Some boards need this, so provide a definition. Signed-off-by: Paul Mundt <[email protected]>
2007-02-13sh: SH-DMAC compile fixesManuel Lauss1-0/+11
This patch does the following: - remove the make_ipr_irq stuff from dma-sh.c and replace it with a simple channel<->irq mapping table. - add DMTEx_IRQ constants for sh4 cpus - fix sh7751 DMAE irq number The SH7780 uses the same IRQs for DMA as other SH4 types, so I put the constants on top of the dma.h file. Other CPU types need to #define their own DMTEx_IRQ contants in their appropriate header. Signed-off-by: Manuel Lauss <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2007-02-13sh: Lazy dcache writeback optimizations.Paul Mundt1-12/+0
This converts the lazy dcache handling to the model described in Documentation/cachetlb.txt and drops the ptep_get_and_clear() hacks used for the aliasing dcaches on SH-4 and SH7705 in 32kB mode. As a bonus, this slightly cuts down on the cache flushing frequency. With that and the PTEA handling out of the way, the update_mmu_cache() implementations can be consolidated, and we no longer have to worry about which configuration the cache is in for the SH7705 case. And finally, explicitly disable the lazy writeback on SMP (SH-4A). Signed-off-by: Paul Mundt <[email protected]>
2006-12-13[PATCH] Optimize D-cache alias handling on forkRalf Baechle1-0/+1
Virtually index, physically tagged cache architectures can get away without cache flushing when forking. This patch adds a new cache flushing function flush_cache_dup_mm(struct mm_struct *) which for the moment I've implemented to do the same thing on all architectures except on MIPS where it's a no-op. Signed-off-by: Ralf Baechle <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2006-12-12sh: SH-MobileR SH7722 CPU support.Paul Mundt2-2/+2
This adds CPU support for the SH7722. Signed-off-by: Paul Mundt <[email protected]>
2006-10-12sh: SH-4A UBC supportRyusuke Sakato1-0/+37
A simple patch to enable the UBC on SH-4A. Signed-off-by: Ryusuke Sakato <[email protected]> Signed-off-by: Paul Mundt <[email protected]>
2006-10-03sh: Kill off more dead headers.Paul Mundt1-25/+0
Some old rtc and io headers were left hanging around, kill them off.. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: Calculate shm alignment at runtime.Paul Mundt1-3/+0
Set the SHM alignment at runtime, based off of probed cache desc. Optimize get_unmapped_area() to only colour align shared mappings. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: Add support for R7780RP and R7780MP boards.Paul Mundt3-3/+50
This adds support for the Renesas SH7780 development boards, R7780RP and R7780MP. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: Store Queue API rework.Paul Mundt1-18/+5
Rewrite the store queue API for a per-cpu interface in the driver model. The old miscdevice is dropped, due to TASK_SIZE limitations, and no one was using it anyways. Carve up and allocate store queue space with a bitmap, back sq mapping objects with a slab cache, and let userspace worry about its own prefetching. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: Fixup SHMLBA definition for SH7705.Paul Mundt1-19/+0
We need this set to something sensible anywhere were we have an aliasing dcache.. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: page table alloc cleanups and page fault optimizations.Paul Mundt1-17/+12
Cleanup of page table allocators, using generic folded PMD and PUD helpers. TLB flushing operations are moved to a more sensible spot. The page fault handler is also optimized slightly, we no longer waste cycles on IRQ disabling for flushing of the page from the ITLB, since we're already under CLI protection by the initial exception handler. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: Fix fatal oops in copy_user_page() on sh4a (SH7780).Paul Mundt1-4/+0
We had a pretty interesting oops happening, where copy_user_page() was down()'ing p3map_sem[] with a bogus offset (particularly, an offset that hadn't been initialized with sema_init(), due to the mismatch between cpu_data->dcache.n_aliases and what was assumed based off of the old CACHE_ALIAS value). Luckily, spinlock debugging caught this for us, and so we drop the old hardcoded CACHE_ALIAS for sh4 completely and rely on the run-time probed cpu_data->dcache.alias_mask. This in turn gets the p3map_sem[] index right, and everything works again. While we're at it, also convert to 4-level page tables.. Signed-off-by: Paul Mundt <[email protected]>
2006-09-27sh: Support for SH7770/SH7780 CPU subtypes.Paul Mundt1-0/+2
Merge support for SH7770 and SH7780 SH-4A subtypes. Signed-off-by: Paul Mundt <[email protected]>
2006-02-01[PATCH] sh: Move TRA/EXPEVT/INTEVT definitions for reusePaul Mundt1-0/+8
Currently entry.S is home to these definitions, so we move them somewhere more sensible. IPR IRQ handling depends on being to read from INTEVT. Signed-off-by: Paul Mundt <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2006-01-16[PATCH] sh: Simplistic clock frameworkPaul Mundt1-0/+2
This adds a relatively simplistic clock framework for sh. The initial goal behind this is to clean up the arch/sh/kernel/time.c mess and to get the CPU subtype-specific frequency setting and calculation code moved somewhere more sensible. This only deals with the core clocks at the moment, though it's trivial for other drivers to define their own clocks as desired. Signed-off-by: Paul Mundt <[email protected]> Cc: john stultz <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2006-01-16[PATCH] sh: DMA updatesPaul Mundt1-10/+42
This extends the current SH DMA API somewhat to support a proper virtual channel abstraction, and also works to represent this through the driver model by giving each DMAC its own platform device. There's also a few other minor changes to support a few new CPU subtypes, and make TEI generation for the SH DMAC configurable. Signed-off-by: Paul Mundt <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2005-04-16Linux-2.6.12-rc2Linus Torvalds13-0/+422
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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