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2022-08-22clk: clocking-wizard: Move clocking-wizard outShubhrajyoti Datta5-689/+0
Add clocking wizard driver to clk. And delete the driver from the staging as it is in drivers/clk. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Acked-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2021-08-17clk: staging: correct reference to config IOMEM to config HAS_IOMEMLukas Bulwahn1-1/+1
Commit 0a0a66c984b3 ("clk: staging: Specify IOMEM dependency for Xilinx Clocking Wizard driver") introduces a dependency on the non-existing config IOMEM, which basically makes it impossible to include this driver into any build. Fortunately, ./scripts/checkkconfigsymbols.py warns: IOMEM Referencing files: drivers/staging/clocking-wizard/Kconfig The config for IOMEM support is called HAS_IOMEM. Correct this reference to the intended config. Fixes: 0a0a66c984b3 ("clk: staging: Specify IOMEM dependency for Xilinx Clocking Wizard driver") Signed-off-by: Lukas Bulwahn <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Remove the hardcoding of the clock outputsShubhrajyoti Datta1-8/+7
The number of output clocks are configurable in the hardware. Currently the driver registers the maximum number of outputs. Fix the same by registering only the outputs that are there. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Add support for fractional supportShubhrajyoti Datta1-16/+137
Currently the set rate granularity is to integral divisors. Add support for the fractional divisors. Only the first output0 is fractional in the hardware. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Add support for dynamic reconfigurationShubhrajyoti Datta1-5/+173
The patch adds support for dynamic reconfiguration of clock output rate. Output clocks are registered as dividers and set rate callback function is used for dynamic reconfiguration. Signed-off-by: Shubhrajyoti Datta <[email protected]> Co-developed-by: Chirag Parekh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Allow changing of parent rate for single outputShubhrajyoti Datta1-0/+9
If there is only one output then allow changing of the parent rate. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Update the fixed factor divisorsShubhrajyoti Datta1-5/+8
Update the fixed factor clock registration to register the divisors. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Rename speed-grade to xlnx,speed-gradeShubhrajyoti Datta1-1/+1
Rename speed-grade to xlnx,speed-grade Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-03-10staging: clocking-wizard: Fix kernel-doc warningShubhrajyoti Datta1-1/+2
Fix the clocking wizard main structure kernel documentation. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2021-02-11staging: Replace lkml.org links with loreKees Cook1-1/+2
As started by commit 05a5f51ca566 ("Documentation: Replace lkml.org links with lore"), replace lkml.org links with lore to better use a single source that's more likely to stay available long-term. Signed-off-by: Kees Cook <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-07-20staging: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2020-07-01clk: staging: Specify IOMEM dependency for Xilinx Clocking Wizard driverDavid Gow1-1/+1
The Xilinx Clocking Wizard driver uses the devm_ioremap_resource function, but does not specify a dependency on IOMEM in Kconfig. This causes a build failure on architectures without IOMEM, for example, UML (notably with make allyesconfig). Fix this by making CONFIG_COMMON_CLK_XLNX_CLKWZRD depend on CONFIG_IOMEM. Signed-off-by: David Gow <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-10-10staging: clocking-wizard: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-3/+1
Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Signed-off-by: YueHaibing <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-04-03staging: add missing SPDX lines to Makefile filesGreg Kroah-Hartman1-0/+1
There are a few remaining drivers/staging/*/Makefile files that do not have SPDX identifiers in them. Add the correct GPL-2.0 identifier to them to make scanning tools happy. Reviewed-by: Mukesh Ojha <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-04-03staging: add missing SPDX lines to Kconfig filesGreg Kroah-Hartman1-0/+1
There are a few remaining drivers/staging/*/Kconfig files that do not have SPDX identifiers in them. Add the correct GPL-2.0 identifier to them to make scanning tools happy. Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-10-09staging: clocking-wizard: match parenthesis indentationIoannis Valasakis1-10/+10
Match parenthesis indentation after line end, and fixed alignment to conform to the coding style guidelines. Reported by checkpatch. Signed-off-by: Ioannis Valasakis <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-06-17staging: clocking-wizard: prefer 'help' in KconfigKyle Buzby1-1/+1
Fixes the checkpatch warning: WARNING: prefer 'help' over '---help---' for new help texts +config COMMON_CLK_XLNX_CLKWZRD Signed-off-by: Kyle Buzby <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-01-15staging: clocking-wizard: remove redundant license textGreg Kroah-Hartman1-12/+0
Now that the SPDX tag is in the clocking-wizard driver files, that identifies the license in a specific and legally-defined manner. So the extra GPL text wording can be removed as it is no longer needed at all. This is done on a quest to remove the 700+ different ways that files in the kernel describe the GPL license text. And there's unneeded stuff like the address (sometimes incorrect) for the FSF which is never needed. No copyright headers or other non-license-description text was removed. Signed-off-by: Greg Kroah-Hartman <[email protected]>
2018-01-15staging: clocking-wizard: add SPDX identifier.Greg Kroah-Hartman1-0/+1
It's good to have SPDX identifiers in all files to make it easier to audit the kernel tree for correct licenses. Fix up the staging clocking-wizard driver to have a proper SPDX identifier, based on the license text in the file itself. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This work is based on a script and data from Thomas Gleixner, Philippe Ombredanne, and Kate Stewart. Cc: Thomas Gleixner <[email protected]> Cc: Kate Stewart <[email protected]> Cc: Philippe Ombredanne <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2016-10-25staging: clocking-wizard: Fix incorrect type of speed gradeXavier Roumegue1-1/+1
The speed grade type is unsigned according to the dt-bindings. Fix sparse issue (-Wtypesign): CHECK drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:162:56: warning: incorrect type in argument 3 (different signedness) drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:162:56: expected unsigned int [usertype] *out_value drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:162:56: got int *<noident> Signed-off-by: Xavier Roumegue <[email protected]> Acked-by: Sören Brinkmann <[email protected]> Acked-by: Moritz Fischer <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2016-02-07Staging: clocking-wizard: CHECK:Please use a blank lineSirnamSwetha1-0/+1
This patch fixes the checkpatch.pl issue: CHECK: Please use a blank line after function/struct/union/enum declarations Signed-off-by: SirnamSwetha <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2016-02-07Staging: clocking-wizard: Avoid CamelCaseSirnamSwetha1-4/+4
This patch fixes the checkpatch.pl issue: CHECK: Avoid CamelCase: <WZRD_CLkOUT0_FRAC_EN> CHECK: Avoid CamelCase: <WZRD_CLkFBOUT_FRAC_EN> Signed-off-by: SirnamSwetha <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-07-20staging: clocking-wizard: Include clk.hStephen Boyd1-0/+1
This clock provider uses the consumer API, so include clk.h explicitly. Acked-by: Sören Brinkmann <[email protected]> Acked-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
2015-01-17staging: clocking-wizard: Handle invalid clk in notifierSoren Brinkmann1-1/+3
Even though it should never happen, handle the case that the clock notifier is called with an unexpected clock handle. This avoids the compiler warning: drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c: In function 'clk_wzrd_clk_notifier': >> drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c:99:6: warning: 'max' may be used uninitialized in this function [-Wmaybe-uninitialized] if (ndata->new_rate > max) ^ Reported-by: kbuild test robot <[email protected]> Signed-off-by: Soren Brinkmann <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2015-01-17Clocking-wizard: Fixed missing blank line warningAthira Lekshmi1-0/+1
Added a new line after declaration to remove the warning 'Missing a blank line after declarations' Signed-off-by: Athira Lekshmi <[email protected]> Acked-by: Soren Brinkmann <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2014-12-02Drivers:staging:clocking-wizard: Added a newlineAthira Sharikkal1-0/+1
Fixed checkpatch warning: Missing a newline after declarations Signed-off-by: Athira Sharikkal <[email protected]> Acked-by: Soren Brinkmann <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2014-12-02staging: clocking-wizard: check for a valid clk_name pointerDevendra Naga1-0/+5
The clk_name gets the return value from kasprintf (part of which does the allocation of the returned buffer). So check the return pointer before using it for clk_register_fixed_factor. Signed-off-by: Devendra Naga <[email protected]> Reviewed-by: Soren Brinkmann <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2014-10-29staging: clocking-wizard: Contain macro argument in parenthesisSoren Brinkmann1-1/+1
A macro doing some arithmetic to calculate a register offset, did not contain an argument to the macro in parentheses, potentially leading to unexpected results when using that macro with arithmetic expressions as argument. Signed-off-by: Soren Brinkmann <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2014-10-20staging: Add Xilinx Clocking Wizard driverSoren Brinkmann5-0/+387
Add a driver for the Xilinx Clocking Wizard soft IP. The clocking wizard provides an AXI interface to dynamically reconfigure the clocking resources of Xilinx FPGAs. Signed-off-by: Soren Brinkmann <[email protected]> Acked-by: Laurent Pinchart <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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