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2024-10-21platform/x86:intel/pmc: Revert "Enable the ACPI PM Timer to be turned off ↵Marek Maslanka1-2/+0
when suspended" Commit e86c8186d03a ("platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspended") can cause the suspend process to hang as the pmcdev->lock in the pmc_core_acpi_pm_timer_suspend_resume might already be held by the pmc_core_mphy_pg_show or pmc_core_pll_show if the userspace gets frozen when these functions are being executed. Also, pmc_core_acpi_pm_timer_suspend_resume must not sleep, as this function is called indirectly by the tick_freeze function in kernel/time/tick-common.c, which holds the spinlock. Revert the changes for now to fix these issues. Fixes: e86c8186d03a ("platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspended") Reported-by: Luca Coelho <[email protected]> Closes: https://lore.kernel.org/lkml/[email protected]/ Signed-off-by: Marek Maslanka <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2024-09-06platform/x86:intel/pmc: Enable the ACPI PM Timer to be turned off when suspendedMarek Maslanka1-0/+2
Allow to disable ACPI PM Timer on suspend and enable on resume. A disabled timer helps optimise power consumption when the system is suspended. On resume the timer is only reactivated if it was activated prior to suspend, so unless the ACPI PM timer is enabled in the BIOS, this won't change anything. The ACPI PM timer is used by Intel's iTCO/wdat_wdt watchdog to drive the watchdog, so it doesn't need to run during suspend. Signed-off-by: Marek Maslanka <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Daniel Lezcano <[email protected]>
2024-01-02Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-nextHans de Goede1-6/+3
Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next so that the "Intel PMC GBE LTR regression" fixes can also be applied to the new Arrow Lake and Lunar Lake platform support code in pdx86/for-next .
2023-12-29platform/x86/intel/pmc: Move GBE LTR ignore to suspend callbackDavid E. Box1-6/+3
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") caused a network performance regression due to the GBE LTR ignore that it added at probe. This was needed in order to allow the SoC to enter the deepest Package C state. To fix the regression and at least support PC10 during suspend, move the LTR ignore from probe to the suspend callback, and enable it again on resume. This solution will allow PC10 during suspend but restrict Package C entry at runtime to no deeper than PC8/9 while a network cable it attach to the PCH LAN. Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
2023-12-29platform/x86/intel/pmc: Allow reenabling LTRsDavid E. Box1-1/+1
Commit 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") caused a network performance regression due to the GBE LTR ignore that it added during probe. The fix will move the ignore to occur at suspend-time (so as to not affect suspend power). This will require the ability to enable the LTR again on resume. Modify pmc_core_send_ltr_ignore() to allow enabling an LTR. Fixes: 804951203aa5 ("platform/x86:intel/pmc: Combine core_init() and core_configure()") Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Signed-off-by: Ilpo Järvinen <[email protected]>
2023-12-19platform/x86/intel/pmc: Add ssram_init flag in PMC discovery in Meteor LakeRajvi Jingar1-1/+6
If PMC discovery using pmc_core_ssram_init() was unsuccessful for the Meteor Lake platform, the legacy enumeration method is used. In this case pci device struct for the PMC SSRAM is not available and pmc_core_ssram_get_lpm_reqs() will not work. Add ssram_init flag to indicate if the PMC SSRAM initialization was successful or not. Call pmc_core_ssram_get_lpm_reqs() only if the ssram_init flag is set to true. Signed-off-by: Rajvi Jingar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-12-19platform/x86/intel/pmc: Move common code to core.cRajvi Jingar1-54/+6
Functions like mtl_set_device_d3() and mtl_punit_pmt_init() were added for Meteor Lake. To be able to use them in Arrow Lake and future platforms, move them to core.c. Also, to support different guids, add guid argument in pmc_core_punit_pmt_init() and to support different PCI function numbers, add func arg in pmc_core_ssram_init(). Signed-off-by: Rajvi Jingar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-12-19platform/x86/intel/pmc: Fix in mtl_punit_pmt_init()Rajvi Jingar1-1/+1
pci_get_domain_bus_and_slot() increases the reference count on the pci device that is used to register the endpoint. In case of failure in registration, decrease reference count using pci_dev_put(pcidev) before returning. Fixes: 6e7964855381 ("platform/x86/intel/pmc: Show Die C6 counter on Meteor Lake") Signed-off-by: Rajvi Jingar <[email protected]> Signed-off-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-12-04platform/x86/intel/pmc: Show Die C6 counter on Meteor LakeDavid E. Box1-0/+32
Expose the Die C6 counter on Meteor Lake. Signed-off-by: David E. Box <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-12-04platform/x86/intel/pmc: Read low power mode requirements for MTL-M and MTL-PXi Pardee1-7/+32
Add support to read the low power mode requirements for Meteor Lake M and Meteor Lake P. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: David E. Box <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-12-04platform/x86/intel/pmc/mtl: Use return value from pmc_core_ssram_init()David E. Box1-4/+8
Instead of checking for a NULL regbase, use the return value from pmc_core_ssram_init() to check if PMC discovery was successful. If not, use the legacy enumeration method (which only works for the primary PMC). Signed-off-by: David E. Box <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-12-04platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform initXi Pardee1-1/+3
In order to setup a table of low power mode requirements for Meteor Lake, pmc_core_get_low_power_modes() will need to be run from platform init code so that the enabled modes are known, allowing the use of the pmc_for_each_mode helper. Make the function global and call it from the platform init code. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: David E. Box <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Add Meteor Lake IOE-M PMC related mapsXi Pardee1-0/+145
Add device ID and register maps for the PMC in IO expansion die M in Meteor Lake. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Add Meteor Lake IOE-P PMC related mapsXi Pardee1-0/+322
Add device ID and register maps for the PMC in IO expansion die P in Meteor Lake. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Use SSRAM to discover pwrm base address of primary PMCXi Pardee1-6/+13
On older platforms, the base address for PMC was hardcoded in the driver. Newer platforms can now retrieve the base address from SSRAM. Use SSRAM to discover pwrm base address on Meteor Lake platform. If this method fails, it will fall back to the hardcoded value. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Discover PMC devicesDavid E. Box1-0/+7
On platforms with multiple PMCs, additional PMC devices are discovered in the SSRAM device associated with the primary PMC. Add support for discovering PMC devices from SSRAM. Use PMC devid to assign the corresponding register map. Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: David E. Box <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Add support to handle multiple PMCsXi Pardee1-2/+3
To support platforms with multiple PMCs, add a PMC device structure to support each PMC instance. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Combine core_init() and core_configure()Xi Pardee1-11/+15
Combine core_init() and core_configure() functions to have a cleaner setup for platforms. Signed-off-by: Xi Pardee <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-20platform/x86:intel/pmc: Update maps for Meteor Lake P/M platformsXi Pardee1-9/+439
Fix the IP name errors in the register maps used by the following debugfs attributes in the Meteor Lake SOC-M PMC. pfear_sts lpm_sts ltr_show Fixes: c5ad454a12c6 ("platform/x86: intel/pmc/core: Add Meteor Lake support to pmc core driver") Signed-off-by: Xi Pardee <[email protected]> Signed-off-by: Rajvi Jingar <[email protected]> Reviewed-by: Ilpo Järvinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2023-06-13platform/x86/intel/pmc/mtl: Put devices in D3 during resumeDavid E. Box1-7/+20
An earlier commit placed some driverless devices in D3 during boot so that they don't block package cstate entry on Meteor Lake. Also place these devices in D3 after resume from suspend. Fixes: 336ba968d3e3 ("platform/x86/intel/pmc/mtl: Put GNA/IPU/VPU devices in D3") Signed-off-by: David E. Box <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Ilpo Järvinen <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
2023-04-11platform/x86/intel/pmc/mtl: Put GNA/IPU/VPU devices in D3David E. Box1-0/+31
On Meteor Lake, the GNA, IPU, and VPU devices are booted in D0 power state and will block the SoC from going into the deepest Package C-state if a driver is not present. Put each device in D3hot if no driver is found. Signed-off-by: David E. Box <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Hans de Goede <[email protected]>
2022-11-21platform/x86: intel/pmc/core: Add Meteor Lake support to pmc core driverGayatri Kammela1-0/+52
Add Meteor Lake client and mobile support to pmc core driver. This patch adds legacy support. Cc: David E Box <[email protected]> Suggested-by: David E Box <[email protected]> Reviewed-by: "David E. Box" <[email protected]> Signed-off-by: Sukumar Ghorai <[email protected]> Signed-off-by: Gayatri Kammela <[email protected]> Signed-off-by: "David E. Box" <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Hans de Goede <[email protected]>
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