| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
In order to connect the USB 2.0 PHY to its controller, we also need to
set "u0_pdrstn_split_sw_usbpipe_plugen" [1]. Some downstream U-Boot
versions did that, but upstream firmware does not, and the kernel must
not rely on such behavior anyway. Failing to set this left the USB
gadget port invisible to connected hosts behind.
Link: https://doc-en.rvspace.org/JH7110/TRM/JH7110_TRM/sys_syscon.html#sys_syscon__section_b3l_fqs_wsb [1]
Fixes: 16d3a71c20cf ("phy: starfive: Add JH7110 USB 2.0 PHY driver")
Signed-off-by: Jan Kiszka <[email protected]>
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Conor Dooley <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
We actually want to calculate the alignment values first, then
use the alignment value to look up the data from reg_configs[].
Fixes: d3ab79553308 ("phy: starfive: Add mipi dphy tx support")
Reviewed-by: Shengyang Chen <[email protected]>
Signed-off-by: Changhuang Liang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
Add mipi dphy tx support for the StarFive JH7110 SoC.
It is a module which is used to receive data from DSI
driver and transfer data to DSI interface like mipi screen.
Signed-off-by: Shengyang Chen <[email protected]>
Reviewed-by: Changhuang Liang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
'regval' is unused since the original
commit f8aa660841bc ("phy: starfive: Add mipi dphy rx support").
Remove it.
Signed-off-by: Dr. David Alan Gilbert <[email protected]>
Reviewed-by: Changhuang Liang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
The various StarFive PHYs are only present on StarFive SoCs. Hence add
a dependency on ARCH_STARFIVE, to prevent asking the user about these
drivers when configuring a kernel without StarFive SoC support.
Signed-off-by: Geert Uytterhoeven <[email protected]>
Acked-by: Changhuang Liang <[email protected]>
Link: https://lore.kernel.org/r/12097f6107a18e2f7cfb80f47ac7b27808e062c4.1690300076.git.geert+renesas@glider.be
Signed-off-by: Vinod Koul <[email protected]>
|
|
the startfive phy drivers use devm_platform_ioremap_resource() which on
some archs (s390) is not present. So make the drivers depend on HAS_IOMEM
Fixes: f8aa660841bc ("phy: starfive: Add mipi dphy rx support")
Reported-by: kernel test robot <[email protected]>
Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
Reviewed-by: Changhuang Liang <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
Add mipi dphy rx support for the StarFive JH7110 SoC. It is used to
transfer CSI camera data.
Signed-off-by: Changhuang Liang <[email protected]>
Reviewed-by: Minda Chen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
This is using the wrong pointer, "phy->regs" vs "phy->phy".
Fixes: fd097f48eea9 ("phy: starfive: Add JH7110 PCIE 2.0 PHY driver")
Signed-off-by: Dan Carpenter <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
Add Starfive JH7110 SoC PCIe 2.0 PHY driver support.
PCIe 2.0 PHY default connect to PCIe controller.
PCIe PHY can connect to USB 3.0 controller.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|
|
Add Starfive JH7110 SoC USB 2.0 PHY driver support.
USB 2.0 PHY default connect to Cadence USB controller.
Signed-off-by: Minda Chen <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
|