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2024-08-16net: dsa: microchip: generalize KSZ9477 WoL functions at ksz_commonPieter Van Trappen1-8/+8
Generalize KSZ9477 WoL functions at ksz_common. Move dedicated registers and generic masks to existing structures & defines for that purpose. Introduction of PME (port) read/write helper functions, which happen to be the generic read/write for KSZ9477 but not for the incoming KSZ87xx patch. Signed-off-by: Pieter Van Trappen <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-08-16net: dsa: microchip: move KSZ9477 WoL functions to ksz_commonPieter Van Trappen1-181/+0
Move KSZ9477 WoL functions to ksz_common, in preparation for adding KSZ87xx family support. Signed-off-by: Pieter Van Trappen <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-08-13net: dsa: microchip: ksz9477: unwrap URL in commentEnguerrand de Ribaucourt1-2/+1
Keep the URL in a single line for easier copy-pasting. Signed-off-by: Enguerrand de Ribaucourt <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Link: https://patch.msgid.link/20240812124346.597702-1-enguerrand.de-ribaucourt@savoirfairelinux.com Signed-off-by: Jakub Kicinski <[email protected]>
2024-08-11net: dsa: microchip: ksz9477: split half-duplex monitoring functionEnguerrand de Ribaucourt1-37/+54
In order to respect the 80 columns limit, split the half-duplex monitoring function in two. This is just a styling change, no functional change. Signed-off-by: Enguerrand de Ribaucourt <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2024-06-23net: dsa: microchip: monitor potential faults in half-duplex modeEnguerrand de Ribaucourt1-0/+51
The errata DS80000754 recommends monitoring potential faults in half-duplex mode for the KSZ9477 family. half-duplex is not very common so I just added a critical message when the fault conditions are detected. The switch can be expected to be unable to communicate anymore in these states and a software reset of the switch would be required which I did not implement. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Signed-off-by: Enguerrand de Ribaucourt <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2024-06-23net: dsa: microchip: use collision based back pressure modeEnguerrand de Ribaucourt1-0/+4
Errata DS80000758 states that carrier sense back pressure mode can cause link down issues in 100BASE-TX half duplex mode. The datasheet also recommends to always use the collision based back pressure mode. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Signed-off-by: Enguerrand de Ribaucourt <[email protected]> Reviewed-by: Woojung Huh <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2024-06-20net: dsa: microchip: fix initial port flush problemTristram Ha1-4/+2
The very first flush in any port will flush all learned addresses in all ports. This can be observed by unplugging the cable from one port while additional ports are connected and dumping the fdb entries. This problem is caused by the initially wrong value programmed to the REG_SW_LUE_CTRL_1 register. Setting SW_FLUSH_STP_TABLE and SW_FLUSH_MSTP_TABLE bits does not have an immediate effect. It is when ksz9477_flush_dyn_mac_table() is called then the SW_FLUSH_STP_TABLE bit takes effect and flushes all learned entries. After that call both bits are reset and so the next port flush will not cause such problem again. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Signed-off-by: Tristram Ha <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2024-05-08net: dsa: microchip: let DCB code do PCP and DSCP policy configurationOleksij Rempel1-6/+0
802.1P (PCP) and DiffServ (DSCP) are handled now by DCB code. Let it do all needed initial configuration. Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-10-27net: dsa: microchip: ksz9477: Fix spelling mistake "Enery" -> "Energy"Colin Ian King1-1/+1
There is a spelling mistake in a dev_dbg message. Fix it. Signed-off-by: Colin Ian King <[email protected]> Reviewed-by: Simon Horman <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/all/[email protected]/ Signed-off-by: Jakub Kicinski <[email protected]>
2023-10-27net: dsa: microchip: Ensure Stable PME Pin State for Wake-on-LANOleksij Rempel1-0/+46
Ensures a stable PME (Power Management Event) pin state by disabling PME on system start and enabling it on shutdown only if WoL (Wake-on-LAN) is configured. This is needed to avoid issues with some PMICs (Power Management ICs). Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-10-27net: dsa: microchip: ksz9477: Add Wake on Magic Packet supportOleksij Rempel1-4/+53
Introduce Wake on Magic Packet (WoL) functionality to the ksz9477 driver. Major changes include: 1. Extending the `ksz9477_handle_wake_reason` function to identify Magic Packet wake events alongside existing wake reasons. 2. Updating the `ksz9477_get_wol` and `ksz9477_set_wol` functions to handle WAKE_MAGIC alongside the existing WAKE_PHY option, and to program the switch's MAC address register accordingly when Magic Packet wake-up is enabled. This change will prevent WAKE_MAGIC activation if the related port has a different MAC address compared to a MAC address already used by HSR or an already active WAKE_MAGIC on another port. 3. Adding a restriction in `ksz_port_set_mac_address` to prevent MAC address changes on ports with active Wake on Magic Packet, as the switch's MAC address register is utilized for this feature. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-10-25net: dsa: microchip: ksz9477: add Wake on LAN supportOleksij Rempel1-0/+100
Add WoL support for KSZ9477 family of switches. This code was tested on KSZ8563 chip. KSZ9477 family of switches supports multiple PHY events: - wake on Link Up - wake on Energy Detect. Since current UAPI can't differentiate between this PHY events, map all of them to WAKE_PHY. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-10-24net: dsa: Use conduit and user termsFlorian Fainelli1-3/+3
Use more inclusive terms throughout the DSA subsystem by moving away from "master" which is replaced by "conduit" and "slave" which is replaced by "user". No functional changes. Acked-by: Rob Herring <[email protected]> Acked-by: Stephen Hemminger <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Florian Fainelli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-10-03net: dsa: microchip: Enable HSR offloading for KSZ9477Lukasz Majewski1-0/+77
This patch adds functions for providing in KSZ9477 switch HSR (High-availability Seamless Redundancy) hardware offloading. According to AN3474 application note following features are provided: - TX packet duplication from host to switch (NETIF_F_HW_HSR_DUP) - RX packet duplication discarding - Prevention of packet loop For last two ones - there is a probability that some packets will not be filtered in HW (in some special cases - described in AN3474). Hence, the HSR core code shall be used to discard those not caught frames. Moreover, some switch registers adjustments are required - like setting MAC address of HSR network interface. Additionally, the KSZ9477 switch has been configured to forward frames between HSR ports (e.g. 1,2) members to provide support for NETIF_F_HW_HSR_FWD flag. Join and leave functions are written in a way, that are executed with single port - i.e. configuration is NOT done only when second HSR port is configured. Co-developed-by: Vladimir Oltean <[email protected]> Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: Lukasz Majewski <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-09-17net: dsa: microchip: Add partial ACL support for ksz9477 switchesOleksij Rempel1-0/+2
This patch adds partial Access Control List (ACL) support for the ksz9477 family of switches. ACLs enable filtering of incoming layer 2 MAC, layer 3 IP, and layer 4 TCP/UDP packets on each port. They provide additional capabilities for filtering routed network protocols and can take precedence over other forwarding functions. ACLs can filter ingress traffic based on header fields such as source/destination MAC address, EtherType, IPv4 address, IPv4 protocol, UDP/TCP ports, and TCP flags. The ACL is an ordered list of up to 16 access control rules programmed into the ACL Table. Each entry specifies a set of matching conditions and action rules for controlling packet forwarding and priority. The ACL also implements a count function, generating an interrupt instead of a forwarding action. It can be used as a watchdog timer or an event counter. The ACL consists of three parts: matching rules, action rules, and processing entries. Multiple match conditions can be either AND'ed or OR'ed together. This patch introduces support for a subset of the available ACL functionality, specifically layer 2 matching and prioritization of matched packets. For example: tc qdisc add dev lan2 clsact tc filter add dev lan2 ingress protocol 0x88f7 flower action skbedit prio 7 tc qdisc add dev lan1 clsact tc filter add dev lan1 ingress protocol 0x88f7 flower action skbedit prio 7 The hardware offloading implementation was benchmarked against a configuration without hardware offloading. This latter setup relied on a software-based Linux bridge. No noticeable differences were observed between the two configurations. Here is an example of software-based test: ip l s dev enu1u1 up ip l s dev enu1u2 up ip l s dev enu1u4 up ethtool -A enu1u1 autoneg off rx off tx off ethtool -A enu1u2 autoneg off rx off tx off ethtool -A enu1u4 autoneg off rx off tx off ip l a name br0 type bridge ip l s dev br0 up ip l s enu1u1 master br0 ip l s enu1u2 master br0 ip l s enu1u4 master br0 tc qdisc add dev enu1u1 root handle 1: ets strict 4 priomap 3 3 2 2 1 1 0 0 tc qdisc add dev enu1u4 root handle 1: ets strict 4 priomap 3 3 2 2 1 1 0 0 tc qdisc add dev enu1u2 root handle 1: ets strict 4 priomap 3 3 2 2 1 1 0 0 tc qdisc add dev enu1u1 clsact tc filter add dev enu1u1 ingress protocol ipv4 flower action skbedit prio 7 tc qdisc add dev enu1u4 clsact tc filter add dev enu1u4 ingress protocol ipv4 flower action skbedit prio 0 On a system attached to the port enu1u2 I run two iperf3 server instances: iperf3 -s -p 5210 & iperf3 -s -p 5211 & On systems attached to enu1u4 and enu1u1 I run: iperf3 -u -c 172.17.0.1 -p 5210 -b100M -l1472 -t100 and iperf3 -u -c 172.17.0.1 -p 5211 -b100M -l1472 -t100 As a result, IP traffic on port enu1u1 will be prioritized and take precedence over IP traffic on port enu1u4 Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2023-06-22net: dsa: microchip: fix writes to phy registers >= 0x10Rasmus Villemoes1-1/+17
According to the errata sheets for ksz9477 and ksz9567, writes to the PHY registers 0x10-0x1f (i.e. those located at addresses 0xN120 to 0xN13f) must be done as a 32 bit write to the 4-byte aligned address containing the register, hence requires a RMW in order not to change the adjacent PHY register. Signed-off-by: Rasmus Villemoes <[email protected]> Reviewed-by: Simon Horman <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2023-06-06net: dsa: microchip: remove KSZ9477 PHY errata handlingRobert Hancock1-70/+4
The KSZ9477 PHY errata handling code has now been moved into the Micrel PHY driver, so it is no longer needed inside the DSA switch driver. Remove it. Signed-off-by: Robert Hancock <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-05-30net: dsa: microchip: add an enum for regmap widthsVladimir Oltean1-12/+12
It is not immediately obvious that this driver allocates, via the KSZ_REGMAP_TABLE() macro, 3 regmaps for register access: dev->regmap[0] for 8-bit access, dev->regmap[1] for 16-bit and dev->regmap[2] for 32-bit access. In future changes that add support for reg_fields, each field will have to specify through which of the 3 regmaps it's going to go. Add an enum now, to denote one of the 3 register access widths, and make the code go through some wrapper functions for easier review and further modification. Signed-off-by: Vladimir Oltean <[email protected]> Signed-off-by: Oleksij Rempel <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2023-01-23net: dsa: microchip: add support for credit based shaperArun Ramadoss1-0/+7
KSZ9477, KSZ9567, KSZ9563, KSZ8563 and LAN937x supports Credit based shaper. To differentiate the chip supporting cbs, tc_cbs_supported flag is introduced in ksz_chip_data. And KSZ series has 16bit Credit increment registers whereas LAN937x has 24bit register. The value to be programmed in the credit increment is determined using the successive multiplication method to convert decimal fraction to hexadecimal fraction. For example: if idleslope is 10000 and sendslope is -90000, then bandwidth is 10000 - (-90000) = 100000. The 10% bandwidth of 100Mbps means 10/100 = 0.1(decimal). This value has to be converted to hexa. 1) 0.1 * 16 = 1.6 --> fraction 0.6 Carry = 1 (MSB) 2) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 3) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 4) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 5) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 6) 0.6 * 16 = 9.6 --> fraction 0.6 Carry = 9 (LSB) Now 0.1(decimal) becomes 0.199999(Hex). If it is LAN937x, 24 bit value will be programmed to Credit Inc register, 0x199999. For others 16 bit value will be prgrammed, 0x1999. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-01-23net: dsa: microchip: enable port queues for tc mqprioArun Ramadoss1-0/+18
LAN937x family of switches has 8 queues per port where the KSZ switches has 4 queues per port. By default, only one queue per port is enabled. The queues are configurable in 2, 4 or 8. This patch add 8 number of queues for LAN937x and 4 for other switches. In the tag_ksz.c file, prioirty of the packet is queried using the skb buffer and the corresponding value is updated in the tag. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
2023-01-19net: dsa: microchip: ksz9477: port map correction in ALU table entry registerRakesh Sankaranarayanan1-2/+2
ALU table entry 2 register in KSZ9477 have bit positions reserved for forwarding port map. This field is referred in ksz9477_fdb_del() for clearing forward port map and alu table. But current fdb_del refer ALU table entry 3 register for accessing forward port map. Update ksz9477_fdb_del() to get forward port map from correct alu table entry register. With this bug, issue can be observed while deleting static MAC entries. Delete any specific MAC entry using "bridge fdb del" command. This should clear all the specified MAC entries. But it is observed that entries with self static alone are retained. Tested on LAN9370 EVB since ksz9477_fdb_del() is used common across LAN937x and KSZ series. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Signed-off-by: Rakesh Sankaranarayanan <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2022-12-07net: dsa: microchip: enable MTU normalization for KSZ8795 and KSZ9477 ↵Oleksij Rempel1-0/+2
compatible switches KSZ8795 and KSZ9477 compatible series of switches use global max frame size configuration register. So, enable MTU normalization for this reason. Signed-off-by: Oleksij Rempel <[email protected]> Acked-by: Arun Ramadoss <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2022-12-07net: dsa: microchip: do not store max MTU for all portsOleksij Rempel1-9/+5
If we have global MTU configuration, it is enough to configure it on CPU port only. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Reviewed-by: Florian Fainelli <[email protected]> Signed-off-by: Paolo Abeni <[email protected]>
2022-12-07net: dsa: microchip: move max mtu to one locationOleksij Rempel1-5/+0
There are no HW specific registers, so we can process all of them in one location. Signed-off-by: Oleksij Rempel <[email protected]> Tested-by: Arun Ramadoss <[email protected]> (KSZ9893 and LAN937x) Signed-off-by: Paolo Abeni <[email protected]>
2022-11-09net: dsa: microchip: add ksz9563 in ksz_switch_ops and select based on ↵Rakesh Sankaranarayanan1-1/+2
compatible string Add KSZ9563 inside ksz_switch_chips structure with port_nirq as 3. KSZ9563 use KSZ9893 switch parameters but port_nirq count is 3 for KSZ9563 whereas 2 for KSZ9893. Add KSZ9563 inside ksz_switch_chips as a separate member and from device tree map compatible string into KSZ9563 inside ksz_spi.c and ksz9477_i2c.c. Global Chip ID 1 and 2 registers read value 9893, select sku based on Global Chip ID 4 Register which read 0x1c for KSZ9563. Signed-off-by: Rakesh Sankaranarayanan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-09-16net: dsa: microchip: add the support for set_ageing_timeArun Ramadoss1-0/+25
KSZ9477 has the 11 bit ageing count value which is split across the two registers. And LAN937x has the 20 bit ageing count which is also split into two registers. Each count in the registers represents 1 second. This patch add the support for ageing time for KSZ9477 and LAN937x series of switch. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: remove IS_9893 flagOleksij Rempel1-3/+0
Use chip_id as other places of this code do it Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: remove unused sgmii variableOleksij Rempel1-5/+0
This variable is not used. So, remove it. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: ksz9477: remove unused "on" variableOleksij Rempel1-2/+0
This variable is not used on ksz9477 side. Remove it. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: remove unused port phy variableOleksij Rempel1-5/+0
This variable is unused. So, drop it. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: ksz9477: use internal_phy instead of phy_port_cntOleksij Rempel1-13/+7
With code refactoring was introduced new variable internal_phy. Let's use it. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: ksz9477: remove MII_CTRL1000 check from ksz9477_w_phy()Oleksij Rempel1-4/+0
The reason why PHYlib may access MII_CTRL1000 on the chip without GBit support is only if chip provides wrong information about extended caps register. This issue is now handled by ksz9477_r_phy_quirks() With proper regmap_ranges provided for all chips we will be able to catch this kind of bugs any way. So, remove this sanity check. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: KSZ9893: do not write to not supported Output Clock ↵Oleksij Rempel1-0/+5
Control Register This issue was detected after adding regmap register access validation. KSZ9893 compatible chips do not have "Output Clock Control Register 0x0103". So, avoid writing to it. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: ksz9477: add error handling to ksz9477_r/w_phyOleksij Rempel1-5/+7
Now ksz_pread/ksz_pwrite can return error value. So, make use of it. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: allow to pass return values for PHY read/write accessesOleksij Rempel1-4/+8
PHY access may end with errors on different levels. So, allow to forward return values where possible. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: don't announce extended register support on non Gbit chipsOleksij Rempel1-0/+11
This issue was detected after adding support of regmap_ranges for KSZ8563R chip. This chip is reporting extended registers support without having actual extended registers. This made PHYlib request not existing registers. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-31net: dsa: microchip: do per-port Gbit detection instead of per-chipOleksij Rempel1-17/+3
KSZ8563 has two 100Mbit PHYs and CPU port with RGMII support. Since 1000Mbit configuration for the RGMII capable MAC is present, we should use per port validation. As main part of migration to per-port validation we need to rework ksz9477_switch_init() function. Which is using undocumented REG_GLOBAL_OPTIONS register to detect per-chip Gbit support. So, it is related to some sort of risk for regressions. To reduce this risk I compared the code with publicly available documentations. This function will executed on following currently supported chips: struct ksz_chip_data OF compatible KSZ9477 KSZ9477 KSZ9897 KSZ9897 KSZ9893 KSZ9893, KSZ9563 KSZ8563 KSZ8563 KSZ9567 KSZ9567 Only KSZ9893, KSZ9563, KSZ8563 document existence of 0xf == REG_GLOBAL_OPTIONS register with bit field description "SKU ID": KSZ9893 0x0C KSZ9563 0x1C KSZ8563 0x3C The existence of hidden flags is not documented. KSZ9477, KSZ9897, KSZ9567 do not document this register at all. Only KSZ8563 is documented as non Gbit chip: 100Mbit PHYs and RGMII CPU port. So, this change should not introduce a regression for configurations with properly used OF compatibles. Signed-off-by: Oleksij Rempel <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-08-17net: dsa: microchip: ksz9477: fix fdb_dump last invalid entryArun Ramadoss1-0/+3
In the ksz9477_fdb_dump function it reads the ALU control register and exit from the timeout loop if there is valid entry or search is complete. After exiting the loop, it reads the alu entry and report to the user space irrespective of entry is valid. It works till the valid entry. If the loop exited when search is complete, it reads the alu table. The table returns all ones and it is reported to user space. So bridge fdb show gives ff:ff:ff:ff:ff:ff as last entry for every port. To fix it, after exiting the loop the entry is reported only if it is valid one. Fixes: b987e98e50ab ("dsa: add DSA switch driver for Microchip KSZ9477") Signed-off-by: Arun Ramadoss <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2022-07-27net: dsa: microchip: add support for phylink mac configArun Ramadoss1-4/+0
This patch add support for phylink mac config for ksz series of switches. All the files ksz8795, ksz9477 and lan937x uses the ksz common xmii function. Instead of calling from the individual files, it is moved to the ksz common phylink mac config function. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-07-27net: dsa: microchip: ksz9477: use common xmii functionArun Ramadoss1-147/+6
In ksz9477.c file, configuring the xmii register is performed based on the flag NEW_XMII. The flag is reset for ksz9893 switch and set for other switch. This patch uses the ksz common xmii set and get function. The bit values are configured based on the chip id. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-07-27net: dsa: microchip: add common gigabit set and get functionArun Ramadoss1-31/+5
This patch add helper function for setting and getting the gigabit enable for the ksz series switch. KSZ8795 switch has different register address compared to all other ksz switches. KSZ8795 series uses the Port 5 Interface control 6 Bit 6 for configuring the 1Gbps or 100/10Mbps speed selection. All other switches uses the xMII control 1 0xN301 register Bit6 for gigabit. Further, for KSZ8795 & KSZ9893 switches if bit 1 then 1Gbps is chosen and if bit 0 then 100/10Mbps is chosen. It is other way around for other switches bit 0 is for 1Gbps. So, this patch implements the common function for configuring the gigabit set and get capability. Signed-off-by: Arun Ramadoss <[email protected]> Reviewed-by: Vladimir Oltean <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-07-02net: dsa: microchip: generic access to ksz9477 static and reserved tableArun Ramadoss1-7/+20
The ksz9477 and lan937x has few difference in the static and reserved table register 0x041C. For the ksz9477 if the bit 0 is 1 - read operation and 0 - write operation. But for lan937x bit 1:0 used for selecting the read/write operation, 01 - write and 10 - read. To use ksz9477 mdb add/del and enable_stp_addr for the lan937x, masks & shifts are introduced for ksz9477 & lan937x in ksz_common.c. Then updated the function with masks & shifts based on the switch instead of hard coding it. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-29net: dsa: microchip: add P_STP_CTRL to ksz_chip_regArun Ramadoss1-3/+4
This patch moves the stp_ctrl_reg from the ksz_chip_data to ksz_chip_reg structure. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: remove the ksz8/ksz9477_switch_registerArun Ramadoss1-6/+0
This patch delete the ksz8_switch_register and ksz9477_switch_register since both are calling the ksz_switch_register function. Instead the ksz_switch_register is called from the probe function. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: move ksz_dev_ops to ksz_common.cArun Ramadoss1-84/+45
This patch move the ksz_dev_ops from individual files to ksz_common.c. And the dev_ops is assigned to ksz_device based on the switch detect. This reduces the redundant function and allows to reuse the functionality for LAN937x which has similar register set. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: ksz9477: separate phylink mode from switch registerArun Ramadoss1-25/+6
As per 'commit 3506b2f42dff ("net: dsa: microchip: call phy_remove_link_mode during probe")' phy_remove_link_mode is added in the switch_register function after dsa_switch_register. In order to have the common switch register function, moving this phylink validation to phylink_get_caps validation hook. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: common dsa_switch_ops for ksz switchesArun Ramadoss1-32/+1
At present, ksz8795.c and ksz9477.c have separate dsa_switch_ops structure initialization. This patch modifies the files such a way that ksz switches has common dsa_switch_ops in the ksz_common.c file. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: move start of switch to ksz_setupArun Ramadoss1-3/+0
This patch move the setting the start bit from the individual switch configuration to ksz_setup Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: move multicast enable to ksz_setupArun Ramadoss1-2/+0
This patch moves the enabling the multicast storm protection from individual setup function to ksz_setup function. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
2022-06-24net: dsa: microchip: move broadcast rate limit to ksz_setupArun Ramadoss1-6/+0
This patch move the 10% broadcast protection from the individual setup to ksz_setup. In the ksz9477, broadcast protection is updated in reset function. Signed-off-by: Arun Ramadoss <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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