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Adds the sun6i_hwspinlock driver for the hardware spinlock unit found in
most of the sun6i compatible SoCs.
This unit provides at least 32 spinlocks in hardware. The implementation
supports 32, 64, 128 or 256 32bit registers. A lock can be taken by
reading a register and released by writing a 0 to it. This driver
supports all 4 spinlock setups, but for now only the first setup (32
locks) seem to exist in available devices. This spinlock unit is shared
between all ARM cores and the embedded companion core. All of them can
take/release a lock with a single cycle operation. It can be used to
sync access to devices shared by the ARM cores and the companion core.
There are two ways to check if a lock is taken. The first way is to read
a lock. If a 0 is returned, the lock was free and is taken now. If an 1
is returned, the caller has to try again. Which means the lock is taken.
The second way is to read a 32bit wide status register where every bit
represents one of the 32 first locks. According to the datasheets this
status register supports only the 32 first locks. This is the reason the
first way (lock read/write) approach is used to be able to cover all 256
locks in future devices. The driver also reports the amount of supported
locks via debugfs.
Reviewed-by: Samuel Holland <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Wilken Gottwalt <[email protected]>
Link: https://lore.kernel.org/r/bfd2b97307c2321b15c09683f4bd5e1fcc792f13.1615713499.git.wilken.gottwalt@posteo.net
Signed-off-by: Bjorn Andersson <[email protected]>
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The CSR SiRF prima2/atlas platforms are getting removed, so this driver
is no longer needed.
Cc: Barry Song <[email protected]>
Link: https://lore.kernel.org/linux-arm-kernel/[email protected]/T/
Signed-off-by: Arnd Bergmann <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Every hwspinlock driver is expected to depend on the
hwspinlock core, so it's possible to simplify the
Kconfig, factoring out the HWSPINLOCK dependency.
Reviewed-by: Baolin Wang <[email protected]>
Signed-off-by: Ezequiel Garcia <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Allow drivers to be built with COMPILE_TEST.
Signed-off-by: Baolin Wang <[email protected]>
Link: https://lore.kernel.org/r/5a95c3de07ef020a4e2f2776fa5adb00637ee387.1581324976.git.baolin.wang7@gmail.com
Signed-off-by: Bjorn Andersson <[email protected]>
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A HwSpinlock IP is also present on the newer TI K3 AM65x and J721E
family of SoCs within the Main NavSS sub-module. Reuse the existing
OMAP Hwspinlock driver to extend the support for this IP on K3 AM65x
SoCs as well. The IP has slightly different bit-fields in the
SYSCONFIG and SYSSTATUS registers.
Signed-off-by: Suman Anna <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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This patch adds support of hardware semaphores for stm32mp1 SoC.
The hardware block provides 32 semaphores.
Signed-off-by: Benjamin Gaignard <[email protected]>
Signed-off-by: Benjamin Gaignard <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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Use the appropriate SPDX license identifier in the Hwspinlock core
driver source files and drop the previous boilerplate license text.
Signed-off-by: Suman Anna <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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Change hwspinlock to a bool in case some drivers will meet dependency
issue when hwspinlock is built as a module.
Signed-off-by: Baolin Wang <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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The Spreadtrum hardware spinlock device can provide hardware assistance
for synchronization between the multiple subsystems.
Signed-off-by: Baolin Wang <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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So that there's no need to get into the submenu to disable all related config
entries.
Signed-off-by: Vincent Legoll <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
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Add hwspinlock support for the CSR atlas7 SoC.
The Hardware Spinlock device on atlas7 provides hardware assistance
for synchronization between the multiple processors in the system
(dual Cortex-A7, CAN bus Cortex-M3 and audio DSP).
Reviewed-by: Suman Anna <[email protected]>
Reviewed-by: Bjorn Andersson <[email protected]>
Signed-off-by: Wei Chen <[email protected]>
Signed-off-by: Barry Song <[email protected]>
Signed-off-by: Ohad Ben-Cohen <[email protected]>
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Add driver for Qualcomm Hardware Mutex block found in many Qualcomm
SoCs.
Based on initial effort by Kumar Gala <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Reviewed-by: Andy Gross <[email protected]>
Reviewed-by: Jeffrey Hugo <[email protected]>
Signed-off-by: Ohad Ben-Cohen <[email protected]>
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HwSpinlocks are supported on TI's AM33xx, AM43xx and DRA7xx SoC
device families as well. The IPs are identical to that of
OMAP4/OMAP5, except for the number of locks.
Add a depends on to the above family of SoCs to enable the
build support for OMAP hwspinlock driver for any of the above
SoC configs.
Signed-off-by: Suman Anna <[email protected]>
[small commit log changes]
Signed-off-by: Ohad Ben-Cohen <[email protected]>
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OMAP5 has spinlocks, too.
Signed-off-by: Vincent Stehlé <[email protected]>
Cc: Tony Lindgren <[email protected]>
Signed-off-by: Ohad Ben-Cohen <[email protected]>
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Add hwspinlock driver for U8500's Hsem hardware.
At this point only HSem's protocol 1 is used (i.e. no interrupts).
Signed-off-by: Mathieu Poirier <[email protected]>
Acked-by: Linus Walleij <[email protected]>
[[email protected]: adopt recent hwspin_lock_{un}register API changes]
[[email protected]: set the owner member of the driver]
[[email protected]: mark ->remove() function as __devexit]
[[email protected]: write commit log]
[[email protected]: small cleanups]
Signed-off-by: Ohad Ben-Cohen <[email protected]>
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Simplify hwspinlock's Kconfig by making the global CONFIG_HWSPINLOCK
entry invisible; users will just select it when needed.
This also prepares the ground for adding hwspinlock support for other
platforms (the 'depends on ARCH_OMAP4' was rather hideous, and while
we're at it, a dedicated menu is added).
Signed-off-by: Ohad Ben-Cohen <[email protected]>
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Currently only OMAP4 supports hwspinlocks, so don't bother asking
anyone else.
Signed-off-by: Ohad Ben-Cohen <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add hwspinlock support for the OMAP4 Hardware Spinlock device.
The Hardware Spinlock device on OMAP4 provides hardware assistance
for synchronization between the multiple processors in the system
(dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP).
[[email protected]: adapt to hwspinlock framework, tidy up]
Signed-off-by: Simon Que <[email protected]>
Signed-off-by: Hari Kanigeri <[email protected]>
Signed-off-by: Krishnamoorthy, Balaji T <[email protected]>
Signed-off-by: Ohad Ben-Cohen <[email protected]>
Cc: Benoit Cousson <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: Grant Likely <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Paul Walmsley <[email protected]>
Cc: Russell King <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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Add a platform-independent hwspinlock framework.
Hardware spinlock devices are needed, e.g., in order to access data
that is shared between remote processors, that otherwise have no
alternative mechanism to accomplish synchronization and mutual exclusion
operations.
Signed-off-by: Ohad Ben-Cohen <[email protected]>
Cc: Hari Kanigeri <[email protected]>
Cc: Benoit Cousson <[email protected]>
Cc: Kevin Hilman <[email protected]>
Cc: Grant Likely <[email protected]>
Cc: Paul Walmsley <[email protected]>
Cc: Russell King <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
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