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path: root/drivers/gpu/drm/rcar-du/rcar_du_regs.h
AgeCommit message (Expand)AuthorFilesLines
2023-05-29drm: Place Renesas drivers in a separate dirBiju Das1-553/+0
2023-05-29drm: rcar-du: remove R-Car H3 ES1.* workaroundsWolfram Sang1-2/+1
2023-03-25drm: rcar-du: Rename DORCR fields to make them 0-basedLaurent Pinchart1-13/+13
2023-01-24drm: rcar-du: Fix setting a reserved bit in DPLLCRTomi Valkeinen1-6/+2
2022-07-07drm: rcar-du: Drop file name from comment header blocksLaurent Pinchart1-1/+1
2021-10-07drm: rcar-du: Add r8a779a0 device supportKieran Bingham1-0/+1
2021-10-07drm: rcar-du: Fix DIDSR field nameKieran Bingham1-4/+4
2019-12-18drm: rcar-du: crtc: Control CMM operationsJacopo Mondi1-0/+5
2018-09-15drm: rcar-du: Write ESCR and OTAR as CRTC registersJacopo Mondi1-4/+4
2018-09-14drm: rcar-du: Convert to SPDX identifiersKuninori Morimoto1-4/+1
2018-05-05drm: rcar-du: Use the correct naming for ODPM fields in DEFR6Kieran Bingham1-8/+8
2017-04-04drm: rcar-du: Add DPLL supportKoji Matsuoka1-0/+23
2016-06-20rcar-du: add/rename DEFR6 TCON bitsSergei Shtylyov1-2/+3
2016-02-23drm: rcar-du: Add R8A7795 device supportLaurent Pinchart1-1/+16
2016-02-23drm: rcar-du: Output the DISP signal on the ODDF pinLaurent Pinchart1-1/+1
2016-02-23drm: rcar-du: Support up to 4 CRTCsKoji Matsuoka1-0/+1
2016-02-20drm: rcar-du: Add VSP1 compositor supportLaurent Pinchart1-0/+1
2014-12-23drm: rcar-du: Implement support for interlaced modesLaurent Pinchart1-0/+1
2014-12-23drm: rcar-du: Add support for external pixel clockLaurent Pinchart1-2/+2
2013-08-09drm/rcar-du: Add support for multiple groupsLaurent Pinchart1-1/+3
2013-08-09drm/rcar-du: Add support for the R8A7790 DULaurent Pinchart1-3/+63
2013-08-09drm/rcar-du: Remove register definitions for the second channelLaurent Pinchart1-9/+0
2013-08-09drm/rcar-du: Add missing alpha plane register definitionsLaurent Pinchart1-0/+15
2013-06-27drm: Renesas R-Car Display Unit DRM driverLaurent Pinchart1-0/+445
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