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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2020-03-20drm/i915/perf: Invalidate OA TLB on when closing perf streamUmesh Nerlige Ramappa1-0/+2
2020-03-13drm/i915: Add Wa_1406306137:icl,ehlMatt Roper1-0/+1
2020-03-13drm/i915: Add Wa_1604278689:icl,ehlMatt Roper1-0/+1
2020-03-11drm/i915: Add missing HDMI audio pixel clocks for gen12Kai Vehmanen1-0/+4
2020-03-09drm/i915: Fix readout of PIPEGCMAXVille Syrjälä1-1/+0
2020-03-02drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood1-0/+3
2020-03-02drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza1-2/+3
2020-02-27drm/i915: Set up PIPE_MISC truncate bit on tgl+Ville Syrjälä1-0/+1
2020-02-27drm/i915: remove ICP_PP_CONTROLLucas De Marchi1-10/+0
2020-02-21drm/i915/tgl: Add Wa_22010178259:tglMatt Roper1-0/+1
2020-02-20drm/i915/tgl: Program MBUS_ABOX{1,2}_CTL during display initMatt Roper1-0/+2
2020-02-20drm/i915: Parametrize PFIT_PIPEVille Syrjälä1-0/+1
2020-02-08drm/i915/debugfs: Remove i915_energy_uJTvrtko Ursulin1-2/+0
2020-02-07drm/i915: Implement Wa_1607090982Mika Kuoppala1-0/+2
2020-02-07drm/i915: Disable tesselation clock gating on tgl A0Mika Kuoppala1-0/+1
2020-02-05drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy1-3/+3
2020-01-31drm/i915: Polish WM_LINETIME register stuffVille Syrjälä1-7/+7
2020-01-30drm/i915: add extra slice common debug registersLionel Landwerlin1-0/+2
2020-01-29drm/i915/gt: Hook up CS_MASTER_ERROR_INTERRUPTChris Wilson1-1/+4
2020-01-16drm/i915: add Wa_14010594013: icl,ehlMatt Atwood1-0/+1
2020-01-15drm/i915/tgl: Add Wa_1409825376 to tglRadhakrishna Sripada1-0/+3
2020-01-14drm/i915/gen11: Add additional pcode status valuesMatt Roper1-0/+2
2020-01-08drm/i915/display/icl+: Do not program clockgatingJosé Roberto de Souza1-20/+0
2020-01-07drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media ...Dhinakaran Pandiyan1-0/+1
2019-12-31drm/i915: Add Wa_1407352427:icl,ehlMatt Roper1-0/+1
2019-12-27drm/i915/tgl: Extend Wa_1408615072 to tglMatt Roper1-0/+3
2019-12-27drm/i915: Add Wa_1408615072 and Wa_1407596294 to icl,ehlMatt Roper1-1/+3
2019-12-23drm/i915/tgl: Gen-12 render decompressionDhinakaran Pandiyan1-0/+1
2019-12-13drm/i915/tgl: Drop Wa#1178Matt Roper1-3/+1
2019-12-11drm/i915/dsb: Fix in mmio offset calculation of DSB instanceAnimesh Manna1-1/+1
2019-12-10drm/i915/tgl: Program BW_BUDDY registers during display initMatt Roper1-0/+8
2019-12-02drm/i915: Program SHPD_FILTER_CNT on CNP+Matt Roper1-0/+4
2019-11-29drm/i915/tgl: Implement Wa_1604555607Michel Thierry1-0/+4
2019-11-15drm/i915: Fix frame start delay programmingVille Syrjälä1-5/+7
2019-11-15Merge drm/drm-next into drm-intel-next-queuedJani Nikula1-0/+10
2019-11-14drm/i915/gt: Refactor mocs loops into single control macroChris Wilson1-7/+12
2019-11-14Backmerge i915 security patches from commit 'ea0b163b13ff' into drm-nextDave Airlie1-0/+8
2019-11-14drm/i915/gen8+: Add RC6 CTX corruption WAImre Deak1-0/+2
2019-11-13drm/i915/display/dsi: Add support to pipe DJosé Roberto de Souza1-0/+1
2019-11-13drm/i915/display: Fix TRANS_DDI_MST_TRANSPORT_SELECT definitionJosé Roberto de Souza1-1/+1
2019-11-12drm/i915/dsi: Define command mode registersVandita Kulkarni1-8/+70
2019-11-05drm/i915/gen8+: Add RC6 CTX corruption WAImre Deak1-0/+2
2019-11-05drm/i915: Lower RM timeout to avoid DSI hard hangsUma Shankar1-0/+4
2019-11-05drm/i915: Add gen9 BCS cmdparsingJon Bloomfield1-0/+4
2019-11-04drm/i915: Expose C8 on VLV/CHV sprite planesVille Syrjälä1-0/+1
2019-11-04drm/i915: Add missing 10bpc formats for pipe B sprites on CHVVille Syrjälä1-6/+8
2019-11-04drm/i915: Expose alpha formats on VLV/CHV primary planesVille Syrjälä1-0/+1
2019-10-30drm/i915/tgl: Add gam instdoneMika Kuoppala1-0/+1
2019-10-30drm/i915/tgl: Add SFC instdone to error stateMika Kuoppala1-0/+3
2019-10-29drm/i915/tgl: add support to one DP-MST streamLucas De Marchi1-0/+3
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