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path: root/drivers/gpu/drm/i915/display/intel_vdsc.c
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2024-08-06drm/i915: Remove DSC register dumpImre Deak1-22/+2
The Display Engine's DSC register values are deducted from the DSC configuration stored in intel_crtc_state::dsc. The latter one is dumped in a human-readable format, so dumping the register values is redundant, remove it. Acked-by: Jani Nikula <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-08-06drm/i915: Dump DSC state to dmesg and debugfs/i915_display_infoImre Deak1-0/+20
Dump the DSC state to dmesg during HW readout and state computation as well as the i915_display_info debugfs entry. v2: Rebase on the s/DRM_X16/FXP_Q4 change. Acked-by: Jani Nikula <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-08-06drm/i915: Replace to_bpp_frac() with fxp_q4_to_frac()Imre Deak1-1/+1
Replace the to_bpp_frac() helper defined by the driver with the equivalent fxp_q4_to_frac() helper defined by DRM core. v2: Rebase on the s/drm_x16/fxp_q4 change. Acked-by: Jani Nikula <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-08-06drm/i915: Replace to_bpp_int() with fxp_q4_to_int()Imre Deak1-2/+3
Replace the to_bpp_int() helper defined by the driver with the equivalent fxp_q4_to_int() helper defined by DRM core. v2: Rebase on the s/drm_x16/fxp_q4 change. Acked-by: Jani Nikula <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-12drm/i915: Rename bigjoiner master/slave to bigjoiner primary/secondaryStanislav Lisovskiy1-5/+5
According to BSpec we now should call "master" pipes, "primary" pipes and "slave" pipes, should be "secondary" pipes. Signed-off-by: Stanislav Lisovskiy <[email protected]> [vsyrjala: Don't rename port sync stuff, catch a few more things] Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-06-12drm/i915: Rename all bigjoiner to joinerStanislav Lisovskiy1-6/+6
Lets unify both bigjoiner and ultrajoiner under simple "joiner" name, because in future we might have multiple configurations, involving multiple bigjoiners, ultrajoiner, however it is possible to use same api for handling both. v2: - Renamed back some bigjoiner specific parts for now(Ville) Signed-off-by: Stanislav Lisovskiy <[email protected]> [vsyrjala: Catch a few more cases] Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2024-05-31drm/i915: drop unnecessary i915_reg.h includesJani Nikula1-1/+0
With the register header refactoring, some of the includes of i915_reg.h have become unnecessary. Remove. Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Jani Nikula <[email protected]>
2023-12-08drm/i915: Streamline intel_dsc_pps_read()Ville Syrjälä1-14/+7
intel_dsc_pps_read() is rather convoluted. Make it legible. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-11-14drm/i915/dsc/mtl: Add support for fractional bppVandita Kulkarni1-5/+20
Consider the fractional bpp while reading the qp values. v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) Signed-off-by: Vandita Kulkarni <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/display: Store compressed bpp in U6.4 formatAnkit Nautiyal1-2/+2
DSC parameter bits_per_pixel is stored in U6.4 format. The 4 bits represent the fractional part of the bpp. Currently we use compressed_bpp member of dsc structure to store only the integral part of the bits_per_pixel. To store the full bits_per_pixel along with the fractional part, compressed_bpp is changed to store bpp in U6.4 formats. Intergral part is retrieved by simply right shifting the member compressed_bpp by 4. v2: -Use to_bpp_int, to_bpp_frac_dec, to_bpp_x16 helpers while dealing with compressed bpp. (Suraj) -Fix comment styling. (Suraj) v3: -Add separate file for 6.4 fixed point helper(Jani, Nikula) -Add comment for magic values(Suraj) v4: -Fix checkpatch warnings caused by renaming(Suraj) v5: -Rebase. -Use existing helpers for conversion of bpp_int to bpp_x16 and vice versa. Signed-off-by: Ankit Nautiyal <[email protected]> Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-14drm/i915/dsc: Fix pic_width readoutSuraj Kandpal1-1/+1
pic_width when written into the PPS register is divided by the no. of vdsc instances first but the actual variable that we compare it to does not change i.e vdsc_cfg->pic_width hence when reading the register back for pic_width it needs to be multiplied by num_vdsc_instances rather than being divided. Fixes: 8b70b5691704 ("drm/i915/vdsc: Fill the intel_dsc_get_pps_config function") Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Chaitanya Kumar Borah <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-11drm/i915/dsc: use REG_BIT, REG_GENMASK, and friends for PPS0 and PPS1Jani Nikula1-8/+7
Use the register helper macros for PPS0 and PPS1 register contents. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0dfebe37a391a5ceb8bfae8e16383f1e5aef815d.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: add the PPS number to the register content macrosJani Nikula1-73/+73
Improve clarity by specifying the PPS number in the register content macros. It's easier to notice if macros are being used for the wrong register. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/58de57b04ad2da5207f52c56c9e40663aaf16173.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: clean up pps commentsJani Nikula1-28/+28
Unify comments to be the simple "PPS n" instead of all sorts of variants. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/915970973ef117fc8d47fbc57e8fa296235ad3e3.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: drop redundant = 0 assignmentsJani Nikula1-28/+15
Directly assign the values instead of first assigning 0 and then |= the values. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/d752a148cc84558b76c8c3dacd9c0b2e0a4efd91.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: rename pps write to intel_dsc_pps_write()Jani Nikula1-16/+16
Make the function name conform to existing style better. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e793056e610ee8cfe2a8d69605402cd2445a517a.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: have intel_dsc_pps_read() return the valueJani Nikula1-13/+19
Register read functions usually return the value instead of passing via pointer parameters. Return the multiple register verification results via a pointer parameter, which can also be NULL to skip the extra checks. Make the name conform to existing style better while at it. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/4d08c0f63c4975cc8cd01b0f82845c989bf13dd0.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: have intel_dsc_pps_read_and_verify() return the valueJani Nikula1-17/+19
Register read functions usually return the value instead of passing via pointer parameters. The calling code becomes easier to read. Make the name conform to existing style better while at it. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/89b7d70bb19114ab3ff0e150a4b862d8032f136d.1693933849.git.jani.nikula@intel.com
2023-09-11drm/i915/dsc: improve clarity of the pps reg read/write helpersJani Nikula1-19/+21
Make it clear what's the number of vdsc per pipe, and what's the number of registers to grab. Have intel_dsc_get_pps_reg() return the registers it knows even if the requested amount is bigger. Cc: Suraj Kandpal <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/e2551b52ac0dd2b4ffe18d5e7733fafdc191d68a.1693933849.git.jani.nikula@intel.com
2023-09-05drm/i915/vdsc: Fill the intel_dsc_get_pps_config functionSuraj Kandpal1-7/+93
We have setup both the read and write functions so we can move ahead and fill in all the readout state from PPS register into the crtc_state so we can send it for comparision. --v2 -Shorten comment to just PPSX rather than having the whole "Readout PPSX register" [Jani] -Remove pps_temp reinitialization as its being initialized in the read function [Jani] -Use REG_FIELD_GET to readout certain fields of dsc registers [Jani] --v9 -Place the masks at a more appropriate place [Ankit] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add function to write in PPS registerSuraj Kandpal1-242/+30
Now that we have a function that reads any PPS register based on intel_dsc_pps enum provided lets create a function that can write on any PPS. --v2 -Changes need as PPS enum was dropped -Remove duplicated code in intel_dsc_write_pps_reg [Jani] --v3 -Use dsc_split instead of num_vdsc_instances [Ankit] --v5 -Changes to implement the new dsc_reg array variable passing [Ankit] --v7 -Pass no of vdsc instances to get_pps_reg [Ankit] --v8 -No need for dsc_reg dynamic allocation [Jani] -Change function to void as no return needs to be sent back --v9 -Send ARRAY_SIZE(dsc_reg) instead of vdsc_per_pipe [Ankit] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add function to read any PPS registerSuraj Kandpal1-36/+82
Add function to read any PPS register based on the intel_dsc_pps enum provided. Add a function which will call the new pps read function and place it in crtc state. Only PPS0 and PPS1 are readout the rest of the registers will be read in upcoming patches. --v2 -Changes in read function as PPS enum is removed -Initialize pps_val as 0 in pps_read func itself [Jani] -Create a function that gets the required register and call that in the common read function [Jani] -Move the drm_WARN_ON one abstraction layer above [Jani] --v3 -Send both reg values regardless of dsc engine no [Jani] -Don't use num_vdsc_instances stick to dsc_split field [Ankit] --v4 -Manipulate the reg values instead of creating MACRO to change name of pps [Ankit] --v5 -Read dsc reg values using array rather than individual variables [Ankit] -Loop the verification of all dsc engine reads to future proof it [Ankit] -Keep the fix me comment in this patch and remove it in later one where we add other readouts [Ankit] -Add switch statement that fills in the required registers based on no of vdsc engines per pipe. --v7 -Pass no of vdsc instances from read_reg function [Ankit] -Fix issue where arrays do not get freed on return for read_and_verify func [Ankit] --v8 -Simplify reading and verifying of register and remove dynamically allocated arrays [Jani] -Remove no_ from no_vdsc_per_pipe and wherever else it applies [Ankit] --v9 -change variable name to dsc_reg_size rather than vdsc_per_pipe [Ankit] --v10 -remove switch case as we never enter case1 [Ankit] --v11 -Add _ prefix for register that are not supposed to be used directly [Jani] -Remove REG suffix from register macros [Jani] -Do not duplicate register read [Jani] --v12 -Use vdsc_per_pipe rather than array size of dsc_reg [Jani] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add func to get no. of vdsc instances per pipeSuraj Kandpal1-34/+44
We have a function that gets us the total of the vdsc engines being used but not the no. of vdsc instances being used by each pipe. --v6 -Change function to static --v7 -Shorten name to intel_dsc_get_vdsc_per_pipe Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-09-05drm/i915/vdsc: Add a check for dsc split casesSuraj Kandpal1-1/+13
In intel_vdsc_get_config we only read the primary dsc engine register and not take into account if the other dsc engine is in use and if both registers have the same value or not this patche fixes that by adding a check. --v3 -Remove superfluos new line [Jani] -Fix register naming [Jani] --v5 -pps_temp0/pps_temp1 can be assigned where they are used [Ankit] Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-08-14drm/i915/vdsc: Fix first_line_bpg_offset calculationSuraj Kandpal1-3/+9
On checking DSC1.1 Errata and DSC 1.2 spec the current formula we were using was incorrect to calculate first_line_bpg_offset. The new fixed formula is derived from C model. --v2 -Use clamp function in linux/minmax.h [Ankit] --v3 -remove linux/minmax.h header Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-07-12drm/i915/vdsc: Remove FIXME in intel_dsc_compute_configSuraj Kandpal1-12/+0
Remove the FIXME and the code related to it as after verification it does seem the previous values were typos and no hardware spec mentions using these particular rc_params. Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Luca Coelho <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-07-12drm/i915/dsc: Add rc_range_parameter calculation for YCbCr420Suraj Kandpal1-38/+103
Some rc_range_parameter calculations were missed for YCbCr420, add them to calculate_rc_param() --v2 -take into account the new formula to get bpp_i --v4 -Fix range_bpg_offset formula for YCbCr420 bpp <= 16 [Ankit] --v5 -Fix comment and mention use of DSC C Model [Ankit] Cc: Vandita Kulkarni <[email protected]> Cc: Ankit Nautiyal <[email protected]> Cc: Uma Shankar <[email protected]> Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-07-12drm/i915/dsc: Move rc param calculation for native_420Suraj Kandpal1-21/+25
Move rc_param calculation for native_420 into calculate_rc_parameter. second_line_bpg_offset and second_line_offset_adj are both rc params and it would be better to have these calculated where all the other rc parameters are calculated. --v2 -Add the reason for commit in commit message [Jani] --v3 -Move nsl_second_line_bpg_offset with the other 420 calculation in calculate_rc_param [Ankit] --v4 -Fix comment alignment [Ankit] Cc: Jani Nikula <[email protected]> Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-07-10drm/i915: Add helper function for getting number of VDSC enginesStanislav Lisovskiy1-4/+11
Currently we are using dsc_split and bigjoiner variables for determining amount of VDSC instances, however that might change in future, if we happen to have more of those. So lets pack all that logic into single function for convenience, so that at least this isn't hardcoded throughout the whole VDSC code. v2: - s/u8/int/ (Jani Nikula) Signed-off-by: Stanislav Lisovskiy <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/display/dsc: split DSC 1.2 and DSC 1.1 (pre-SCR) parametersDmitry Baryshkov1-1/+9
The array of rc_parameters contains a mixture of parameters from DSC 1.1 and DSC 1.2 standards. Split these tow configuration arrays in preparation to adding more configuration data. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Suraj Kandpal Reviewed-by: Suraj Kandpal Reviewed-by: Suraj Kandpal <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/i915/dsc: stop using interim structure for calculated paramsDmitry Baryshkov1-74/+26
Stop using an interim structure rc_parameters for storing calculated params and then setting drm_dsc_config using that structure. Instead put calculated params into the struct drm_dsc_config directly. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-05-19drm/i915/dsc: move DSC tables to DRM DSC helperDmitry Baryshkov1-312/+7
Move DSC RC tables to DRM DSC helper. No additional code changes and/or cleanups are a part of this commit, it will be cleaned up in the followup commits. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/i915/dsc: move rc_buf_thresh values to common helperDmitry Baryshkov1-23/+1
The rc_buf_thresh values are common to all DSC implementations. Move them to the common helper together with the code to propagate them to the drm_dsc_config. Reviewed-by: Jani Nikula <[email protected]> Reviewed-by: Marijn Suijten <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Acked-by: Dave Airlie <[email protected]>
2023-05-19drm/i915/dsc: change DSC param tables to follow the DSC modelDmitry Baryshkov1-2/+20
After cross-checking DSC models (20150914, 20161212, 20210623) change values in rc_parameters tables to follow config files present inside the DSC model. Handle two places, where i915 tables diverged from the model, by patching the rc values in the code. Note: I left one case uncorrected, 8bpp/10bpc/range_max_qp[0], because the table in the VESA DSC 1.1 sets it to 4. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-03drm/i915/vdsc: Check slice design requirementSuraj Kandpal1-0/+32
Add function to check if slice design requirements are being met as defined in Bspec: 49259 in the section Slice Design Requirement --v7 -remove full bspec link [Jani] -rename intel_dsc_check_slice_design_req to intel_dsc_slice_dimensions_valid [Jani] --v8 -fix condition to check if slice width and height are of two -fix minimum pixel in slice condition --v10 -condition should be < rather then >= [Uma] Cc: Uma Shankar <[email protected]> Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-03drm/i915/dsc: Fill in native_420 fieldSuraj Kandpal1-11/+87
Now that we have laid the groundwork for YUV420 Enablement we fill up native_420 field in vdsc_cfg and add appropriate checks wherever required. ---v2 -adding native_422 field as 0 [Vandita] -filling in second_line_bpg_offset, second_line_offset_adj and nsl_bpg_offset in vds_cfg when native_420 is true ---v3 -adding display version check to solve igt issue --v7 -remove is_pipe_dsc check as its always true for D14 [Jani] --v10 -keep sink capability check [Jani] -move from !(x == y || w == z) to x !=y && w != z [Jani] --v11 -avoid native_420 computation if not gen14 [Uma] --v12 -fix state mismatch issue of compressed_bpp Cc: Uma Shankar <[email protected]> Cc: Jani Nikula <[email protected]> Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-04-03drm/i915/dsc: Enable YCbCr420 for VDSCSuraj Kandpal1-2/+2
Implementation of VDSC for YCbCr420. Add QP tables for 8,10,12 BPC from rc_tables.h in intel_qp_tables.c (Derived from C-Model, which is given along with DSC1.2a Spec from Vesa) intel_lookup_range_min/max_qp functons need to take into account the output format. Based on that appropriate qp table need to be chosen. Other rc_parameters need to be set where currently values for 444 format is hardcoded in calculate_rc_parameters( ). vdsc_cfg struct needs to be filled with output format information, where these are hardcoded for 444 format. Bspec: 49259 Signed-off-by: Suraj Kandpal <[email protected]> Reviewed-by: Vandita Kulkarni <[email protected]> Reviewed-by: Uma Shankar <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-03-06drm/i915/display: split out DSC and DSS registersJani Nikula1-0/+1
Relatively few places need the DSC and DSS register definitions. Move them to intel_vdsc_regs.h. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-11-30drm/i915/dsc: Refactor dsc gen checksSwati Sharma1-7/+4
Use HAS_DSC(__i915) wrapper containing runtime info of has_dsc member. Platforms supporting dsc has this flag enabled; no need of DISPLAY_VER() check. Also, simplified intel_dsc_source_support() based on above changes. Suggested-by: Jani Nikula <[email protected]> Signed-off-by: Swati Sharma <[email protected]> Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Uma Shankar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-11-11drm/i915: stop including i915_irq.h from i915_trace.hJani Nikula1-0/+1
Turns out many of the files that need i915_reg.h get it implicitly via {display/intel_de.h, gt/intel_context.h} -> i915_trace.h -> i915_irq.h -> i915_reg.h. Since i915_trace.h doesn't actually need i915_irq.h, makes sense to drop it, but that requires adding quite a few new includes all over the place. Prefer including i915_reg.h where needed instead of adding another implicit include, because eventually we'll want to split up i915_reg.h and only include the specific registers at each place. Also some places actually needed i915_irq.h too. Cc: Lucas De Marchi <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/6e78a2e0ac1bffaf5af3b5ccc21dff05e6518cef.1668008071.git.jani.nikula@intel.com
2022-09-07drm/i915/vdsc: Set VDSC PIC_HEIGHT before using for DP DSCAnkit Nautiyal1-1/+0
Currently, pic_height of vdsc_cfg structure is being used to calculate slice_height, before it is set for DP. So taking out the lines to set pic_height from the helper intel_dp_dsc_compute_params() to individual encoders, and setting pic_height, before it is used to calculate slice_height for DP. Fixes: 5a6d866f8e1b ("drm/i915: Get slice height before computing rc params") Cc: Manasi Navare <[email protected]> Cc: Vandita Kulkarni <[email protected]> Cc: Matt Roper <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Vandita Kulkarni <[email protected]> Signed-off-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-08-24drm/i915: move has_dsc to runtime infoJani Nikula1-1/+1
If it's modified runtime, it's runtime info. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Maarten Lankhort <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/0e2646e5fdaad2785678b4f140091b3d91b97f7e.1660910433.git.jani.nikula@intel.com
2022-08-22drm/i915/dsc/mtl: Enable alternate ICH methodVandita Kulkarni1-0/+2
DSC 1.2 is supported from MTL, hence program ICH accordingly. Cc: Ankit Nautiyal <[email protected]> Signed-off-by: Vandita Kulkarni <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-04-25drm/display: Move DSC header and helpers into display-helper moduleThomas Zimmermann1-0/+2
DSC is the Display Stream Compression standard for DisplayPort. Move the DSC code into display/ and split the header into files for protocol core and DRM helpers. Adapt all users of the code. No functional changes. To avoid the proliferation of Kconfig options, DSC is part of DRM's support for DisplayPort. If necessary, a new option could make DSC an independent feature. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Javier Martinez Canillas <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-04drm/i915: Eliminate bigjoiner booleanVille Syrjälä1-4/+4
Since we now have the bigjoiner_pipes bitmask the boolean is redundant. Get rid of it. Also, populating bigjoiner_pipes already during encoder->compute_config() allows us to use it much earlier during the state calculation as well. The initial aim is to use it in intel_crtc_compute_config(). v2: Move the hweight(bigjoiner_pipes) stuff to a later patch Reviewed-by: Ankit Nautiyal <[email protected]> #v1 Reviewed-by: Manasi Navare <[email protected]> #v1 Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-03-01drm/i915: make a handful of read-only arrays static constColin Ian King1-4/+12
Don't populate the read-only arrays on the stack but instead make them static const and signed 8 bit ints. Also makes the object code a little smaller. Reformat the statements to clear up checkpatch warning. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2022-02-15drm/i915: Change bigjoiner state tracking to use the pipe bitmaskVille Syrjälä1-43/+0
Get rid of the inflexible bigjoiner_linked_crtc pointer thing and just track things as a bitmask of pipes instead. We can also nuke the bigjoiner_slave boolean as the role of the pipe can be determined from its position in the bitmask. It might be possible to nuke the bigjoiner boolean as well if we make encoder.compute_config() do the bitmask assignment directly for the master pipe. But for now I left that alone so that encoer.compute_config() will just flag the state as needing bigjoiner, and the intel_atomic_check_bigjoiner() is still responsible for determining the bitmask. But that may have to change as the encoder may be in the best position to determine how exactly we should populate the bitmask. Most places that just looked at the single bigjoiner_linked_crtc now iterate over the whole bitmask, eliminating the singular slave pipe assumption. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Manasi Navare <[email protected]>
2022-02-15drm/i915: Introduce intel_crtc_is_bigjoiner_{slave,master}()Ville Syrjälä1-2/+2
Introduce helpers to query whether the crtc is the slave/master for bigjoiner. This decouples most places from the exact state layout we use to track this relationship, allowing us to change and extend it more easily. Performed with cocci: @@ expression S, E; @@ ( S->bigjoiner_slave = E; | - S->bigjoiner_slave + intel_crtc_is_bigjoiner_slave(S) ) @@ expression S, E; @@ ( - E && S->bigjoiner && !intel_crtc_is_bigjoiner_slave(S) + E && intel_crtc_is_bigjoiner_master(S) | - S->bigjoiner && !intel_crtc_is_bigjoiner_slave(S) + intel_crtc_is_bigjoiner_master(S) ) @@ expression S; @@ - (intel_crtc_is_bigjoiner_master(S)) + intel_crtc_is_bigjoiner_master(S) @@ expression S, E1, E2, E3; @@ - intel_crtc_is_bigjoiner_slave(S) ? E1 : S->bigjoiner ? E2 : E3 + intel_crtc_is_bigjoiner_slave(S) ? E1 : intel_crtc_is_bigjoiner_master(S) ? E2 : E3 @@ typedef bool; @@ + bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state) + { + return crtc_state->bigjoiner_slave; + } + intel_master_crtc(...) {...} @@ typedef bool; @@ + bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state) + { + return crtc_state->bigjoiner && !crtc_state->bigjoiner_slave; + } + intel_master_crtc(...) {...} @@ typedef bool; identifier S; @@ - bool is_trans_port_sync_mode(const struct intel_crtc_state *S); + bool is_trans_port_sync_mode(const struct intel_crtc_state *state); + bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state); + bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state); Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Ankit Nautiyal <[email protected]>
2022-01-26drm/i915: Simplify intel_dsc_source_support()Ville Syrjälä1-6/+1
We can simplify the icl check in intel_dsc_source_support() by noting that the only case when DSC is not supported is when using transcoder A. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2021-12-09drm/i915: Nuke {pipe,plane}_to_crtc_mapping[]Ville Syrjälä1-11/+2
These plane/pipe->crtc mapping arrays are rather pointless. Get rid of them and just iterate the lists instead. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
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