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2024-07-27drm/amd/display: Refactor for dioBhuvanachandra Pinninti3-274/+1
Moved files to respective folders to improve DIO code. Signed-off-by: Bhuvanachandra Pinninti <[email protected]> Reviewed-by: Martin Leung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-06-27drm/amd/display: Fix Makefile copyright noticesAlex Deucher1-9/+2
Leftover copy pasta from original code. Reviewed-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]> Cc: [email protected]
2024-05-02drm/amd/display: Refactor DCCG into component folderRevalla Hari Krishna3-139/+1
[why] cleaning up the code refactor requires dccg to be in its own component. [how] move all files under newly created dccg folder and fixing the makefiles. Reviewed-by: Martin Leung <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Revalla Hari Krishna <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-30drm/amd/display: Refactor HUBBUB into component folderRevalla Hari Krishna3-145/+1
[why] cleaning up the code refactor requires hubbub to be in its own component. [how] Move all files under newly created hubbub folder and fix the makefiles. Reviewed-by: Martin Leung <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Revalla Hari Krishna <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-26drm/amd/display: Remove duplicated function signature from dcn3.01 DCCGDavid Tadokoro1-6/+0
In the header file dc/dcn301/dcn301_dccg.h, the function dccg301_create is declared twice, so remove duplication. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: David Tadokoro <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-04-16drm/amd/display: Add missing callback for init_watermarks in DCN 301Rodrigo Siqueira1-0/+1
Reviewed-by: Leo Li <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-02-22drm/amd/display: Only allow dig mapping to pwrseq in new asicLewis Huang1-0/+1
[Why] The old asic only have 1 pwrseq hw. We don't need to map the diginst to pwrseq inst in old asic. [How] 1. Only mapping dig to pwrseq for new asic. 2. Move mapping function into dcn specific panel control component Cc: Stable <[email protected]> # v6.6+ Cc: Mario Limonciello <[email protected]> Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3122 Reviewed-by: Anthony Koo <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Lewis Huang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-01-03drm/amd/display: Refactor INIT into component folderRevalla3-188/+1
[why] Move all init files to hwss folder. [how] moved the dcnxx_init.c and .h files into inside the hwss and cleared the linkage errors. Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Revalla <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-29drm/amd/display: Refactor OPTC into component folderParandhaman K3-223/+1
[why] Move all optc files to unique folder optc. [how] creating optc repo in dc, and moved the dcnxx_optc.c and .h files into corresponding new folders inside the optc and cleared the linkage errors by adding relative paths in the Makefile.template. Reviewed-by: Martin Leung <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Parandhaman K <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-11-17drm/amd/display: Refactor resource into component directoryMounika Adhuri3-1774/+1
[WHY] Move all resource files to unique folder resource. [HOW] Created resource folder in dc, moved the dcnxx_resource.c and dcnxx_resource.h files into corresponding new folders inside the resource and made appropriate changes for compilation in Makefiles. Reviewed-by: Martin Leung <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Mounika Adhuri <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-26drm/amd/display: Set the DML2 attribute to false in all DCNs older than ↵Rodrigo Siqueira1-1/+2
version 3.5 When DML2 was introduced, it targeted only new DCN versions. For controlling which ASIC should use this new version of DML, it was introduced the using_dml2 attribute. To avoid ambiguities, this commit explicitly sets using_dml2 to false in all ASICs that do not support DML2. Cc: Vitaly Prosyak <[email protected]> Cc: Roman Li <[email protected]> Cc: Qingqing Zhuo <[email protected]> Cc: Daniel Wheeler <[email protected]> Cc: Alex Deucher <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-10-09drm/amd/display: Refactor HWSS into component folderMounika Adhuri5-79/+5
[why] Rename hw_sequencer to hwseq. Move all hwseq files to unique folder hwss. [how] creating hwss repo in dc, and moved the dcnxx_hwseq.c and .h files into corresponding new folders inside the hwss and cleared the linkage errors by adding relative paths in the Makefile.template. Reviewed-by: Martin Leung <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Mounika Adhuri <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: set stream gamut remap matrix to MPC for DCN3+Melissa Wen1-1/+1
dc->caps.color.mpc.gamut_remap says there is a post-blending color block for gamut remap matrix for DCN3 HW family and newer versions. However, those drivers still follow DCN10 programming that remap stream gamut_remap_matrix to DPP (pre-blending). To enable pre-blending and post-blending gamut_remap matrix supports at the same time, set stream gamut_remap to MPC and plane gamut_remap to DPP for DCN families that support both. It was tested using IGT KMS color tests for DRM CRTC CTM property and it preserves test results. Signed-off-by: Melissa Wen <[email protected]> Signed-off-by: Harry Wentland <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-09-26drm/amd/display: switch DC over to the new DRM logging macrosHamza Mahfooz1-0/+2
For multi-GPU systems it is difficult to tell which GPU a particular message is being printed for and that is undesirable because it complicates debugging efforts. Also, the new macros allow us to enable logging for particular parts of the codebase more selectively (since we no longer need to throw everything at DRM_DEBUG_KMS()). So, for the reasons outlined above we should switch to the new macros. We can accomplish this by using the existing DC_LOGGER code to pass around the relevant `struct drm_device` which will be fed to the new macros in logger_types.h. Also, we must get rid of all instances of the DC_LOG_.*() functions that are currently in amdgpu_dm since we don't use the DC logger there and we can simply refer to the macros directly there instead. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amd/display: add more pipe resource interfacesWenjing Liu1-0/+1
Redesign pipe resource interfaces in resource.h file. The new interface design addresses the issue with lack of pipe topology encapsulation and lack of pipe accessors. Reviewed-by: Jun Lei <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-30drm/amd/display: register edp_backlight_control() for DCN301Hamza Mahfooz1-0/+1
As made mention of in commit 099303e9a9bd ("drm/amd/display: eDP intermittent black screen during PnP"), we need to turn off the display's backlight before powering off an eDP display. Not doing so will result in undefined behaviour according to the eDP spec. So, set DCN301's edp_backlight_control() function pointer to dce110_edp_backlight_control(). Cc: [email protected] Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2765 Fixes: 9c75891feef0 ("drm/amd/display: rework recent update PHY state commit") Suggested-by: Swapnil Patel <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-08-07drm/amd/display: rename acquire_idle_pipe_for_layer to ↵Wenjing Liu1-1/+1
acquire_free_pipe_as_sec_dpp_pipe [why] Secondary DPP pipes are used for rendering secondary layers of planes. The name "for layer" doesn't make it obvious. The function is acquiring a free pipe as secondary dpp pipe only. We rename it so it is more obvious. In a future follow up change, we want to add functions to acquire free pipe as opp head pipe or otg master pipe as well. They will have their separate allocation priority. Reviewed-by: Jun Lei <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-07-18drm/amd/display: Enable 3 plane for DCN 3.01Joshua Ashton1-3/+3
Steam Deck/Gamescope wants to take advantage of more planes which is possible on VanGogh but was not previously exposed. Cc: Harry Wentland <[email protected]> Cc: Melissa Wen <[email protected]> Cc: Simon Ser <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Joshua Ashton <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-07-13drm/amd/display: add DCN301 specific logic for OTG programmingAurabindo Pillai4-3/+225
[Why&How] DCN301 does not have FAMS hence the workaround needed on other DCN3x variants related to OTG min/max selector programming is not applicable for it. Hence isolate it and have it use the old sequence without workaround. Fixes: 1598fc576420 ("drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+") Reviewed-by: Swapnil Patel <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Guilherme G. Piccoli <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: remove unused definitionYang Li1-24/+0
Eliminate the following warnings: drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:1050:43: warning: unused variable 'res_create_maximus_funcs' drivers/gpu/drm/amd/amdgpu/../display/dc/dcn301/dcn301_resource.c:705:38: warning: unused variable 'debug_defaults_diags' Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5296 Fixes: 25879d7b4986 ("drm/amd/display: Clean FPGA code in dc") Signed-off-by: Yang Li <[email protected]> Signed-off-by: Hamza Mahfooz <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Clean FPGA code in dcQingqing Zhuo1-7/+3
[Why] Drop dead code for Linux. [How] Remove all IS_FPGA_MAXIMUS_DC and IS_DIAG_DC Reviewed-by: Ariel Bernstein <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Qingqing Zhuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-06-09drm/amd/display: Add visual confirm color support for MCLK switchLeo (Hanghong) Ma1-1/+1
[Why && How] We would like to have visual confirm color support for MCLK switch. 1. Set visual confirm color to yellow: Vblank MCLK switch. 2. Set visual confirm color to cyan: FPO + Vblank MCLK switch. 3. Set visual confirm color to pink: Vactive MCLK switch. Reviewed-by: Jun Lei <[email protected]> Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Leo (Hanghong) Ma <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-22drm/amd/display: Set MPC_SPLIT_DYNAMIC for DCN301Rodrigo Siqueira1-1/+1
Since DC version 3.2.226, DC started to use a new internal commit sequence that better deals with hardware limitations. Usually, DC adopts split pipe dynamics to improve the display bandwidth and, in some cases, to save power. This commit sets MPC_SPLIT_DYNAMIC for DCN301, improving the bandwidth and fixing the cursor bug on KDE when it tries hardware rotation. Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2247 Cc: Melissa Wen <[email protected]> Cc: Xaver Hugl <[email protected]> Reviewed-by: Melissa Wen <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Acked-by: Hamza Mahfooz <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-03-08drm/amd/display: remove legacy fields of dc_plane_cap structDavid Tadokoro1-2/+0
The fields blends_with_above and blends_with_below of struct dc_plane_cap (defined in dc/dc.h) are boolean and set to true by default. All instances of a dc_plane_cap maintain the default values of both. Also, there is only one if statement that checks those fields and there would be the same effect if it was deleted (assuming that those fields are always going to be true). For this reason, considering both fields as legacy ones, this commit removes them and the aforementioned if statement. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: David Tadokoro <[email protected]> Signed-off-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-13drm/amd/display: refactor ddc logic from dc_link_ddc to link_ddcWenjing Liu1-1/+0
[why] 1. Move dd_link_ddc functions to link_ddc. 2. Move link ddc functions declaration exposed in dc to link.h 3. Move link ddc functions declaration exposed in dm to dc_link.h 4. Remove i2caux_interface.h file Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2023-01-03drm/amd/display: patch cases with unknown plane state to prevent warningSwapnil Patel1-1/+2
[Why] DCN301 resource function is missing function pointer to handle cases with unknown plane state. This causes assertion when global state is validated while using swizzle parameter as “DC_UNKNOWN” [How] Add function pointer to handle and patch cases when plane state is unknown. Acked-by: Aurabindo Pillai <[email protected]> Signed-off-by: Swapnil Patel <[email protected]> Reviewed-by: Sung joon Kim <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-12-06drm/amd/display: Enable dp_hdmi21_pcon supportDavid Galiffi1-0/+2
[Why] It is not enabled for DCN3.0.1, 3.0.2, 3.0.3. [How] Add `dc->caps.dp_hdmi21_pcon_support = true` to these DCN versions. Reviewed-by: Martin Leung <[email protected]> Acked-by: Stylon Wang <[email protected]> Signed-off-by: David Galiffi <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-15drm/amd/display: rework macros for DWB register accessAurabindo Pillai1-2/+3
[Why] A hack was used to access DWB register due to difference in the register naming convention which was not compatible with existing SR/SRI* macros. The additional macro needed were added to dwb ip specific header file (dcnxx_dwb.h) instead of soc resource file (dcnxx_resource.c). Due to this pattern, BASE macro had to be redefined in dcnxx_dwb.h, which in turn needed us to undefine them in the resource file. [How] Add a separate macro for DWB access to the resource files that need it instead of defining them in DWB ip header file. This will enable us to reuse the BASE macro defined in the resource file. Reviewed-by: Roman Li <[email protected]> Acked-by: Tom Chung <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-11-09drm/amd/display: Have risk for memory exhaustionLongJun Tang1-0/+1
In dcn*_clock_source_create when dcn*_clk_src_construct fails allocated clk_src needs release. A local attack could use this to cause memory exhaustion. Signed-off-by: LongJun Tang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-10-06drm/amd/display: clean up one inconsistent indentingYang Li1-1/+1
clean up one inconsistent indenting Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2321 Reported-by: Abaci Robot <[email protected]> Signed-off-by: Yang Li <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-29drm/amd/display: Add debug option for exiting idle optimizations on cursor ↵Brandon Syu1-0/+1
updates [Description] - Have option to exit idle opt on cursor updates for debug and optimizations purposes Reviewed-by: Aric Cyr <[email protected]> Acked-by: Jasdeep Dhillon <[email protected]> Signed-off-by: Brandon Syu<[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: Removing 2 physPavle Kotarac1-1/+3
[WHY] New dcn301 has 2 less phys Reviewed-by: Charlene Liu <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Pavle Kotarac <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-09-19drm/amd/display: rework recent update PHY state commitWenjing Liu1-0/+4
[why] Original change 594b237b9a07 ("drm/amd/display: Add interface to track PHY state") was implemented by assuming stream's dpms off is equivalent to PHY power off. This assumption doesn't hold in following situations: 1. MST multiple stream scenario, where multiple streams are sharing the same PHY output. Toggle dpms off for one of the stream doesn't power off the PHY due to the presence of other streams. 2. enable stream failure scenario, where enable stream fails due to failure of link training. This will cause DPMS off is set to false, while the actual PHY power state is off in certain cases. Due to the problematic assumption, the logic will skip disabling other streams for MST multiple stream scenario, therefore PHY is not actually powered off. [how] 1. Rework this refactor by moving PHY state update down to hardware level, where we update PHY state in place when hardware sequencer is actually changing the power state of the PHY hardware. 2. Reimplement symclk on TX off workaround in place when we are actually calling transmitter control to power off PHY in dcn32. Note the workaround is added due to the lack of proper software interface to set TX while keeping symclk on. We plan to address this interface problem so we can set TX off only without affecting symclk in future dcn versions. Fixes: 594b237b9a07 ("drm/amd/display: Add interface to track PHY state") Reviewed-by: Jun Lei <[email protected]> Acked-by: Wayne Lin <[email protected]> Signed-off-by: Wenjing Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-07-25drm/amd/display: Add dc_ctx to link_enc_create() parametersAurabindo Pillai1-0/+1
[Why&How] Preparation to enable run time initialization of register offsets to add dc_context to the link_enc_create callback. This is needed to get the dc_ctx handle where register offset initialization routine is called. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Alan Liu <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-05-26drm/amd/display: Move FPU associated DCN30 code to DML folderJasdeep Dhillon1-0/+2
[why & how] As part of the FPU isolation work documented in https://patchwork.freedesktop.org/series/93042/, isolate code that uses FPU in DCN30 to DML, where all FPU code should locate. Reviewed-by: Rodrigo Siqueira <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Jasdeep Dhillon <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-03-15drm/amd/display: Add pstate verification and recovery for DCN31Nicholas Kazlauskas1-0/+1
[Why] To debug when p-state is being blocked and avoid PMFW hangs when it does occur. [How] Re-use the DCN10 hardware sequencer by adding a new interface for verifying p-state high on the hubbub. The interface is mostly the same as the DCN10 interface, but the bit definitions have changed for the debug bus. Signed-off-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Eric Yang <[email protected]> Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-02-07drm/amdgpu: move dpcs_3_0_0 headers from dcn to dpcsAlex Deucher1-2/+2
To align with other headers. Reviewed-by: Harry Wentland <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-25drm/amd/display: Wrap dcn301_calculate_wm_and_dlg for FPU.Bas Nieuwenhuizen1-0/+11
Mirrors the logic for dcn30. Cue lots of WARNs and some kernel panics without this fix. Signed-off-by: Bas Nieuwenhuizen <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2022-01-19drm/amd/display: Correct MPC split policy for DCN301Zhan Liu1-1/+1
[Why] DCN301 has seamless boot enabled. With MPC split enabled at the same time, system will hang. [How] Revert MPC split policy back to "MPC_SPLIT_AVOID". Since we have ODM combine enabled on DCN301, pipe split is not necessary here. Signed-off-by: Zhan Liu <[email protected]> Reviewed-by: Charlene Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-30drm/amd/display: Changed pipe split policy to allow for multi-display pipe splitAngus Wang1-1/+1
[WHY] Current implementation of pipe split policy prevents pipe split with multiple displays connected, which caused the MCLK speed to be stuck at max [HOW] Changed the pipe split policies so that pipe split is allowed for multi-display configurations Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1522 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1709 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1655 Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1403 Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Aric Cyr <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Angus Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13drm/amd/display: fix function scopesIsabella Basso2-33/+22
This turns previously global functions into static, thus removing compile-time warnings such as: warning: no previous prototype for 'get_highest_allowed_voltage_level' [-Wmissing-prototypes] 742 | unsigned int get_highest_allowed_voltage_level(uint32_t chip_family, uint32_t hw_internal_rev, uint32_t pci_revision_id) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ warning: no previous prototype for 'rv1_vbios_smu_send_msg_with_param' [-Wmissing-prototypes] 102 | int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigned int param) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Changes since v1: - As suggested by Rodrigo Siqueira: 1. Rewrite function signatures to make them more readable. 2. Get rid of unused functions in order to remove 'defined but not used' warnings. Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Isabella Basso <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-13drm/amd: append missing includesIsabella Basso1-0/+2
This fixes warnings caused by global functions lacking prototypes:, such as: warning: no previous prototype for 'dcn303_hw_sequencer_construct' [-Wmissing-prototypes] 12 | void dcn303_hw_sequencer_construct(struct dc *dc) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ... warning: no previous prototype for ‘amdgpu_has_atpx’ [-Wmissing-prototypes] 76 | bool amdgpu_has_atpx(void) { | ^~~~~~~~~~~~~~~ Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Isabella Basso <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-12-01drm/amd/display: Enable P010 for DCN3x ASICsStylon Wang1-1/+1
[Why + How] Enable P010 for SDR video applications. Reviewed-by: Nicholas Kazlauskas <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Stylon Wang <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-22drm/amd/display: enable seamless boot for DCN301Zhan Liu1-1/+1
[Why] DCN301 is capable of running seamless boot if keep_stolen_vga_memory is not set. [How] Add a helper to check whether an ASIC can support seamless boot and set it based on base driver flags. Reviewed-by: Charlene Liu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Zhan Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-22drm/amd/display: Fix LTTPR not EnabledAngus Wang1-0/+17
[WHY] Previous LTTPR change has caused a regression that led to an issue where LTTPR is disabled [HOW] Extended changes from previous fix to DCN30X Reviewed-by: Wesley Chalmers <[email protected]> Reviewed-by: Martin Leung <[email protected]> Reviewed-by: Bhawanpreet Lakha <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Angus Wang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-11-17drm/amd/display: remove dmcub_support cap dependencyCharlene Liu1-2/+0
[why] matching the dmcub_support with all other dcn version. Reviewed-by: Sung joon Kim <[email protected]> Reviewed-by: Martin Leung <[email protected]> Acked-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Charlene Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-10-28drm/amd/display: move FPU associated DCN301 code to DML folderQingqing Zhuo3-365/+13
[Why & How] As part of the FPU isolation work documented in https://patchwork.freedesktop.org/series/93042/, isolate code that uses FPU in DCN301 to DML, where all FPU code should locate. Cc: Christian König <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Rodrigo Siqueira <[email protected]> Tested-by: Zhan Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Qingqing Zhuo <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-23drm/amd/display: Use adjusted DCN301 watermarksNikola Cornij1-1/+95
[why] If DCN30 watermark calc is used for DCN301, the calculated values are wrong due to the data structure mismatch between DCN30 and DCN301. However, using the original DCN301 watermark values causes underflow. [how] - Add DCN21-style watermark calculations - Adjust DCN301 watermark values to remove the underflow Reviewed-by: Zhan Liu <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Nikola Cornij <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-09-14drm/amd/display: Fix multiple memory leaks reported by coverityAnson Jacob1-1/+5
coccinelle patch used: @@ expression enc1,vpg,afmt; @@ - if (!enc1 || !vpg || !afmt) + if (!enc1 || !vpg || !afmt) { + kfree(enc1); + kfree(vpg); + kfree(afmt); return NULL; + } Addresses-Coverity-ID: 1466017: ("Resource leaks") Reviewed-by: Aurabindo Jayamohanan Pillai <[email protected]> Acked-by: Mikita Lipski <[email protected]> Signed-off-by: Anson Jacob <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2021-08-18drm/amd/display: Use DCN30 watermark calc for DCN301Zhan Liu1-95/+1
[why] dcn301_calculate_wm_and_dl() causes flickering when external monitor is connected. This issue has been fixed before by commit 0e4c0ae59d7e ("drm/amdgpu/display: drop dcn301_calculate_wm_and_dl for now"), however part of the fix was gone after commit 2cbcb78c9ee5 ("Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next"). [how] Use dcn30_calculate_wm_and_dlg() instead as in the original fix. Fixes: 2cbcb78c9ee5 ("Merge tag 'amd-drm-next-5.13-2021-03-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-next") Signed-off-by: Nikola Cornij <[email protected]> Reviewed-by: Zhan Liu <[email protected]> Tested-by: Zhan Liu <[email protected]> Tested-by: Oliver Logush <[email protected]> Signed-off-by: Zhan Liu <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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