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path: root/drivers/cxl/core/regs.c
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2024-05-21Merge tag 'pci-v6.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds1-1/+1
2024-05-08PCI/CXL: Move CXL Vendor ID to pci_ids.hDave Jiang1-1/+1
2024-03-26cxl/core/regs: Fix usage of map->reg_type in cxl_decode_regblock() before ass...Dave Jiang1-2/+3
2023-10-27cxl/core/regs: Rework cxl_map_pmu_regs() to use map->dev for devmRobert Richter1-3/+2
2023-10-27cxl/core/regs: Rename phys_addr in cxl_map_component_regs()Robert Richter1-3/+3
2023-10-27cxl/pci: Add RCH downstream port AER register discoveryRobert Richter1-0/+36
2023-10-27cxl/core/regs: Rename @dev to @host in struct cxl_register_mapRobert Richter1-14/+14
2023-06-25Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxlDan Williams1-10/+93
2023-06-25Merge branch 'for-6.5/cxl-perf' into for-6.5/cxlDan Williams1-6/+69
2023-06-25cxl/regs: Clarify when a 'struct cxl_register_map' is input vs outputDan Williams1-4/+4
2023-06-25cxl/regs: Remove early capability checks in Component Register setupRobert Richter1-8/+0
2023-06-25cxl/pci: Refactor component register discovery for reuseTerry Bowman1-0/+77
2023-06-25cxl/core/regs: Add @dev to cxl_register_mapRobert Richter1-6/+12
2023-06-25cxl/rch: Prepare for caching the MMIO mapped PCIe AER capabilityDan Williams1-2/+3
2023-06-25cxl/acpi: Probe RCRB later during RCH downstream port creationRobert Richter1-4/+11
2023-05-30cxl/pci: Find and register CXL PMU devicesJonathan Cameron1-0/+16
2023-05-30cxl: Add functions to get an instance of / count regblocks of a given typeJonathan Cameron1-6/+53
2022-12-05cxl/regs: Fix sparse warningDan Williams1-1/+1
2022-12-05Merge branch 'for-6.2/cxl-aer' into for-6.2/cxlDan Williams1-74/+98
2022-12-03cxl/pci: Find and map the RAS Capability StructureDan Williams1-0/+7
2022-12-03cxl/pci: Prepare for mapping RAS Capability StructureDan Williams1-10/+26
2022-12-03cxl/core/regs: Make cxl_map_{component, device}_regs() device genericDan Williams1-17/+23
2022-12-03cxl/pci: Cleanup cxl_map_device_regs()Dan Williams1-31/+20
2022-12-03cxl/pci: Cleanup repeated code in cxl_probe_regs() helpersDan Williams1-20/+26
2022-12-03cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter1-0/+65
2022-11-14cxl/core: Check physical address before mapping it in devm_cxl_iomap_block()Robert Richter1-0/+3
2022-11-14cxl/core: Remove duplicate declaration of devm_cxl_iomap_block()Robert Richter1-0/+2
2022-02-08cxl/regs: Fix size of CXL Capability Header RegisterJonathan Cameron1-2/+2
2022-02-08cxl/core/hdm: Add CXL standard decoder enumeration to the coreDan Williams1-3/+2
2022-02-08cxl/pci: Rename pci.h to cxlpci.hDan Williams1-1/+1
2022-02-08cxl/core: Fix cxl_probe_component_regs() error messageDan Williams1-1/+1
2022-02-08cxl/acpi: Map component registers for Root PortsBen Widawsky1-0/+56
2021-11-15cxl/core: Convert to EXPORT_SYMBOL_NS_GPLDan Williams1-4/+4
2021-09-07cxl/registers: Fix Documentation warningDan Williams1-1/+14
2021-08-06cxl/core: Move register mapping infrastructureDan Williams1-0/+236
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