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path: root/drivers/crypto/hisilicon
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2024-09-06crypto: hisilicon/sec - Remove trailing space after \n newlineColin Ian King1-1/+1
There is a extraneous space after a newline in a dev_err message. Remove it. Signed-off-by: Colin Ian King <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-09-06crypto: hisilicon/qm - inject error before stopping queueWeili Qian1-23/+24
The master ooo cannot be completely closed when the accelerator core reports memory error. Therefore, the driver needs to inject the qm error to close the master ooo. Currently, the qm error is injected after stopping queue, memory may be released immediately after stopping queue, causing the device to access the released memory. Therefore, error is injected to close master ooo before stopping queue to ensure that the device does not access the released memory. Fixes: 6c6dd5802c2d ("crypto: hisilicon/qm - add controller reset interface") Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-09-06crypto: hisilicon/hpre - mask cluster timeout errorWeili Qian1-16/+6
The timeout threshold of the hpre cluster is 16ms. When the CPU and device share virtual address, page fault processing time may exceed the threshold. In the current test, there is a high probability that the cluster times out. However, the cluster is waiting for the completion of memory access, which is not an error, the device does not need to be reset. If an error occurs in the cluster, qm also reports the error. Therefore, the cluster timeout error of hpre can be masked. Fixes: d90fab0deb8e ("crypto: hisilicon/qm - get error type from hardware registers") Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-09-06crypto: hisilicon/qm - reset device before enabling itWeili Qian4-64/+121
Before the device is enabled again, the device may still store the previously processed data. If an error occurs in the previous task, the device may fail to be enabled again. Therefore, before enabling device, reset the device to restore the initial state. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-09-06crypto: hisilicon/trng - modifying the order of header filesChenghai Huang1-2/+2
Header files is included Order-ref: standard library headers, OS library headers, and project-specific headers. This patch modifies the order of header files according to suggestions. In addition, use %u to print unsigned int variables to prevent overflow. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-09-06crypto: hisilicon - add a lock for the qp send operationChenghai Huang2-0/+5
Apply for a lock before the qp send operation to ensure no resource race in multi-concurrency situations. This modification has almost no impact on performance. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-09-06crypto: hisilicon - fix missed error branchYang Shen1-4/+10
If an error occurs in the process after the SGL is mapped successfully, it need to unmap the SGL. Otherwise, memory problems may occur. Signed-off-by: Yang Shen <[email protected]> Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-08-30crypto: hisilicon/zip - Optimize performance by replacing rw_lock with spinlockKuan-Wei Chiu1-7/+7
The req_lock is currently implemented as a rw_lock, but there are no instances where read_lock() is called. This means that the lock is effectively only used by writers, making it functionally equivalent to a simple spinlock. As stated in Documentation/locking/spinlocks.rst: "Reader-writer locks require more atomic memory operations than simple spinlocks. Unless the reader critical section is long, you are better off just using spinlocks." Since the rw_lock in this case incurs additional atomic memory operations without any benefit from reader-writer locking, it is more efficient to replace it with a spinlock. This patch implements that replacement to optimize the driver's performance. Signed-off-by: Kuan-Wei Chiu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-06-07crypto: hisilicon/zip - optimize the address offset of the reg query functionChenghai Huang1-28/+20
Currently, the reg is queried based on the fixed address offset array. When the number of accelerator cores changes, the system can not flexibly respond to the change. Therefore, the reg to be queried is calculated based on the comp or decomp core base address. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-06-07crypto: hisilicon/qm - adjust the internal processing sequence of the vf ↵Chenghai Huang1-8/+3
enable and disable When the vf is enabled, the value of vfs_num must be assigned after the VF configuration is complete. Otherwise, the device may be accessed before the virtual configuration is complete, causing an error. When the vf is disabled, clear vfs_num and execute qm_pm_put_sync before hisi_qm_sriov_disable is return. Otherwise, if qm_clear_vft_config fails, users may access the device when the PCI virtualization is disabled, resulting in an error. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-05-03crypto: hisilicon/sec2 - fix for register offsetWenkai Lin1-1/+1
The offset of SEC_CORE_ENABLE_BITMAP should be 0 instead of 32, it cause a kasan shift-out-bounds warning, fix it. Signed-off-by: Wenkai Lin <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-05-03crypto: hisilicon/debugfs - mask the unnecessary info from the dumpChenghai Huang3-13/+22
Some information showed by the dump function is invalid. Mask the unnecessary information from the dump file. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/qm - Add the err memory release process to qm uninitChenghai Huang1-4/+1
When the qm uninit command is executed, the err data needs to be released to prevent memory leakage. The error information release operation and uacce_remove are integrated in qm_remove_uacce. So add the qm_remove_uacce to qm uninit to avoid err memory leakage. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/debugfs - Resolve the problem of applying for redundant ↵Chenghai Huang1-6/+5
space in sq dump When dumping SQ, only the corresponding ID's SQE needs to be dumped, and there is no need to apply for the entire SQE memory. This is because excessive dump operations can lead to memory resource waste. Therefor apply for the space corresponding to sqe_id separately to avoid space waste. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/sec - Fix memory leak for sec resource releaseChenghai Huang1-1/+3
The AIV is one of the SEC resources. When releasing resources, it need to release the AIV resources at the same time. Otherwise, memory leakage occurs. The aiv resource release is added to the sec resource release function. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon - Adjust debugfs creation and release orderChenghai Huang3-36/+32
There is a scenario where the file directory is created but the file memory is not set. In this case, if a user accesses the file, an error occurs. So during the creation process of debugfs, memory should be allocated first before creating the directory. In the release process, the directory should be deleted first before releasing the memory to avoid the situation where the memory does not exist when accessing the directory. In addition, the directory released by the debugfs is a global variable. When the debugfs of an accelerator fails to be initialized, releasing the directory of the global variable affects the debugfs initialization of other accelerators. The debugfs root directory released by debugfs init should be a member of qm, not a global variable. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/qm - Add the default processing branchChenghai Huang1-0/+3
The cmd type can be extended. Currently, only four types of cmd can be processed. Therefor, add the default processing branch to intercept incorrect parameter input. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/debugfs - Fix the processing logic issue in the debugfs ↵Chenghai Huang1-3/+3
creation There is a scenario where the file directory is created but the file attribute is not set. In this case, if a user accesses the file, an error occurs. So adjust the processing logic in the debugfs creation to prevent the file from being accessed before the file attributes such as the index are set. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/sgl - Delete redundant parameter verificationChenghai Huang1-4/+1
The input parameter check in acc_get_sgl is redundant. The caller has been verified once. When the check is performed for multiple times, the performance deteriorates. So the redundant parameter verification is deleted, and the index verification is changed to the module entry function for verification. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/debugfs - Fix debugfs uninit process issueChenghai Huang1-3/+18
During the zip probe process, the debugfs failure does not stop the probe. When debugfs initialization fails, jumping to the error branch will also release regs, in addition to its own rollback operation. As a result, it may be released repeatedly during the regs uninit process. Therefore, the null check needs to be added to the regs uninit process. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-04-12crypto: hisilicon/sec - Add the condition for configuring the sriov functionChenghai Huang1-1/+2
When CONFIG_PCI_IOV is disabled, the SRIOV configuration function is not required. An error occurs if this function is incorrectly called. Consistent with other modules, add the condition for configuring the sriov function of sec_pci_driver. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-03-08crypto: hisilicon/zip - fix the missing CRYPTO_ALG_ASYNC in cra_flagsBarry Song1-0/+1
Add the missing CRYPTO_ALG_ASYNC flag since hisilizon zip driver works asynchronously. Cc: Zhou Wang <[email protected]> Signed-off-by: Barry Song <[email protected]> Acked-by: Yang Shen <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-17crypto: hisilicon/qm - change function type to voidWeili Qian1-27/+11
The function qm_stop_qp_nolock() always return zero, so function type is changed to void. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-17crypto: hisilicon/qm - obtain stop queue statusWeili Qian2-26/+87
The debugfs files 'dev_state' and 'dev_timeout' are added. Users can query the current queue stop status through these two files. And set the waiting timeout when the queue is released. dev_state: if dev_timeout is set, dev_state indicates the status of stopping the queue. 0 indicates that the queue is stopped successfully. Other values indicate that the queue stops fail. If dev_timeout is not set, the value of dev_state is 0; dev_timeout: if the queue fails to stop, the queue is released after waiting dev_timeout * 20ms. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-17crypto: hisilicon/qm - add stop function by hardwareWeili Qian1-8/+32
Hardware V3 could be able to drain function by sending mailbox to hardware which will trigger tasks in device to be flushed out. When the function is reset, the function can be stopped by this way. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-02crypto: hisilicon/sec - remove unused parameterWenkai Lin1-10/+6
Unused parameter of static functions should be removed. Signed-off-by: Wenkai Lin <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-02crypto: hisilicon/sec2 - fix some cleanup issuesQi Tao1-2/+2
This patch fixes following cleanup issues: - The return value of the function is inconsistent with the actual return type. - After the pointer type is directly converted to the `__le64` type, the program may crash or produce unexpected results. Signed-off-by: Qi Tao <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-02crypto: hisilicon/sec2 - modify nested macro callQi Tao1-9/+4
Nested macros are integrated into a single macro, making the code simpler. Signed-off-by: Qi Tao <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-02-02crypto: hisilicon/sec2 - updates the sec DFX function registerQi Tao1-0/+5
As the sec DFX function is enhanced, some RAS registers are added to the original DFX registers to enhance the DFX positioning function. Signed-off-by: Qi Tao <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-01-26crypto: hisilicon - Fix smp_processor_id() warningsWenkai Lin3-3/+3
Switch to raw_smp_processor_id() to prevent a number of warnings from kernel debugging. We do not care about preemption here, as the CPU number is only used as a poor mans load balancing or device selection. If preemption happens during an encrypt/decrypt operation a small performance hit will occur but everything will continue to work, so just ignore it. This commit is similar to e7a9b05ca4 ("crypto: cavium - Fix smp_processor_id() warnings"). [ 7538.874350] BUG: using smp_processor_id() in preemptible [00000000] code: af_alg06/8438 [ 7538.874368] caller is debug_smp_processor_id+0x1c/0x28 [ 7538.874373] CPU: 50 PID: 8438 Comm: af_alg06 Kdump: loaded Not tainted 5.10.0.pc+ #18 [ 7538.874377] Call trace: [ 7538.874387] dump_backtrace+0x0/0x210 [ 7538.874389] show_stack+0x2c/0x38 [ 7538.874392] dump_stack+0x110/0x164 [ 7538.874394] check_preemption_disabled+0xf4/0x108 [ 7538.874396] debug_smp_processor_id+0x1c/0x28 [ 7538.874406] sec_create_qps+0x24/0xe8 [hisi_sec2] [ 7538.874408] sec_ctx_base_init+0x20/0x4d8 [hisi_sec2] [ 7538.874411] sec_aead_ctx_init+0x68/0x180 [hisi_sec2] [ 7538.874413] sec_aead_sha256_ctx_init+0x28/0x38 [hisi_sec2] [ 7538.874421] crypto_aead_init_tfm+0x54/0x68 [ 7538.874423] crypto_create_tfm_node+0x6c/0x110 [ 7538.874424] crypto_alloc_tfm_node+0x74/0x288 [ 7538.874426] crypto_alloc_aead+0x40/0x50 [ 7538.874431] aead_bind+0x50/0xd0 [ 7538.874433] alg_bind+0x94/0x148 [ 7538.874439] __sys_bind+0x98/0x118 [ 7538.874441] __arm64_sys_bind+0x28/0x38 [ 7538.874445] do_el0_svc+0x88/0x258 [ 7538.874447] el0_svc+0x1c/0x28 [ 7538.874449] el0_sync_handler+0x8c/0xb8 [ 7538.874452] el0_sync+0x148/0x180 Signed-off-by: Wenkai Lin <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-01-26crypto: hisilicon/qm - dump important registers values before resettingWeili Qian1-0/+24
Read the values of some device registers before the device is reset, these values help analyze the cause of the device exception. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-01-26crypto: hisilicon/qm - support get device stateWeili Qian1-0/+29
Support get device current state. The value 0 indicates that the device is busy, and the value 1 indicates that the device is idle. When the device is in suspended, 1 is returned. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2024-01-10Merge tag 'v6.8-p1' of ↵Linus Torvalds10-364/+445
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 Pull crypto updates from Herbert Xu: "API: - Add incremental lskcipher/skcipher processing Algorithms: - Remove SHA1 from drbg - Remove CFB and OFB Drivers: - Add comp high perf mode configuration in hisilicon/zip - Add support for 420xx devices in qat - Add IAA Compression Accelerator driver" * tag 'v6.8-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (172 commits) crypto: iaa - Account for cpu-less numa nodes crypto: scomp - fix req->dst buffer overflow crypto: sahara - add support for crypto_engine crypto: sahara - remove error message for bad aes request size crypto: sahara - remove unnecessary NULL assignments crypto: sahara - remove 'active' flag from sahara_aes_reqctx struct crypto: sahara - use dev_err_probe() crypto: sahara - use devm_clk_get_enabled() crypto: sahara - use BIT() macro crypto: sahara - clean up macro indentation crypto: sahara - do not resize req->src when doing hash operations crypto: sahara - fix processing hash requests with req->nbytes < sg->length crypto: sahara - improve error handling in sahara_sha_process() crypto: sahara - fix wait_for_completion_timeout() error handling crypto: sahara - fix ahash reqsize crypto: sahara - handle zero-length aes requests crypto: skcipher - remove excess kerneldoc members crypto: shash - remove excess kerneldoc members crypto: qat - generate dynamically arbiter mappings crypto: qat - add support for ring pair level telemetry ...
2024-01-08mm, treewide: rename MAX_ORDER to MAX_PAGE_ORDERKirill A. Shutemov1-3/+3
commit 23baf831a32c ("mm, treewide: redefine MAX_ORDER sanely") has changed the definition of MAX_ORDER to be inclusive. This has caused issues with code that was not yet upstream and depended on the previous definition. To draw attention to the altered meaning of the define, rename MAX_ORDER to MAX_PAGE_ORDER. Link: https://lkml.kernel.org/r/[email protected] Signed-off-by: Kirill A. Shutemov <[email protected]> Cc: Linus Torvalds <[email protected]> Signed-off-by: Andrew Morton <[email protected]>
2023-12-15crypto: hisilicon/sec2 - optimize the error return processChenghai Huang1-2/+5
Add the printf of an error message and optimized the handling process of ret. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-15crypto: hisilicon/qm - delete a dbg functionChenghai Huang1-3/+0
Deleted a dbg function because this function has the risk of address leakage. In addition, this function is only used for debugging in the early stage and is not required in the future. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-08crypto: hisilicon/sec2 - Remove cfb and ofbHerbert Xu3-29/+1
Remove the unused CFB/OFB implementation. Signed-off-by: Herbert Xu <[email protected]>
2023-12-08crypto: hisilicon/zip - save capability registers in probe processZhiqi Song1-13/+60
Pre-store the valid value of the zip alg support related capability register in hisi_zip_qm_init(), which will be called by hisi_zip_probe(). It can reduce the number of capability register queries and avoid obtaining incorrect values in abnormal scenarios, such as reset failed and the memory space disabled. Fixes: db700974b69d ("crypto: hisilicon/zip - support zip capability") Signed-off-by: Zhiqi Song <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-08crypto: hisilicon/sec2 - save capability registers in probe processZhiqi Song3-5/+55
Pre-store the valid value of the sec alg support related capability register in sec_qm_init(), which will be called by probe process. It can reduce the number of capability register queries and avoid obtaining incorrect values in abnormal scenarios, such as reset failed and the memory space disabled. Fixes: 921715b6b782 ("crypto: hisilicon/sec - get algorithm bitmap from registers") Signed-off-by: Zhiqi Song <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-08crypto: hisilicon/hpre - save capability registers in probe processZhiqi Song1-18/+64
Pre-store the valid value of hpre alg support related capability register in hpre_qm_init(), which will be called by hpre_probe(). It can reduce the number of capability register queries and avoid obtaining incorrect values in abnormal scenarios, such as reset failed and the memory space disabled. Fixes: f214d59a0603 ("crypto: hisilicon/hpre - support hpre capability") Signed-off-by: Zhiqi Song <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-08crypto: hisilicon/qm - save capability registers in qm init processZhiqi Song1-10/+52
In previous capability register implementation, qm irq related values were read from capability registers dynamically when needed. But in abnormal scenario, e.g. the core is timeout and the device needs to soft reset and reset failed after disabling the MSE, the device can not be removed normally, causing the following call trace: | Call trace: | pci_irq_vector+0xfc/0x140 | hisi_qm_uninit+0x278/0x3b0 [hisi_qm] | hpre_remove+0x16c/0x1c0 [hisi_hpre] | pci_device_remove+0x6c/0x264 | device_release_driver_internal+0x1ec/0x3e0 | device_release_driver+0x3c/0x60 | pci_stop_bus_device+0xfc/0x22c | pci_stop_and_remove_bus_device+0x38/0x70 | pci_iov_remove_virtfn+0x108/0x1c0 | sriov_disable+0x7c/0x1e4 | pci_disable_sriov+0x4c/0x6c | hisi_qm_sriov_disable+0x90/0x160 [hisi_qm] | hpre_remove+0x1a8/0x1c0 [hisi_hpre] | pci_device_remove+0x6c/0x264 | device_release_driver_internal+0x1ec/0x3e0 | driver_detach+0x168/0x2d0 | bus_remove_driver+0xc0/0x230 | driver_unregister+0x58/0xdc | pci_unregister_driver+0x40/0x220 | hpre_exit+0x34/0x64 [hisi_hpre] | __arm64_sys_delete_module+0x374/0x620 [...] | Call trace: | free_msi_irqs+0x25c/0x300 | pci_disable_msi+0x19c/0x264 | pci_free_irq_vectors+0x4c/0x70 | hisi_qm_pci_uninit+0x44/0x90 [hisi_qm] | hisi_qm_uninit+0x28c/0x3b0 [hisi_qm] | hpre_remove+0x16c/0x1c0 [hisi_hpre] | pci_device_remove+0x6c/0x264 [...] The reason for this call trace is that when the MSE is disabled, the value of capability registers in the BAR space become invalid. This will make the subsequent unregister process get the wrong irq vector through capability registers and get the wrong irq number by pci_irq_vector(). So add a capability table structure to pre-store the valid value of the irq information capability register in qm init process, avoid obtaining invalid capability register value after the MSE is disabled. Fixes: 3536cc55cada ("crypto: hisilicon/qm - support get device irq information from hardware registers") Signed-off-by: Zhiqi Song <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-08crypto: hisilicon/qm - add a function to set qm algsWenkai Lin4-119/+55
Extract a public function to set qm algs and remove the similar code for setting qm algs in each module. Signed-off-by: Wenkai Lin <[email protected]> Signed-off-by: Hao Fang <[email protected]> Signed-off-by: Zhiqi Song <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-01crypto: hisilicon/qm - add comments and remove redundant array elementWeili Qian1-1/+10
1. Remove redundant array element, prevent the size obtained by ARRAY_SIZE() from qm_log_hw_error is greater than actual size. 2. Add comments in function qm_set_vf_mse() and qm_cq_ctx_cfg() to make it easier to understand. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-01crypto: hisilicon/qm - simplify the status of qmWeili Qian3-118/+20
The 'QM_INIT' and 'QM_CLOSE' status of qm and 'QP_INIT' and 'QP_CLOSE' status of queue are not actually used. Currently, driver only needs to switch status when the device or queue is enabled or stopped, Therefore, remove unneeded status to simplify driver. In addition, rename'QM_START to'QM_WORK' for ease to understand. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-01crypto: hisilicon/sgl - small cleanups for sgl.cWeili Qian1-5/+7
1. Remove unnecessary brackets in function hisi_acc_create_sgl_pool(). 2. Modify local variable type, ensure that the variable type is consistent with the variable type to be compared. 3. Because the function clear_hw_sgl_sge() is in the task process, obtain the value of le16_to_cpu(hw_sgl->entry_sum_in_sgl) before loop execting to shorten the loop execution time. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-12-01crypto: hisilicon/zip - add zip comp high perf mode configurationChenghai Huang1-0/+65
To meet specific application scenarios, the function of switching between the high performance mode and the high compression mode is added. Use the perf_mode=0/1 configuration to set the compression high perf mode, 0(default, high compression mode), 1(high performance mode). These two modes only apply to the compression direction and are compatible with software algorithm in both directions. Signed-off-by: Chenghai Huang <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-11-17crypto: hisilicon/qm - remove incorrect type castWeili Qian2-52/+52
The 'offset' type is unsigned long in 'struct debugfs_reg32', so type of values casts to unsigned long long is incorrect, and the values do not require type cast, remove them. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-11-17crypto: hisilicon/qm - print device abnormal informationWeili Qian1-6/+16
When device is abnormal and reports abnormal interrupt event to driver, the driver can print device information for error analysis. This patch adds some device error-related information output after the device reports an abnormal interrupt. Signed-off-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-10-27crypto: hisilicon/qm - prevent soft lockup in receive loopLongfang Liu1-0/+2
In the scenario where the accelerator business is fully loaded. When the workqueue receiving messages and performing callback processing, there are a large number of messages that need to be received, and there are continuously messages that have been processed and need to be received. This will cause the receive loop here to be locked for a long time. This scenario will cause watchdog timeout problems on OS with kernel preemption turned off. The error logs: watchdog: BUG: soft lockup - CPU#23 stuck for 23s! [kworker/u262:1:1407] [ 1461.978428][ C23] Call trace: [ 1461.981890][ C23] complete+0x8c/0xf0 [ 1461.986031][ C23] kcryptd_async_done+0x154/0x1f4 [dm_crypt] [ 1461.992154][ C23] sec_skcipher_callback+0x7c/0xf4 [hisi_sec2] [ 1461.998446][ C23] sec_req_cb+0x104/0x1f4 [hisi_sec2] [ 1462.003950][ C23] qm_poll_req_cb+0xcc/0x150 [hisi_qm] [ 1462.009531][ C23] qm_work_process+0x60/0xc0 [hisi_qm] [ 1462.015101][ C23] process_one_work+0x1c4/0x470 [ 1462.020052][ C23] worker_thread+0x150/0x3c4 [ 1462.024735][ C23] kthread+0x108/0x13c [ 1462.028889][ C23] ret_from_fork+0x10/0x18 Therefore, it is necessary to add an actively scheduled operation in the while loop to prevent this problem. After adding it, no matter whether the OS turns on or off the kernel preemption function. Neither will cause watchdog timeout issues. Signed-off-by: Longfang Liu <[email protected]> Signed-off-by: Herbert Xu <[email protected]>
2023-10-27crypto: hisilicon/trng - Convert to platform remove callback returning voidUwe Kleine-König1-4/+2
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is ignored (apart from emitting a warning) and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new(), which already returns void. Eventually after all drivers are converted, .remove_new() will be renamed to .remove(). Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <[email protected]> Reviewed-by: Weili Qian <[email protected]> Signed-off-by: Herbert Xu <[email protected]>