blaster4385/linux-IllusionX - Linux kernel with personal config changes for arch linux

Age	Commit message (Expand)	Author	Files	Lines
2022-11-05	clk: qcom: gcc-ipq806x: use parent_data for the last remaining entry	Dmitry Baryshkov	1	-1/+3
2022-11-04	clk: qcom: gdsc: Remove direct runtime PM calls	Stephen Boyd	2	-57/+6
2022-11-01	clk: samsung: Fix reference to CLK_OF_DECLARE in comment	Jonathan Neuschäfer	1	-2/+2
2022-11-01	clk: Add Ingenic JZ4755 CGU driver	Siarhei Volkau	3	-0/+357
2022-11-01	clk: renesas: r9a06g032: Repair grave increment error	Marek Vasut	1	-2/+1
2022-10-28	clk: renesas: rzg2l: Don't assume all CPG_MOD clocks support PM	Lad Prabhakar	2	-15/+28
2022-10-28	firmware: raspberrypi: Move the clock IDs to the firmware header	Maxime Ripard	1	-19/+0
2022-10-27	clk: qcom: Update the force mem core bit for GPU clocks	Taniya Das	2	-0/+2
2022-10-27	clk: Initialize max_rate in struct clk_rate_request	Maxime Ripard	1	-0/+1
2022-10-27	clk: Initialize the clk_rate_request even if clk_core is NULL	Maxime Ripard	1	-1/+4
2022-10-27	clk: Remove WARN_ON NULL parent in clk_core_init_rate_req()	Maxime Ripard	1	-1/+1
2022-10-27	clk: stm32mp1: Staticize ethrx_src	Marek Vasut	1	-1/+1
2022-10-27	clk: ingenic: Minor cosmetic fixups for X1000	Aidan MacDonald	1	-25/+24
2022-10-27	clk: ingenic: Add X1000 audio clocks	Aidan MacDonald	1	-0/+70
2022-10-27	clk: ingenic: Add .set_rate_hook() for PLL clocks	Aidan MacDonald	2	-0/+7
2022-10-27	clk: ingenic: Make PLL clock enable_bit and stable_bit optional	Aidan MacDonald	2	-5/+19
2022-10-27	clk: ingenic: Make PLL clock "od" field optional	Aidan MacDonald	2	-9/+19
2022-10-27	clk: mstar: msc313 cpupll clk driver	Daniel Palmer	3	-0/+228
2022-10-26	clk: mxl: syscon_node_to_regmap() returns error pointers	Rahul Tanwar	1	-1/+1
2022-10-26	Merge tag 'renesas-clk-fixes-for-v6.1-tag1' of git://git.kernel.org/pub/scm/l...	Stephen Boyd	1	-4/+9
2022-10-26	clk: renesas: rzg2l: Fix typo in struct rzg2l_cpg_priv kerneldoc	Lad Prabhakar	1	-1/+1
2022-10-26	clk: renesas: r8a779a0: Fix SD0H clock name	Wolfram Sang	1	-1/+1
2022-10-26	clk: renesas: r8a779g0: Add RPC-IF clock	Geert Uytterhoeven	1	-1/+2
2022-10-26	clk: renesas: r8a779g0: Add SDHI clocks	Geert Uytterhoeven	1	-1/+3
2022-10-26	clk: renesas: r8a779f0: Add SASYNCPER internal clock	Geert Uytterhoeven	1	-3/+5
2022-10-26	clk: renesas: r8a779f0: Fix SD0H clock name	Geert Uytterhoeven	1	-1/+1
2022-10-26	clk: renesas: r9a07g043: Drop WDT2 clock and reset entry	Lad Prabhakar	1	-5/+0
2022-10-26	clk: renesas: r9a07g044: Drop WDT2 clock and reset entry	Lad Prabhakar	1	-6/+1
2022-10-26	clk: renesas: r8a779g0: Add TPU clock	Geert Uytterhoeven	1	-0/+1
2022-10-26	clk: renesas: r8a779g0: Add PWM clock	Geert Uytterhoeven	1	-0/+1
2022-10-26	clk: renesas: r8a779g0: Add SCIF clocks	Geert Uytterhoeven	1	-0/+4
2022-10-26	Merge tag 'renesas-clk-fixes-for-v6.1-tag1'	Geert Uytterhoeven	1	-4/+9
2022-10-26	clk: renesas: r8a779g0: Fix HSCIF parent clocks	Geert Uytterhoeven	1	-4/+4
2022-10-18	clk: samsung: exynos7885: Correct "div4" clock parents	David Virag	1	-2/+2
2022-10-18	clk: renesas: r8a779g0: Add SASYNCPER clocks	Geert Uytterhoeven	1	-0/+5
2022-10-17	clk: keystone: syscon-clk: Use dev_err_probe() helper	Yang Yingliang	1	-6/+3
2022-10-17	clk: bulk: Use dev_err_probe() helper in __clk_bulk_get()	Yang Yingliang	1	-3/+3
2022-10-17	clk: cdce925: simplify using devm_regulator_get_enable()	Matti Vaittinen	1	-17/+4
2022-10-17	clk: xilinx: Drop duplicate depends on COMMON_CLK	Stephen Boyd	1	-2/+2
2022-10-17	clk: mxl: Fix a clk entry by adding relevant flags	Rahul Tanwar	3	-4/+6
2022-10-17	clk: mxl: Add option to override gate clks	Rahul Tanwar	2	-1/+16
2022-10-17	clk: mxl: Remove redundant spinlocks	Rahul Tanwar	4	-91/+9
2022-10-17	clk: mxl: Switch from direct readl/writel based IO to regmap based IO	Rahul Tanwar	5	-29/+42
2022-10-17	clk: mediatek: clk-mt8195-topckgen: Fix error return code in clk_mt8195_topck...	Yang Yingliang	1	-1/+3
2022-10-17	clk: sifive: select by default if SOC_SIFIVE	Conor Dooley	1	-1/+3
2022-10-17	clk: rs9: Fix I2C accessors	Marek Vasut	1	-3/+62
2022-10-17	clk: renesas: r9a07g044: Add MTU3a clock and reset entry	Biju Das	1	-1/+4
2022-10-17	clk: renesas: r8a779g0: Add INTC-EX clock	Geert Uytterhoeven	1	-0/+1
2022-10-17	clk: renesas: r8a779g0: Add MSIOF clocks	Geert Uytterhoeven	1	-0/+6
2022-10-17	clk: renesas: r8a779g0: Add SYS-DMAC clocks	Geert Uytterhoeven	1	-0/+2