| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2022-10-17 | clk: mxl: Switch from direct readl/writel based IO to regmap based IO | Rahul Tanwar | 1 | -2/+3 | |
| Earlier version of driver used direct io remapped register read writes using readl/writel. But we need secure boot access which is only possible when registers are read & written using regmap. This is because the security bus/hook is written & coupled only with regmap layer. Switch the driver from direct readl/writel based register accesses to regmap based register accesses. Additionally, update the license headers to latest status. Reviewed-by: Yi xin Zhu <[email protected]> Signed-off-by: Rahul Tanwar <[email protected]> Link: https://lore.kernel.org/r/2610331918206e0e3bd18babb39393a558fb34f9.1665642720.git.rtanwar@maxlinear.com Signed-off-by: Stephen Boyd <[email protected]> | |||||
| 2020-05-26 | clk: intel: Add CGU clock driver for a new SoC | Rahul Tanwar | 1 | -0/+8 | |
| Clock Generation Unit(CGU) is a new clock controller IP of a forthcoming Intel network processor SoC named Lightning Mountain(LGM). It provides programming interfaces to control & configure all CPU & peripheral clocks. Add common clock framework based clock controller driver for CGU. Signed-off-by: Rahul Tanwar <[email protected]> Link: https://lkml.kernel.org/r/42a4f71847714df482bacffdcd84341a4052800b.1587102634.git.rahul.tanwar@linux.intel.com [[email protected]: Kill init function to alloc and cleanup newline] Signed-off-by: Stephen Boyd <[email protected]> | |||||