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2023-07-19clk: starfive: Add StarFive JH7110 Video-Output clock driverXingyu Wu1-0/+1
Add driver for the StarFive JH7110 Video-Output clock controller. And these clock controllers should power on and enable the clocks from SYSCRG first before registering. Acked-by: Palmer Dabbelt <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Reviewed-by: Hal Feng <[email protected]> Signed-off-by: Xingyu Wu <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2023-07-19clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driverXingyu Wu1-0/+1
Add driver for the StarFive JH7110 Image-Signal-Process clock controller. And these clock controllers should power on and enable the clocks from SYSCRG before registering. Acked-by: Palmer Dabbelt <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Reviewed-by: Hal Feng <[email protected]> Signed-off-by: Xingyu Wu <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2023-07-19clk: starfive: Add StarFive JH7110 System-Top-Group clock driverEmil Renner Berthing1-0/+1
Add driver for the StarFive JH7110 System-Top-Group clock controller. Acked-by: Palmer Dabbelt <[email protected]> Reviewed-by: Hal Feng <[email protected]> Co-developed-by: Xingyu Wu <[email protected]> Signed-off-by: Xingyu Wu <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2023-07-19clk: starfive: Add StarFive JH7110 PLL clock driverXingyu Wu1-0/+1
Add driver for the StarFive JH7110 PLL clock controller and they work by reading and setting syscon registers. Co-developed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Xingyu Wu <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2023-04-05clk: starfive: Add StarFive JH7110 always-on clock driverEmil Renner Berthing1-0/+1
Add driver for the StarFive JH7110 always-on clock controller and register an auxiliary device for always-on reset controller which is named as "rst-aon". Tested-by: Tommaso Merciai <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]> Co-developed-by: Hal Feng <[email protected]> Signed-off-by: Hal Feng <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2023-04-05clk: starfive: Add StarFive JH7110 system clock driverEmil Renner Berthing1-0/+2
Add driver for the StarFive JH7110 system clock controller and register an auxiliary device for system reset controller which is named as "rst-sys". Tested-by: Tommaso Merciai <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]> Co-developed-by: Hal Feng <[email protected]> Signed-off-by: Hal Feng <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2023-04-05clk: starfive: Factor out common JH7100 and JH7110 codeEmil Renner Berthing1-1/+2
The clock control registers on the StarFive JH7100 and JH7110 work identically, so factor out the code then drivers for the two SoCs can share it without depending on each other. No functional change. Tested-by: Tommaso Merciai <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Reviewed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]> Signed-off-by: Hal Feng <[email protected]> Signed-off-by: Conor Dooley <[email protected]>
2022-03-10clk: starfive: Add JH7100 audio clock driverEmil Renner Berthing1-0/+1
Add a driver for the audio clocks on the Starfive JH7100 RISC-V SoC. Signed-off-by: Emil Renner Berthing <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
2021-12-16clk: starfive: Add JH7100 clock generator driverGeert Uytterhoeven1-0/+3
Add a driver for the StarFive JH7100 clock generator. Reviewed-by: Andy Shevchenko <[email protected]> Acked-by: Stephen Boyd <[email protected]> Signed-off-by: Geert Uytterhoeven <[email protected]> Co-developed-by: Emil Renner Berthing <[email protected]> Signed-off-by: Emil Renner Berthing <[email protected]>