Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2023-07-10 | clk: renesas: r9a09g011: Add CSI related clocks | Fabrizio Castro | 1 | -0/+15 |
2022-12-27 | clk: renesas: r9a09g011: Add SDHI/eMMC clock and reset entries | Phil Edworthy | 1 | -0/+20 |
2022-12-27 | clk: renesas: r9a09g011: Add USB clock and reset entries | Biju Das | 1 | -0/+21 |
2022-12-27 | clk: renesas: r9a09g011: Add TIM clock and reset entries | Biju Das | 1 | -0/+22 |
2022-12-26 | clk: renesas: r9a09g011: Add PWM clock and reset entries | Biju Das | 1 | -0/+10 |
2022-08-29 | clk: renesas: r9a09g011: Add IIC clock and reset entries | Phil Edworthy | 1 | -0/+4 |
2022-06-06 | clk: renesas: r9a09g011: Add WDT clock and reset entries | Phil Edworthy | 1 | -0/+3 |
2022-06-06 | clk: renesas: r9a09g011: Add PFC clock and reset entries | Phil Edworthy | 1 | -0/+2 |
2022-05-06 | clk: renesas: r9a09g011: Add eth clock and reset entries | Phil Edworthy | 1 | -5/+9 |
2022-05-06 | clk: renesas: Add RZ/V2M support using the rzg2l driver | Phil Edworthy | 1 | -0/+168 |