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2024-08-15clk: qcom: Add GPUCC driver support for SM4450Ajit Pandey1-0/+1
Add Graphics Clock Controller (GPUCC) support for SM4450 platform. Signed-off-by: Ajit Pandey <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-15clk: qcom: Add CAMCC driver support for SM4450Ajit Pandey1-0/+1
Add Camera Clock Controller (CAMCC) support for SM4450 platform. Signed-off-by: Ajit Pandey <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-15clk: qcom: Add DISPCC driver support for SM4450Ajit Pandey1-0/+1
Add Display Clock Controller (DISPCC) support for SM4450 platform. Signed-off-by: Ajit Pandey <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31clk: qcom: fold dispcc-sm8650 info dispcc-sm8550Dmitry Baryshkov1-1/+0
There is a very minor difference between display clock controller drivers for SM8550 and SM8650 platforms. Fold the second one into the first one to reduce kernel footprint. The bindings for these two hardware blocks are fully compatible. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-07-31clk: qcom: Add camera clock controller driver for SM8150Satya Priya Kakitapalli1-0/+1
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SM8150 platform. Reviewed-by: Bryan O'Donoghue <[email protected]> Signed-off-by: Satya Priya Kakitapalli <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-06-25Merge branch '[email protected]' into clk-for-6.11Bjorn Andersson1-0/+1
Merge SM8650 video and camera clock drivers through topic branch, to make available the DeviceTree binding includes to the DeviceTree source branches as well.
2024-06-25clk: qcom: camcc-sm8650: Add SM8650 camera clock controller driverJagadeesh Kona1-0/+1
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SM8650 platform. Signed-off-by: Jagadeesh Kona <[email protected]> Reviewed-by: Bryan O'Donoghue <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Vladimir Zapolskiy <[email protected]> Tested-by: Vladimir Zapolskiy <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-06-13clk: qcom: Add QCM2290 GPU clock controller driverKonrad Dybcio1-0/+1
Add a driver for the GPU clock controller block found on the QCM2290 SoC. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-06-12clk: qcom: add clock controller driver for qca8386/qca8084Luo Jie1-0/+1
The clock controller driver of qca8386/qca8084 is registered as the MDIO device, the hardware register is accessed by MDIO bus that is normally used to access general PHY device, which is different from the current existed qcom clock controller drivers using ioremap to access hardware clock registers, nsscc-qca8k is accessed via an MDIO bus. MDIO bus is commonly utilized by both qca8386/qca8084 and other PHY devices, so the mutex lock mdio_bus->mdio_lock should be used instead of using the mutex lock of remap. To access the hardware clock registers of qca8386/qca8084, there is a special MDIO frame sequence, which needs to be sent to the device. Enable the reference clock before resetting the clock controller, the reference clock rate is fixed to 50MHZ. Reviewed-by: Bryan O'Donoghue <[email protected]> Signed-off-by: Luo Jie <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-05-27clk: qcom: Add Video Clock Controller driver for SM7150Danila Tikhonov1-0/+1
Add support for the video clock controller found on SM7150. Signed-off-by: Danila Tikhonov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-05-27clk: qcom: Add Camera Clock Controller driver for SM7150Danila Tikhonov1-0/+1
Add support for the camera clock controller found on SM7150. Signed-off-by: Danila Tikhonov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-05-27clk: qcom: Add Display Clock Controller driver for SM7150Danila Tikhonov1-0/+1
Add support for the display clock controller found on SM7150. Co-developed-by: David Wronek <[email protected]> Signed-off-by: David Wronek <[email protected]> Signed-off-by: Danila Tikhonov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-02-16clk: qcom: drop the SC7180 Modem subsystem clock driverDmitry Baryshkov1-1/+0
This driver has never been used in the DT files merged to the kernel. According to Sibi, it only worked on the pre-production devices. For the production devices this functionality has been moved to the firmware. Drop the driver to remove possible confusion. Cc: Sibi Sankar <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-02-06clk: qcom: Add camcc clock driver for x1e80100Rajendra Nayak1-0/+1
Add the camcc clock driver for x1e80100 Signed-off-by: Rajendra Nayak <[email protected]> Reviewed-by: Bryan O'Donoghue <[email protected]> Tested-by: Bryan O'Donoghue <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/20240202-x1e80100-clock-controllers-v4-10-7fb08c861c7c@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-02-06clk: qcom: Add TCSR clock driver for x1e80100Abel Vesa1-0/+1
The TCSR clock controller found on X1E80100 provides refclks for PCIE, USB and UFS. Add clock driver for it. Signed-off-by: Abel Vesa <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-02-06clk: qcom: Add GPU clock driver for x1e80100Rajendra Nayak1-0/+1
Add Graphics Clock Controller (GPUCC) support for X1E80100 platform. Signed-off-by: Rajendra Nayak <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-02-06clk: qcom: Add dispcc clock driver for x1e80100Rajendra Nayak1-0/+1
Add the dispcc clock driver for x1e80100. Signed-off-by: Rajendra Nayak <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: Add Global Clock controller (GCC) driver for X1E80100Rajendra Nayak1-0/+1
Add support for the global clock controller found on X1E80100 based devices. Co-developed-by: Abel Vesa <[email protected]> Signed-off-by: Abel Vesa <[email protected]> Signed-off-by: Rajendra Nayak <[email protected]> Co-developed-by: Sibi Sankar <[email protected]> Signed-off-by: Sibi Sankar <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Reviewed-by: Bryan O'Donoghue <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000Imran Shaik1-0/+1
Add ECPRI Clock Controller (ECPRICC) support for QDU1000 and QRU1000 SoCs. Signed-off-by: Imran Shaik <[email protected]> Acked-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: add the SM8650 GPU Clock Controller driverNeil Armstrong1-0/+1
Add Graphics Clock Controller (GPUCC) support for SM8650 platform. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-10-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: add the SM8650 Display Clock Controller driverNeil Armstrong1-0/+1
Add Display Clock Controller (DISPCC) support for SM8650 platform. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-9-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: add the SM8650 TCSR Clock Controller driverNeil Armstrong1-0/+1
Add TCSR Clock Controller support for SM8650 platform. Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-8-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: add the SM8650 Global Clock Controller driver, part 2Neil Armstrong1-0/+1
Add Global Clock Controller (GCC) driver plumbing for the SM8650 platform. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-7-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2023-12-07clk: qcom: camcc-sc8280xp: Add sc8280xp CAMCCBryan O'Donoghue1-0/+1
Add the sc8280xp CAMCC driver which follows the sdm845 CAMCC lineage with additional CCI and IFE blocks and more granular clock parentage. Signed-off-by: Bryan O'Donoghue <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-09-20Merge branch '[email protected]' into clk-for-6.7Bjorn Andersson1-0/+1
Merge the SM4450 RPMHCC and GCC through a topic branch, to allow reuse of the defines from the DeviceTree binding in the DeviceTree source.
2023-09-20clk: qcom: Add GCC driver support for SM4450Ajit Pandey1-0/+1
Add Global Clock Controller (GCC) support for SM4450 platform. Signed-off-by: Ajit Pandey <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-09-19clk: qcom: camcc-sm8550: Add camera clock controller driver for SM8550Jagadeesh Kona1-0/+1
Add support for the camera clock controller for camera clients to be able to request for camcc clocks on SM8550 platform. Co-developed-by: Taniya Das <[email protected]> Signed-off-by: Taniya Das <[email protected]> Signed-off-by: Jagadeesh Kona <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-08-11clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018Sricharan Ramabadhran1-0/+1
Add support for the global clock controller found on IPQ5018 based devices. Acked-by: Konrad Dybcio <[email protected]> Co-developed-by: Varadarajan Narayanan <[email protected]> Signed-off-by: Varadarajan Narayanan <[email protected]> Co-developed-by: Gokul Sriram Palanisamy <[email protected]> Signed-off-by: Gokul Sriram Palanisamy <[email protected]> Signed-off-by: Sricharan Ramabadhran <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-07-31clk: qcom: drop lcc-mdm9615 in favour of lcc-msm8960Dmitry Baryshkov1-1/+0
The two LCC drivers, msm8960 and mdm9615 are almost the same. The only difference is the platform clock: msm8960/apq8064 use pxo, while mdm9615 uses cxo. Drop the lcc-mdm9615 in favour of using lcc-msm8960 instead. Reviewed-by: Neil Armstrong <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2023-06-13clk: qcom: Add lpass clock controller driver for SC8280XPSrinivas Kandagatla1-0/+1
Add support for the lpass clock controller found on SC8280XP based devices. This would allow lpass peripheral loader drivers to control the clocks and bring the subsystems out of reset. Currently this patch only supports resets as the Q6DSP is in control of LPASS IP which manages most of the clocks via Q6PRM service on GPR rpmsg channel. Signed-off-by: Srinivas Kandagatla <[email protected]> Reviewed-by: Johan Hovold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-26clk: qcom: gpucc-sm8550: Add support for graphics clock controllerJagadeesh Kona1-0/+1
Add support for gpucc driver on SM8550, which provides clocks for the graphics subsystem. Co-developed-by: Taniya Das <[email protected]> Signed-off-by: Taniya Das <[email protected]> Signed-off-by: Jagadeesh Kona <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-26clk: qcom: Add support for SM8450 GPUCCKonrad Dybcio1-0/+1
The GPUCC manages the clocks for the Adreno GPU found on the sm8450 SoCs. Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-24clk: qcom: Add GCC driver support for SDX75Imran Shaik1-0/+1
Add Global Clock Controller (GCC) support for SDX75 platform. Signed-off-by: Imran Shaik <[email protected]> Signed-off-by: Taniya Das <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-24clk: qcom: videocc-sm8550: Add video clock controller driver for SM8550Jagadeesh Kona1-0/+1
Add support for the video clock controller for video clients to be able to request for videocc clocks on SM8550 platform. Co-developed-by: Taniya Das <[email protected]> Signed-off-by: Taniya Das <[email protected]> Signed-off-by: Jagadeesh Kona <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-24clk: qcom: videocc-sm8450: Add video clock controller driver for SM8450Taniya Das1-0/+1
Add support for the video clock controller driver for peripheral clock clients to be able to request for video cc clocks. Signed-off-by: Taniya Das <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-05-24clk: qcom: Introduce SM8350 VIDEOCCKonrad Dybcio1-0/+1
Add support for the Video Clock Controller found on the SM8350 SoC. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-04-13clk: qcom: add the GPUCC driver for sa8775pShazad Hussain1-0/+1
Add the clock driver for the Qualcomm Graphics Clock control module. Signed-off-by: Shazad Hussain <[email protected]> [Bartosz: make ready for upstream] Co-developed-by: Bartosz Golaszewski <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-04-07clk: qcom: Add Global Clock Controller driver for IPQ9574Devi Priya1-0/+1
Add Global Clock Controller (GCC) driver for ipq9574 based devices Co-developed-by: Anusha Rao <[email protected]> Signed-off-by: Anusha Rao <[email protected]> Signed-off-by: Devi Priya <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-15clk: qcom: Add global clock controller driver for MSM8917Otto Pflüger1-0/+1
This driver provides clocks, resets and power domains needed for various components of the MSM8917 SoC and the very similar QM215 SoC. According to [1] in the downstream kernel, the GPU clock has a different source mapping on QM215 (gcc_gfx3d_map vs gcc_gfx3d_map_qm215). [1]: https://git.codelinaro.org/clo/la/kernel/msm-4.9/-/blob/LF.UM.8.6.2-28000-89xx.0/include/dt-bindings/clock/msm-clocks-hwio-8952.h#L298 Signed-off-by: Otto Pflüger <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-15clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoCKathiravan T1-0/+1
Add support for the global clock controller found on IPQ5332 SoC. PLL used on IPQ5332 is of type Stromer Plus PLL, however the programming sequence is same as Stromer PLL, so lets re-use the Stromer PLL ops. Signed-off-by: Kathiravan T <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-13clk: qcom: Add Global Clock Controller (GCC) driver for SM7150Danila Tikhonov1-0/+1
Add support for the global clock controller found on SM7150 based devices. This should allow most non-multimedia device drivers to probe and control their clocks. Co-developed-by: David Wronek <[email protected]> Signed-off-by: David Wronek <[email protected]> Signed-off-by: Danila Tikhonov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-13clk: qcom: Add GPU clock controller driver for SM6115Konrad Dybcio1-0/+1
Add support for the GPU clock controller found on SM6115. Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-13clk: qcom: Add GPU clock controller driver for SM6375Konrad Dybcio1-0/+1
Add support for the GPU clock controller found on SM6375. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-03-13clk: qcom: Add GPU clock controller driver for SM6125Konrad Dybcio1-0/+1
Add support for the GPU clock controller found on SM6125. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-02-08clk: qcom: add msm8996 Core Bus Framework (CBF) supportDmitry Baryshkov1-1/+1
Add CBF clock driver as a part of MSM8996 CPU clocks. Significantly based on AngeloGioacchino del Regno's work at [1]. The CBF is an interconnect between two CPU clusters, setting it up properly is required for booting the MSM8996 with all four cores enabled. [1] https://github.com/sonyxperiadev/kernel/blob/aosp/LE.UM.2.3.2.r1.4/drivers/clk/qcom/clk-cpu-8996.c Co-developed-by: Konrad Dybcio <[email protected]> Signed-off-by: Konrad Dybcio <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> [bjorn: Dropped partially uninitialized variable "ret" from cbf_clk_notifier_cb()] Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-02-08clk: qcom: add the driver for the MSM8996 APCS clocksDmitry Baryshkov1-1/+1
Add a simple driver handling the APCS clocks on MSM8996. For now it supports just a single aux clock, linking GPLL0 to CPU and CBF clocks. Note, there is little sense in registering sys_apcs_aux as a child of gpll0. The PLL is always-on. And listing the gpll0 as a property of the apcs would delay its probing until the GCC has been probed (while we would like for the apcs to be probed as early as possible). Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> [bjorn: Fixed spelling of register, per Stephen's feedback] Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-01-18clk: qcom: Add QDU1000 and QRU1000 GCC supportTaniya Das1-0/+1
Add Global Clock Controller (GCC) support for QDU1000 and QRU1000 SoCs. Signed-off-by: Taniya Das <[email protected]> Signed-off-by: Melody Olvera <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> [bjorn: Made gcc_pcie_0_pipe_clk_src use clk_regmap_phy_mux_ops] Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-01-18clk: qcom: add the GCC driver for sa8775pShazad Hussain1-0/+1
Add support for the Global Clock Controller found in the QTI SA8775P platforms. Signed-off-by: Shazad Hussain <[email protected]> [Bartosz: made the driver ready for upstream] Co-developed-by: Bartosz Golaszewski <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> [bjorn: Moved to core_initcall(), per request of Konrad] Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2023-01-10clk: qcom: add SM8550 DISPCC driverNeil Armstrong1-0/+1
Add support for the display clock controller found in SM8550 based devices. This clock controller feeds the Multimedia Display SubSystem (MDSS). This driver is based on the SM8450 support. Signed-off-by: Neil Armstrong <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-3-8a03d348c572@linaro.org
2023-01-06clk: qcom: Add TCSR clock driver for SM8550Abel Vesa1-0/+1
The TCSR clock controller found on SM8550 provides refclks for PCIE, USB and UFS. Add clock driver for it. This patch is based on initial code downstream. Signed-off-by: Abel Vesa <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]