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AgeCommit message (Expand)AuthorFilesLines
2024-02-15x86/cpu/topology: Provide __num_[cores|threads]_per_packageThomas Gleixner2-1/+13
2024-02-15x86/cpu/topology: Rename smp_num_siblingsThomas Gleixner4-8/+8
2024-02-15x86/cpu/topology: Retrieve cores per package from topology bitmapsThomas Gleixner3-15/+57
2024-02-15x86/cpu/topology: Use topology logical mapping mechanismThomas Gleixner2-13/+4
2024-02-15x86/cpu/topology: Provide logical pkg/die mappingThomas Gleixner1-0/+28
2024-02-15x86/cpu/topology: Simplify cpu_mark_primary_thread()Thomas Gleixner1-4/+1
2024-02-15x86/cpu/topology: Mop up primary thread mask handlingThomas Gleixner1-27/+2
2024-02-15x86/cpu/topology: Use topology bitmaps for sizingThomas Gleixner4-29/+26
2024-02-15x86/cpu/topology: Let XEN/PV use topology from CPUID/MADTThomas Gleixner1-1/+1
2024-02-15x86/cpu/topology: Assign hotpluggable CPUIDs during initThomas Gleixner1-11/+18
2024-02-15x86/cpu/topology: Reject unknown APIC IDs on ACPI hotplugThomas Gleixner1-0/+4
2024-02-15x86/topology: Add a mechanism to track topology via APIC IDsThomas Gleixner1-2/+46
2024-02-15x86/cpu: Detect real BSP on crash kernelsThomas Gleixner1-38/+59
2024-02-15x86/cpu/topology: Rework possible CPU managementThomas Gleixner1-70/+106
2024-02-15x86/cpu/topology: Sanitize the APIC admission logicThomas Gleixner1-82/+77
2024-02-15x86/cpu/topology: Use a data structure for topology infoThomas Gleixner1-30/+29
2024-02-15x86/cpu/topology: Simplify APIC registrationThomas Gleixner1-20/+3
2024-02-15x86/cpu/topology: Confine topology informationThomas Gleixner1-2/+74
2024-02-15x86/mpparse: Use new APIC registration functionThomas Gleixner1-1/+1
2024-02-15x86/cpu/topology: Provide separate APIC registration functionsThomas Gleixner1-18/+95
2024-02-15x86/cpu/topology: Move registration out of APIC codeThomas Gleixner2-5/+191
2024-02-15x86/cpu/topology: Make the APIC mismatch warnings completeThomas Gleixner2-13/+14
2024-02-15x86/cpu: Remove x86_coreid_bitsThomas Gleixner1-1/+0
2024-02-15x86/cpu: Remove topology.cThomas Gleixner2-143/+1
2024-02-15x86/cpu: Make topology_amd_node_id() use the actual node infoThomas Gleixner1-5/+2
2024-02-15x86/cpu: Use common topology code for HYGONThomas Gleixner5-154/+4
2024-02-15x86/cpu: Use common topology code for AMDThomas Gleixner3-149/+5
2024-02-15x86/cpu: Provide an AMD/HYGON specific topology parserThomas Gleixner8-7/+213
2024-02-15x86/cpu/amd: Provide a separate accessor for Node IDThomas Gleixner3-5/+5
2024-02-15x86/cpu: Use common topology code for IntelThomas Gleixner5-117/+4
2024-02-15x86/cpu: Provide a sane leaf 0xb/0x1f parserThomas Gleixner3-1/+143
2024-02-15x86/cpu: Move __max_die_per_package to common.cThomas Gleixner2-3/+3
2024-02-15x86/cpu: Use common topology code for Centaur and ZhaoxinThomas Gleixner3-11/+8
2024-02-15x86/cpu: Add legacy topology parserThomas Gleixner3-1/+51
2024-02-15x86/cpu: Provide cpu_init/parse_topology()Thomas Gleixner6-18/+277
2024-02-14Merge branch 'x86/bugs' into x86/core, to pick up pending changes before depe...Ingo Molnar2-22/+28
2024-02-14Merge tag 'v6.8-rc4' into x86/percpu, to resolve conflicts and refresh the br...Ingo Molnar34-1655/+1999
2024-02-12x86/retpoline: Ensure default return thunk isn't used at runtimeJosh Poimboeuf1-0/+5
2024-02-05x86/mce: Make mce_subsys constRicardo B. Marliere1-1/+1
2024-01-31x86/fred: Invoke FRED initialization code to enable FREDH. Peter Anvin (Intel)1-5/+17
2024-01-31x86/syscall: Split IDT syscall setup code into idt_syscall_init()Xin Li1-3/+10
2024-01-31x86/traps: Add sysvec_install() to install a system interrupt handlerXin Li2-10/+9
2024-01-31x86/fred: Add a machine check entry stub for FREDXin Li1-0/+26
2024-01-31x86/cpu: Add X86_CR4_FRED macroH. Peter Anvin (Intel)1-3/+2
2024-01-29x86/mtrr: Don't print errors if MtrrFixDramModEn is set when SNP enabledAshish Kalra1-0/+3
2024-01-29x86/sev: Add SEV-SNP host initialization supportBrijesh Singh1-0/+16
2024-01-29x86/speculation: Do not enable Automatic IBRS if SEV-SNP is enabledKim Phillips1-1/+6
2024-01-29x86/cpufeatures: Add SEV-SNP CPU featureBrijesh Singh1-2/+3
2024-01-25x86/cpufeatures: Add the CPU feature bit for FREDH. Peter Anvin (Intel)1-0/+2
2024-01-25x86/CPU/AMD: Add more models to X86_FEATURE_ZEN5Mario Limonciello1-0/+3
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