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2020-08-23treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2-4/+4
2020-08-15perf/x86/intel/uncore: Add BW counters for GT, IA and IO breakdownVaibhav Shankar1-3/+49
2020-08-14perf/x86/rapl: Add support for Intel SPR platformZhang Rui1-0/+20
2020-08-14perf/x86/rapl: Support multiple RAPL unit quirksZhang Rui1-9/+15
2020-08-14perf/x86/rapl: Fix missing psys sysfs attributesZhang Rui1-1/+1
2020-08-03Merge tag 'x86-cleanups-2020-08-03' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-4/+0
2020-07-28perf/x86/rapl: Add Hygon Fam18h RAPL supportPu Wen1-1/+2
2020-07-26Merge branch 'x86/urgent' into x86/cleanupsIngo Molnar1-1/+1
2020-07-22x86/perf: Fix a typoHu Haowen1-1/+1
2020-07-08perf/x86/intel/lbr: Support XSAVES for arch LBR readKan Liang3-1/+47
2020-07-08perf/x86/intel/lbr: Support XSAVES/XRSTORS for LBR context switchKan Liang2-5/+95
2020-07-08perf/x86: Remove task_ctx_sizeKan Liang2-2/+0
2020-07-08perf/x86/intel/lbr: Create kmem_cache for the LBR context dataKan Liang1-2/+19
2020-07-08perf/x86/intel/lbr: Support Architectural LBRKan Liang3-11/+253
2020-07-08perf/x86/intel/lbr: Factor out intel_pmu_store_lbrKan Liang1-26/+56
2020-07-08perf/x86/intel/lbr: Factor out rdlbr_all() and wrlbr_all()Kan Liang2-17/+51
2020-07-08perf/x86/intel/lbr: Mark the {rd,wr}lbr_{to,from} wrappers __always_inlineKan Liang1-4/+4
2020-07-08perf/x86/intel/lbr: Unify the stored format of LBR informationKan Liang3-17/+15
2020-07-08perf/x86/intel/lbr: Support LBR_CTLKan Liang2-3/+55
2020-07-08perf/x86: Expose CPUID enumeration bits for arch LBRKan Liang1-0/+13
2020-07-08perf/x86/intel/lbr: Use dynamic data structure for task_ctxKan Liang2-34/+32
2020-07-08perf/x86/intel/lbr: Factor out a new struct for generic optimizationKan Liang2-20/+28
2020-07-08perf/x86/intel/lbr: Add the function pointers for LBR save and restoreKan Liang3-30/+59
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR readKan Liang3-7/+13
2020-07-08perf/x86/intel/lbr: Add a function pointer for LBR resetKan Liang3-17/+27
2020-07-02Merge branch 'perf/vlbr'Peter Zijlstra5-56/+140
2020-07-02perf/x86: Keep LBR records unchanged in host context for guest usageLike Xu3-7/+33
2020-07-02perf/x86: Add constraint to create guest LBR event without hw counterLike Xu4-0/+24
2020-07-02perf/x86/lbr: Add interface to get LBR informationLike Xu1-0/+20
2020-07-02perf/x86/core: Refactor hw->idx checks and cleanupLike Xu2-48/+62
2020-07-02perf/x86: Fix variable types for LBR registersWei Wang1-2/+2
2020-06-28Merge tag 'perf-urgent-2020-06-28' of git://git.kernel.org/pub/scm/linux/kern...Linus Torvalds1-1/+1
2020-06-15x86/msr: Lift AMD family 0x15 power-specific MSRsBorislav Petkov1-4/+0
2020-06-15perf/x86/intel/uncore: Expose an Uncore unit to IIO PMON mappingRoman Sudarikov2-0/+200
2020-06-15perf/x86/intel/uncore: Wrap the max dies calculation into an accessorRoman Sudarikov2-6/+10
2020-06-15perf/x86/intel/uncore: Expose an Uncore unit to PMON mappingRoman Sudarikov2-0/+20
2020-06-15perf/x86/intel/uncore: Validate MMIO address before accessingKan Liang3-0/+21
2020-06-15perf/x86/intel/uncore: Record the size of mapped areaKan Liang3-4/+21
2020-06-15perf/x86/intel/uncore: Fix oops when counting IMC uncore events on some TGLKan Liang1-1/+2
2020-06-15perf/x86/intel/uncore: Add Comet Lake supportKan Liang2-0/+68
2020-06-14treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada1-4/+4
2020-06-09mmap locking API: convert mmap_sem commentsMichel Lespinasse1-1/+1
2020-06-09mmap locking API: add mmap_assert_locked() and mmap_assert_write_locked()Michel Lespinasse1-1/+1
2020-06-05Merge tag 'x86-mm-2020-06-05' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds1-8/+3
2020-06-02perf/x86/rapl: Fix RAPL config variable bugStephane Eranian1-1/+1
2020-05-28perf/x86/rapl: Add AMD Fam17h RAPL supportStephane Eranian1-0/+18
2020-05-28perf/x86/rapl: Make perf_probe_msr() more robust and flexibleStephane Eranian1-0/+13
2020-05-28perf/x86/rapl: Flip logic on default events visibilityStephane Eranian1-0/+11
2020-05-28perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUsStephane Eranian1-6/+23
2020-05-28perf/x86/rapl: Move RAPL support to common x86 codeStephane Eranian4-8/+10
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