| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2019-05-16 | riscv: Support BUG() in kernel module | Vincent Chen | 1 | -1/+1 |
| 2019-05-16 | riscv: Add the support for c.ebreak check in is_valid_bugaddr() | Vincent Chen | 1 | -3/+17 |
| 2019-05-16 | RISC-V: Access CSRs using CSR numbers | Anup Patel | 1 | -3/+3 |
| 2019-04-25 | riscv: remove duplicate macros from ptrace.h | Christoph Hellwig | 1 | -1/+1 |
| 2018-08-13 | RISC-V: Don't increment sepc after breakpoint. | Jim Wilson | 1 | -1/+0 |
| 2018-06-16 | Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm... | Linus Torvalds | 1 | -1/+1 |
| 2018-06-07 | riscv: no __user for probe_kernel_address() | Luc Van Oostenryck | 1 | -1/+1 |
| 2018-04-25 | signal/riscv: Replace do_trap_siginfo with force_sig_fault | Eric W. Biederman | 1 | -8/+2 |
| 2018-04-25 | signal/riscv: Use force_sig_fault where appropriate | Eric W. Biederman | 1 | -8/+1 |
| 2018-04-25 | signal: Ensure every siginfo we send has all bits initialized | Eric W. Biederman | 1 | -0/+1 |
| 2017-09-26 | RISC-V: Init and Halt Code | Palmer Dabbelt | 1 | -0/+180 |