| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2020-05-07 | mips: cm: Add L2 ECC/parity errors reporting | Serge Semin | 1 | -2/+60 |
| 2020-05-07 | mips: cm: Fix an invalid error code of INTVN_*_ERR | Serge Semin | 1 | -3/+3 |
| 2020-01-06 | remove ioremap_nocache and devm_ioremap_nocache | Christoph Hellwig | 1 | -2/+2 |
| 2019-05-30 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 | Thomas Gleixner | 1 | -5/+1 |
| 2019-03-05 | Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux | Linus Torvalds | 1 | -2/+2 |
| 2019-02-15 | MIPS: CM: Fix indentation | Paul Burton | 1 | -2/+2 |
| 2019-02-07 | mips: cm: reprime error cause | Vladimir Kondratiev | 1 | -1/+1 |
| 2018-01-10 | MIPS: CM: Drop WARN_ON(vp != 0) | James Hogan | 1 | -1/+0 |
| 2017-11-03 | Update MIPS email addresses | Paul Burton | 1 | -1/+1 |
| 2017-08-30 | MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers | Paul Burton | 1 | -1/+1 |
| 2017-08-30 | MIPS: CM: Add cluster & block args to mips_cm_lock_other() | Paul Burton | 1 | -3/+16 |
| 2017-08-30 | MIPS: Abstract CPU core & VP(E) ID access through accessor functions | Paul Burton | 1 | -2/+2 |
| 2017-08-30 | MIPS: CPS: Use change_*, set_* & clear_* where appropriate | Paul Burton | 1 | -3/+1 |
| 2017-08-29 | MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts | Paul Burton | 1 | -24/+24 |
| 2017-08-29 | MIPS: CM: Specify register size when generating accessors | Paul Burton | 1 | -6/+3 |
| 2017-08-29 | MIPS: CM: Rename mips_cm_base to mips_gcr_base | Paul Burton | 1 | -5/+5 |
| 2017-06-29 | MIPS: CM: WARN on attempt to lock invalid VP, not BUG | Paul Burton | 1 | -1/+1 |
| 2017-06-29 | MIPS: CM: Avoid per-core locking with CM3 & higher | Paul Burton | 1 | -6/+32 |
| 2016-08-04 | tree-wide: replace config_enabled() with IS_ENABLED() | Masahiro Yamada | 1 | -1/+1 |
| 2016-04-03 | MIPS: Fix misspellings in comments. | Adam Buchbinder | 1 | -1/+1 |
| 2015-11-11 | MIPS: CM, CPC: Ensure core-other GCRs reflect the correct core | Paul Burton | 1 | -0/+6 |
| 2015-11-11 | MIPS: CM: Introduce core-other locking functions | Paul Burton | 1 | -0/+39 |
| 2015-10-26 | MIPS: Always read full 64 bit CM error GCRs for CM3 | Paul Burton | 1 | -34/+36 |
| 2015-10-26 | MIPS: Avoid buffer overrun in mips_cm_error_report | Paul Burton | 1 | -0/+2 |
| 2015-10-26 | MIPS: Don't read GCRs when a CM is not present | Paul Burton | 1 | -7/+10 |
| 2015-08-26 | MIPS: CM: Add support for reporting CM cache errors | Markos Chandras | 1 | -0/+244 |
| 2015-08-26 | MIPS: CM: The CMGCRBase register is 64-bit on 64 bit kernels. | Markos Chandras | 1 | -1/+1 |
| 2015-08-26 | MIPS: mips-cm: Extend CM accessors for 64-bit CPUs | Markos Chandras | 1 | -0/+4 |
| 2015-08-26 | MIPS: Add platform callback before initializing the L2 cache | Markos Chandras | 1 | -0/+7 |
| 2014-11-24 | MIPS: Replace use of phys_t with phys_addr_t. | Ralf Baechle | 1 | -6/+6 |
| 2014-03-06 | MIPS: Add generic CM probe & access code | Paul Burton | 1 | -0/+121 |