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path: root/arch/mips/include/asm
AgeCommit message (Expand)AuthorFilesLines
2016-05-13MIPS: Add perf counter featureJames Hogan2-0/+5
2016-05-13MIPS: Add defs & probing of [X]ContextConfigJames Hogan3-0/+11
2016-05-13MIPS: Add defs & probing of BadInstr[P] registersJames Hogan3-0/+13
2016-05-13MIPS: Add defs & probing of extended CP0_EBaseJames Hogan3-0/+8
2016-05-13MIPS: Define & use CP0_EBase bit definitionsJames Hogan1-1/+9
2016-05-13MIPS: Allow RIXI to be used on non-R2 or R6 coresFlorian Fainelli1-4/+4
2016-05-13MIPS: mm: Fix MIPS32 36b physical addressing (alchemy, netlogic)Paul Burton3-14/+99
2016-05-13MIPS: mm: Unify pte_page definitionPaul Burton1-3/+3
2016-05-13MIPS: mm: Standardise on _PAGE_NO_READ, drop _PAGE_READPaul Burton2-31/+11
2016-05-13MIPS: Use enums to make asm/pgtable-bits.h readablePaul Burton1-108/+81
2016-05-13MIPS: Remove redundant asm/pgtable-bits.h inclusionsPaul Burton1-2/+0
2016-05-13MIPS: Separate XPA CPU feature into LPA and MVHJames Hogan2-2/+9
2016-05-13MIPS: Support extended ASIDsPaul Burton1-0/+14
2016-05-13MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mipsPaul Burton2-23/+28
2016-05-13MIPS: KVM: Abstract guest ASID maskPaul Burton1-2/+3
2016-05-13MIPS: Add & use CP0_EntryHi ASID definitionsJames Hogan1-0/+2
2016-05-13MIPS: Change my email addressJohn Crispin13-13/+13
2016-05-13MIPS: Implement __arch_bitrev* using bitswap for MIPSr6Paul Burton1-0/+30
2016-05-13MIPS: make PCI_DMA_BUS_IS_PHYS=1 constantSergey Ryazanov1-6/+4
2016-05-13MIPS64: Support of at least 48 bits of SEGBITSLeonid Yegoshin2-8/+16
2016-05-13MIPS64: signal: Fix o32 sigaction syscallLeonid Yegoshin1-3/+9
2016-05-13MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENTHuacai Chen4-8/+26
2016-05-13MIPS: Loongson-3: Fast TLB refill handlerHuacai Chen4-1/+12
2016-05-13MIPS: Loongson: Invalidate special TLBs when neededHuacai Chen1-0/+9
2016-05-13MIPS: Loongson: Add Loongson-3A R2 basic supportHuacai Chen7-18/+23
2016-05-13MIPS: BCM1480: bcm1480_regs.h: strip redundant commentsAntonio Ospite1-2/+2
2016-05-13MIPS: Add and use watch register field definitionsJames Hogan1-0/+18
2016-05-13MIPS: Add and use CAUSEF_WP definitionJames Hogan1-0/+2
2016-05-13MIPS: ELF: Restructure personality macrosMaciej W. Rozycki1-7/+7
2016-05-13MIPS: BMIPS: Add BCM6358 supportÁlvaro Fernández Rojas1-0/+33
2016-05-13MIPS: BMIPS: Add cpu-feature-overrides.hFlorian Fainelli1-0/+14
2016-05-13MIPS: Loongson1B: Some updates/fixes for LS1BKelvin Cheung9-66/+129
2016-05-13MIPS: Introduce plat_get_fdt a platform API to retrieve the FDTMatt Redfearn1-0/+18
2016-05-13MIPS: seccomp: Support compat with both O32 and N32Matt Redfearn1-21/+26
2016-05-13MIPS: Use generic clkdev.h headerStephen Boyd2-27/+1
2016-05-13MIPS: Sync icache & dcache in set_pte_atPaul Burton2-11/+21
2016-05-13MIPS: Flush dcache for flush_kernel_dcache_pagePaul Burton1-0/+1
2016-05-13MIPS: Detect DSP v3 supportZubair Lutfullah Kakakhel2-0/+5
2016-05-13MIPS: cpu: Convert MIPS_CPU_* defs to (1ull << x)James Hogan1-41/+48
2016-05-13MIPS: cpu: Alter MIPS_CPU_* definitions to fill gapJames Hogan1-8/+8
2016-05-13MIPS: BMIPS: Add early CPU initialization codeFlorian Fainelli1-0/+1
2016-05-13MIPS: Make flush_threadRalf Baechle1-0/+4
2016-05-13MIPS: Support R_MIPS_PC{21,26} rela-style relocsPaul Burton1-0/+5
2016-05-13MIPS: Add M6250 cases to CPU switch statementsPaul Burton1-0/+4
2016-05-13MIPS: Add M6250 PRID & cpu_type_enum valuesPaul Burton1-1/+2
2016-05-13MIPS: Add P6600 cases to CPU switch statementsPaul Burton1-0/+1
2016-05-13MIPS: Add P6600 PRID & cpu_type_enum valuesPaul Burton1-1/+2
2016-05-13MIPS: <asm/cpu.h>: Reformat to 80 columns.Ralf Baechle1-2/+2
2016-05-13MIPS: smp-cps: Support MIPSr6 Virtual ProcessorsPaul Burton1-2/+2
2016-05-13MIPS: smp-cps: Pull boot config retrieval out of mips_cps_boot_vpesPaul Burton1-1/+1
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