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2020-01-09MIPS: PCI: Support mapping of INTB/C/D for pci-xtalk-bridgeThomas Bogendoerfer1-1/+2
Implented mapping of PCI INTB/C/D, which is needed for PCI multifunction devices, PCI-PCI bridges and IOC3. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2019-10-07MIPS: PCI: use information from 1-wire PROM for IOC3 detectionThomas Bogendoerfer1-0/+1
IOC3 chips in SGI system are conntected to a bridge ASIC, which has a 1-wire prom attached with part number information. This changeset uses this information to create PCI subsystem information, which the MFD driver uses for further platform device setup. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: Lee Jones <[email protected]> Cc: David S. Miller <[email protected]> Cc: Srinivas Kandagatla <[email protected]> Cc: Alessandro Zummo <[email protected]> Cc: Alexandre Belloni <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Jiri Slaby <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected]
2019-05-09MIPS: SGI-IP27: abstract chipset irq from bridgeThomas Bogendoerfer1-2/+1
Bridge ASIC is widely used in different SGI systems, but the connected chipset is either HUB, HEART or BEDROCK. This commit switches to irq domain hierarchy for hub and bridge interrupts to get bridge setup out of hub interrupt code. Signed-off-by: Thomas Bogendoerfer <[email protected]> [[email protected]: Resolve conflict with commit 69a07a41d908 ("MIPS: SGI-IP27: rework HUB interrupts").] Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2019-05-09MIPS: SGI-IP27: use generic PCI driverThomas Bogendoerfer1-8/+3
Converted bridge code to a platform driver using the PCI generic driver framework and use adding platform devices during xtalk scan. This allows easier sharing bridge driver for other SGI platforms like IP30 (Octane) and IP35 (Origin 3k, Fuel, Tezro). Signed-off-by: Thomas Bogendoerfer <[email protected]> [[email protected]: - Leave __phys_to_dma(), __dma_to_phys() & pcibus_to_node() in arch/mips/pci/pci-ip27.c since the motivation for moving them disappeared when the driver stopped being moved to drivers/pci.] Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2019-02-19MIPS: SGI-IP27: rework HUB interruptsThomas Bogendoerfer1-3/+1
This commit rearranges the HUB interrupt code by using MIPS_IRQ_CPU interrupt handling code and modern Linux IRQ framework features to get rid of global arrays. It also adds support for irq affinity setting. Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2019-02-19MIPS: SGI-IP27: clean up bridge access and header filesThomas Bogendoerfer1-113/+89
Introduced bridge_read/bridge_write/bridge_set/bridge_clr for accessing bridge register and get rid of volatile declarations. Also removed all typedefs from arch/mips/include/asm/pci/bridge.h and cleaned up language in arch/mips/pci/ops-bridge.c Signed-off-by: Thomas Bogendoerfer <[email protected]> Signed-off-by: Paul Burton <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: James Hogan <[email protected]> Cc: [email protected] Cc: [email protected]
2016-04-03MIPS: Fix misspellings in comments.Adam Buchbinder1-9/+9
Signed-off-by: Adam Buchbinder <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/12617/ Signed-off-by: Ralf Baechle <[email protected]>
2015-04-01MIPS: PCI: Add a hook for IORESOURCE_BUS in pci_controller/bridge_controllerJoshua Kinard1-0/+1
On SGI Origin 2k/Onyx2 and SGI Octane systems, there can exist multiple PCI buses attached to the Xtalk bus. The current code will stop counting PCI buses after it finds the first one. If one installs the optional PCI cardcage ("shoebox") into these systems, because of the order of the Xtalk widgets, the current PCI code will find the cardcage first, and fail to detect the BaseIO PCI devices, which are on a higher Xtalk widget ID. This patch adds the hooks needed for resolving this issue in the IP27 PCI code (in a later patch). Verified on both an SGI Onyx2 and an SGI Octane. Signed-off-by: Joshua Kinard <[email protected]> Cc: Linux MIPS List <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/9074/ Signed-off-by: Ralf Baechle <[email protected]>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle1-15/+15
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <[email protected]>
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <[email protected]>
2010-10-27mips: remove dma64_addr_t usageFUJITA Tomonori1-1/+1
dma64_addr_t looks pointless (at least there is no point that an architecture has the own dma64_addr_t typedef). dma_addr_t is set to 32 or 64 bits appropriately. You can use u64 at places where you know that 64 bit address is always necessary. Let's use u64 instead for mips. Signed-off-by: FUJITA Tomonori <[email protected]> Cc: Ralf Baechle <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle1-0/+854
Signed-off-by: Ralf Baechle <[email protected]>
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