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Add PCIe phy bindings for the ZCU102.
Link: https://lore.kernel.org/r/[email protected]
Tested-by: Thippeswamy Havalige <[email protected]>
Signed-off-by: Sean Anderson <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Acked-by: Michal Simek <[email protected]>
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Add pwm-fan node to control fan through hwmon and change
pwm-cells property to 3 to allow fancontrol utility to
function correctly.
Signed-off-by: Vishal Patel <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/ff6b4dbfc9bb1b53769ffbf7d0e932c7a8be7c08.1716802450.git.michal.simek@amd.com
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Revision 2 is SW compatible with revision 1 but it is necessary to reflect
it in model and compatible properties which are parsed by user space.
Rev 2 has improved a power on boot reset and MIO34 shutdown glich
improvement done via an additional filter in the GreenPak chip.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/458698666fdfcaaac70967d9f755422a480bed99.1716802450.git.michal.simek@amd.com
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Add a device tree node to describe the DisplayPort connector, and
connect it to the DPSUB output.
The patch was tested on kv260-revB/rev2.
Signed-off-by: Vishal Sagar <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/4f69489c005719d280b8df97f3e82a5ce0cd9660.1716802450.git.michal.simek@amd.com
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The commit f7ab2d180e6a ("dt-bindings: hwmon: ina2xx: Describe ina260
chip"), commit f29996d0295e ("dt-bindings: hwmon: ina2xx:
Describe #io-channel-cells property") and commit eea32fafadd3
("dt-bindings: hwmon: ina2xx: Add label property") added description for
ina260 that's why describe them on kv260
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/944cba76ef5df932f1bebde6c5e64ec9d201356d.1716802450.git.michal.simek@amd.com
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The commit dbcd27526e6a ("dt-bindings: soc: xilinx: Add support for KV260
CC") added description for kv260 kit and it should be also reflected in
DTs.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/1e436f82182a92187f3892401664db2507482870.1716802450.git.michal.simek@amd.com
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Since the zynqmp pinctrl driver now includes support for the
tri-state registers, ensure that the pins needing output-enable
are correctly configured for SOMs.
Currently, there is an issue with the detection of the MMC for
the SOM kv260, resulting in the following error:
ZynqMP> mmc dev 1
Card did not respond to voltage select! : -110
To address this problem, configure the SDIO pins for output-enable
to enable MMC detection.
Signed-off-by: Tejas Bhumkar <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/540f83f7d88b80441c9fa3d771dd7b000b0710a4.1716802450.git.michal.simek@amd.com
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Remove unused address/size-cells properties without defining child.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/39f73999bbec0233264ce40f05c0885c46e423be.1716802450.git.michal.simek@amd.com
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Describe OCM controller which brings EDAC functionality.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/679736679fdf7897d68684295f6ed8256fb5f18e.1716802450.git.michal.simek@amd.com
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Describe usb wakeup interrupt.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/8c11ac7d73c822ee207cecd1445205f19fcaf004.1716802450.git.michal.simek@amd.com
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The commit 737c0c8d07b5 ("nvmem: zynqmp_nvmem: Add support to access
efuse") added support for efuses that's why also describe them in DT.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/beb8002f8dae47ce6f38f7f961d024e65372b654.1716802450.git.michal.simek@amd.com
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Based on commit 85f838adad54 ("dt-bindings: fpga: Convert fpga-region
binding to yaml") fpga/programmable logic should use fpga-region as node
name that's why move to it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9133aed74a24ad5cd9af5a6d5aa7ee9a160f94ee.1716802450.git.michal.simek@amd.com
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Use new soc-nvmem node name and swich to nvmem fixed layout.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/7796804c7c7dd8bb2c93bdfe028c22746a24fe54.1716802450.git.michal.simek@amd.com
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Add coresight debug support to the device tree. This can be useful when
panicking, especially when a core is hung in EL3.
Signed-off-by: Sean Anderson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Add properties as per new bindings in zynqmp remoteproc node
to represent TCM address and size.
This patch also adds alternative remoteproc node to represent
remoteproc cluster in split mode. By default lockstep mode is
enabled and users should disable it before using split mode
dts. Both device-tree nodes can't be used simultaneously one
of them must be disabled. For zcu102-1.0 and zcu102-1.1 board
remoteproc split mode dts node is enabled and lockstep mode
dts is disabled.
Signed-off-by: Tanmay Shah <[email protected]>
Reviewed-by: Mathieu Poirier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty
Pull tty / serial updates from Greg KH:
"Here is the big set of tty/serial driver changes for 6.10-rc1.
Included in here are:
- Usual good set of api cleanups and evolution by Jiri Slaby to make
the serial interfaces move out of the 1990's by using kfifos
instead of hand-rolling their own logic.
- 8250_exar driver updates
- max3100 driver updates
- sc16is7xx driver updates
- exar driver updates
- sh-sci driver updates
- tty ldisc api addition to help refuse bindings
- other smaller serial driver updates
All of these have been in linux-next for a while with no reported
issues"
* tag 'tty-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (113 commits)
serial: Clear UPF_DEAD before calling tty_port_register_device_attr_serdev()
serial: imx: Raise TX trigger level to 8
serial: 8250_pnp: Simplify "line" related code
serial: sh-sci: simplify locking when re-issuing RXDMA fails
serial: sh-sci: let timeout timer only run when DMA is scheduled
serial: sh-sci: describe locking requirements for invalidating RXDMA
serial: sh-sci: protect invalidating RXDMA on shutdown
tty: add the option to have a tty reject a new ldisc
serial: core: Call device_set_awake_path() for console port
dt-bindings: serial: brcm,bcm2835-aux-uart: convert to dtschema
tty: serial: uartps: Add support for uartps controller reset
arm64: zynqmp: Add resets property for UART nodes
dt-bindings: serial: cdns,uart: Add optional reset property
serial: 8250_pnp: Switch to DEFINE_SIMPLE_DEV_PM_OPS()
serial: 8250_exar: Keep the includes sorted
serial: 8250_exar: Make type of bit the same in exar_ee_*_bit()
serial: 8250_exar: Use BIT() in exar_ee_read()
serial: 8250_exar: Switch to use dev_err_probe()
serial: 8250_exar: Return directly from switch-cases
serial: 8250_exar: Decrease indentation level
...
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Add resets property for UART0 and UART1 nodes
Signed-off-by: Manikanta Guntupalli <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
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The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.
There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).
Signed-off-by: Rob Herring (Arm) <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Reviewed-by: Jisheng Zhang <[email protected]>
Acked-by: Sudeep Holla <[email protected]>
Acked-by: Dinh Nguyen <[email protected]>
Acked-by: Heiko Stuebner <[email protected]>
Acked-by: Bjorn Andersson <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Acked-by: Alim Akhtar <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Acked-by: Shawn Guo <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
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dwc3-xilinx.yaml defines 2 clocks which are not defined that's why define
them (bus_early clock is moved to bus_clk in glue logic).
With also describing kv260 assigned clock rates with assigned clocks.
Also add missing status property to standard dwc3 core.
Link: https://lore.kernel.org/r/aa4c65a8997c7a65f23da3a3088bb5eb64281307.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.
Link: https://lore.kernel.org/r/bdb012b1c86abb0d9aa88954196d886d1283e9b1.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Anything ending with gpio/gpios is taken as gpio phande/description which
is reported as the issue coming from gpio-consumer.yaml schema.
That's why rename the gpio suffix to gpio-grp to avoid name collision.
Link: https://lore.kernel.org/r/94f633e26b7b16cabddb8c7210c2e79208c364da.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state
is enabled for MIO38, causing inappropriate PHY register reads.
Disabled Tri-state for MIO38 to make HW reset work.
Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540
Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540
Signed-off-by: Tejas Bhumkar <[email protected]>
Link: https://lore.kernel.org/r/9f8a0687be407a8ffad610087074e94ebc4f5982.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Remove incorrect comment about required nodes by spec. In past gem3 was the
part of SOM specification but it has been revisit by introducting KR260.
Link: https://lore.kernel.org/r/0bd166345ce78097a1ff8d4307545f5026c92267.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Add u-boot options node with details about bootscr-address.
c&p description from dtschema/schemas/options/u-boot.yaml:
"Holds the full address of the boot script file. It helps in making
automated flow easier by fetching the 64bit address directly from DT.
Value should be automatically copied to the U-Boot 'scriptaddr' variable.
When it is defined, bootscr-ram-offset property should be ignored.
Actually only one of them should be present in the DT."
Address is generic for all zynqmp boards because all of them have DDR
starting from 0. Custom boards should revisit the location and aligned it
based on their needs.
Link: https://lore.kernel.org/r/4f5978d5a26fe0cd0cc6e54a97da1517bb925c01.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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The board was renamed from zc1275 to zcu1275 but name in comment wasn't
updated.
Fixes: 370b0e900fb0 ("arm64: zynqmp: Change zc1275 board name to zcu1275")
Link: https://lore.kernel.org/r/6e4215807f535d2e2b2b8055aa8574c748fe22e4.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Update ECAM size to discover up to 256 buses.
Signed-off-by: Thippeswamy Havalige <[email protected]>
Link: https://lore.kernel.org/r/4f7621a790f4aa35b3e7f74683d3ae4ffe820667.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Describe assigned-clocks for both uarts. SOM is using this functionality.
Link: https://lore.kernel.org/r/21579f273554a19bc95a40f49956793b5261627f.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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All si570 mgt chips have factory default 156.25MHz but DT changed it to
148.5MHz. After tracking it is pretty much c&p fault taken from Zynq
zc702/zc706 boards where 148.5MHz was setup as default because it was
requirement for AD7511 chip available on these boards.
ZynqMP board don't contain this chip that's why factory default frequency
can be used.
Link: https://lore.kernel.org/r/65a53776cbc5e4586f58da57a4b99e4d5c6c26a7.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Added resets property for CAN nodes.
Signed-off-by: Srinivas Neeli <[email protected]>
Link: https://lore.kernel.org/r/7bf0cc230f3c25010f9545f3f92f6f15a95d21ec.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.
Signed-off-by: Ilias Apalodimas <[email protected]>
Link: https://lore.kernel.org/r/9ee7e8c263c453a8c9e6bc3b91fad78b0f54edc0.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.
Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.
In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
gpio toggle gpio@ff0a000038
Signed-off-by: Neal Frager <[email protected]>
Link: https://lore.kernel.org/r/9270938b48c8939ac5dca4ac2c59f1c4a8c564d8.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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Rename zynqmp-power node name to power-management which is more aligned
with generic node name recommendation.
Link: https://lore.kernel.org/r/bf24cde92c2b9e2824847687fab69fc25c533d53.1703161663.git.michal.simek@amd.com
Signed-off-by: Michal Simek <[email protected]>
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The commit 81186dc16101 ("dt-bindings: zynqmp: add destination mailbox
compatible") make compatible string for child nodes mandatory that's why
add it.
Signed-off-by: Michal Simek <[email protected]>
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node name shouldn't use '_' that's why convert it to '-'.
Signed-off-by: Michal Simek <[email protected]>
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fixed clock nodes can't be on the bus because they are missing reg
property. That's why move them to root.
And because it is root it is good to have it as the first node in a file.
Signed-off-by: Michal Simek <[email protected]>
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Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cases
where address/size-cells are unnecessary which is also reported by make W=1
dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle
it based on used description.
Error log:
/axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/7252203d52af3ca8867764c8514affc4828e530d.1695040866.git.michal.simek@amd.com
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Partitions are described via fixed-partitions that's why there is no need
to have address/size-cells in flash node.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/c4447028f914e77b8c28640dc458b8409198ee30.1695040866.git.michal.simek@amd.com
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All zynqmp boards have been already described via mdio node that's why also
convert zc1751. With using mdio node there is an option to add reset
property for the whole mdio bus.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/dc228a27579b48f3e768fcb439d118b4a0f0ef5b.1695040866.git.michal.simek@amd.com
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mt25qu512a is not documented in DT binding that's why remove it.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a1e975f5785dfb6eb04e8d5905dcaa7467ccd585.1695040866.git.michal.simek@amd.com
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Lower case should be used for register address.
Issue is reported as:
flash@0: partitions: Unevaluated properties are not allowed
('partition@22A0000' was unexpected)
Reviewed-by: Laurent Pinchart <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a96ac9a32a363b04958157548f290d480c21590c.1695040866.git.michal.simek@amd.com
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Character '_' not recommended in node name. Use '-' instead.
Pretty much run seds below for node names.
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/
s/si5335_/si5335-/
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/5137958580c85a35cf6aadd1c33a2f6bcf81a9e5.1695040866.git.michal.simek@amd.com
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DT overlays in tree need to be applied to a base DTB to validate they
apply, to run schema checks on them, and to catch any errors at compile
time. Defining the "-dtbs" variable is not enough as the combined DT must
be added to dtbs-y.
zynqmp-sck-kr-g-revA.dtso and zynqmp-sck-kr-g-revB.dtso don't exist, so drop
them.
Signed-off-by: Rob Herring <[email protected]>
Fixes: 45fe0dc4ea2e ("arm64: xilinx: Use zynqmp prefix for SOM dt overlays")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Michal Simek <[email protected]>
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Use arm-gic.h and irq.h for interrupt description. It helps to improve
readability of device tree file.
Suggested-by: Laurent Pinchart <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/9d5bd17f37772be186cab17b06cc21351d36ff62.1688986332.git.michal.simek@amd.com
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Based on DT binding dwc_usb3 is single entry without anything else. That's
why combination dwc3_usb3, otg is not allowed. That's why split it to host
and peripheral pair which both points to the same IRQ.
DWC3 code is reading these two properties first before generic dwc_usb3.
Reviewed-by: Laurent Pinchart <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/6544d13afd9f3d8f5413e32684aa16e4d155e331.1687160244.git.michal.simek@amd.com
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PMUFW (Power Management Unit firmware) requires top 1MB of the lower DDR
memory reserved for its operation, this is missing in k26 SM static dts
file. Bootloader or kernel shouldn't access this location.
Signed-off-by: Sharath Kumar Dasari <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/8ddc7fb4bf40faead7a015ad7e095f3f7d2ec191.1686555698.git.michal.simek@amd.com
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Allow changing TSU clock for all GEMs. Kria SOM is using this
functionality that's why set TSU clock frequency as 250MHz (minimum when
running at 1G) to allow PTP functionality.
Signed-off-by: Harini Katakam <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/3b9285b50a2a4abb136ecb0873343a4e84626581.1686228675.git.michal.simek@amd.com
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Setting default i2c clock frequency for ZynqMP to maximum rate of 400kHz.
Current default value is 100kHz.
Signed-off-by: Varalaxmi Bingi <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/3034ec006c8b11e025904d4cc2524255523636f6.1686227766.git.michal.simek@amd.com
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Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT
binding. Similar change was done by commit 8df80c1801c9 ("ARM: dts: exynos:
Convert to new i2c-gpio bindings").
Signed-off-by: Manikanta Guntupalli <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
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Describe SoC L2 cache hierarchy.
Signed-off-by: Radhey Shyam Pandey <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/130e5a6acbee94809b63a61cde5450fbff88cc9c.1685964230.git.michal.simek@amd.com
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Using fixed partitions is recommended way how to describe QSPI. Also add
label for qspi flash memory to be able to reference it in future.
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/7368dc772d8dc29477a880ac2065e2ecb98cf3f5.1684767562.git.michal.simek@amd.com
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