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2024-04-29arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usageRob Herring1-1/+1
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily, it doesn't provide any detail on uarch specific events. There's still remaining cases for CPUs without any corresponding PMU definition and for big.LITTLE systems which only have a single PMU node (there should be one per core type). Signed-off-by: Rob Herring (Arm) <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Jisheng Zhang <[email protected]> Acked-by: Sudeep Holla <[email protected]> Acked-by: Dinh Nguyen <[email protected]> Acked-by: Heiko Stuebner <[email protected]> Acked-by: Bjorn Andersson <[email protected]> Acked-by: Florian Fainelli <[email protected]> Acked-by: Alim Akhtar <[email protected]> Acked-by: Thierry Reding <[email protected]> Acked-by: Shawn Guo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2024-02-12arm64: dts: fsd: Add fifosize for UART in Device TreeTamseel Shams1-0/+2
UART in FSD SoC has fifosize of 64 bytes. Set fifosize as 64 bytes for UART from Device Tree. Signed-off-by: Tamseel Shams <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-12-13arm64: dts: fsd: Add MFC related DT enteriesAakarsh Jain1-0/+21
Add MFC DT node and reserve memory node for MFC usage. Cc: <[email protected]> Signed-off-by: Smitha T Murthy <[email protected]> Signed-off-by: Aakarsh Jain <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-12-07arm64: dts: fsd: add specific compatibles for Tesla FSDKrzysztof Kozlowski1-16/+16
Tesla FSD is a derivative of Samsung Exynos SoC, thus just like the others it reuses several devices from older designs. Historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add Tesla FSD compatible specific to be used with an existing fallback. This will also help reviews of new code using existing DTS as template. No functional impact on Linux drivers behavior. Acked-by: Conor Dooley <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-07-10arm64: dts: fsd: minor whitespace cleanup around '='Krzysztof Kozlowski1-2/+2
The DTS code coding style expects exactly one space before and after '=' sign. Reviewed-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-01-17arm64: dts: fsd: Add sound card node for Tesla FSDPadmanabhan Rajanbabu1-0/+33
Add device tree node support for sound card on Tesla FSD platform Signed-off-by: Padmanabhan Rajanbabu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-01-17arm64: dts: fsd: Add codec node for Tesla FSDPadmanabhan Rajanbabu1-0/+12
Add device tree node support for codec on Tesla FSD platform. Signed-off-by: Padmanabhan Rajanbabu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-01-17arm64: dts: fsd: Add I2S DAI node for Tesla FSDPadmanabhan Rajanbabu3-0/+56
Add device tree node for I2S0 and I2S1 CPU DAI instances for Tesla FSD platform. FSD SoC has 2 I2S instances driving stereo channel I2S audio playback and capture with external DMA support. Signed-off-by: Padmanabhan Rajanbabu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2023-01-02arm64: dts: fsd: fix PUD values as per FSD HW UMPadmanabhan Rajanbabu1-7/+7
PUD values used for UFS, SPI and UART are not reflecting the default values recommended by FSD HW UM. Therefore, changing the same to comply with HW UM recommendation. Signed-off-by: Padmanabhan Rajanbabu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-12-26arm64: dts: fsd: add sysreg device nodeSriranjani P1-0/+20
Add SYSREG controller device node, which is available in PERIC, FSYS0, FSYS1 and CAM block of FSD SoC. Signed-off-by: Alim Akhtar <[email protected]> Signed-off-by: Pankaj Dubey <[email protected]> Signed-off-by: Sriranjani P <[email protected]> Reviewed-by: Ravi Patel <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-12-26arm64: dts: fsd: Add MCAN device nodeVivek Yadav3-0/+112
Add MCAN device node and enable the same for FSD platform. This also adds the required pin configuration for the same. Signed-off-by: Sriranjani P <[email protected]> Signed-off-by: Vivek Yadav <[email protected]> Reviewed-by: Pankaj Dubey <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-12-26arm64: dts: fsd: Update cache propertiesPierre Gondois1-0/+2
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-10-18arm64: dts: fsd: fix drive strength values as per FSD HW UMPadmanabhan Rajanbabu1-13/+13
Drive strength values used for HSI2C, SPI and UART are not reflecting the default values recommended by FSD HW UM. Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") Signed-off-by: Padmanabhan Rajanbabu <[email protected]> Reviewed-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-10-18arm64: dts: fsd: fix drive strength macros as per FSD HW UMPadmanabhan Rajanbabu2-7/+7
Drive strength macros defined for FSD platform is not reflecting actual names and values as per HW UM. FSD SoC pinctrl has following four levels of drive-strength and their corresponding values: Level-1 <-> 0 Level-2 <-> 1 Level-4 <-> 2 Level-6 <-> 3 The commit 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") used drive strength macros defined for Exynos4 SoC family. For some IPs the macros values of Exynos4 matched and worked well, but Exynos4 SoC family drive-strength (names and values) is not exactly matching with FSD SoC. Fix the drive strength macros to reflect actual names and values given in FSD HW UM. Fixes: 684dac402f21 ("arm64: dts: fsd: Add initial pinctrl support") Signed-off-by: Padmanabhan Rajanbabu <[email protected]> Reviewed-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-06-07arm64: dts: fsd: use local header for pinctrl register valuesKrzysztof Kozlowski2-52/+85
The DTS uses hardware register values directly in pin controller pin configuration. These are not some IDs or other abstraction layer but raw numbers used in the registers. These numbers were previously put in the bindings header to avoid code duplication and to provide some context meaning (name), but they do not fit the purpose of bindings. It is also quite confusing to use constants prefixed with Exynos for other SoC, because there is actually nothing here in common, except the actual value. Store the constants in a header next to DTS and use them instead of bindings. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Chanho Park <[email protected]> Acked-by: Rob Herring <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-06-06arm64: dts: fsd: add ufs device nodeAlim Akhtar3-0/+47
Adds FSD ufs device node and enable the same for fsd platform. This also adds the required pin configuration for the same. Signed-off-by: Bharat Uppal <[email protected]> Signed-off-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-06-06arm64: dts: fsd: Add cpu cache informationAlim Akhtar1-0/+91
Add CPU caches information so that the same is available to userspace via sysfs. This SoC has 48/32 KB I/D cache for each CPU cores and 4MB of L2 cache. Signed-off-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-05-04arm64: dts: fsd: drop useless 'dma-channels/requests' propertiesKrzysztof Kozlowski1-8/+0
The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <[email protected]> Suggested-by: Marek Szyprowski <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-04-04arm64: dts: tesla: add a specific compatible to MCT on FSDKrzysztof Kozlowski1-1/+1
One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which is correct but not specific enough. The MCT blocks have different number of interrupts, so add a second specific compatible to Tesla FSD. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2022-03-16arm64: dts: fsd: Add the MCT supportAlim Akhtar1-0/+23
Add node relevant to support MCT, which is used as one of the system timer on this SoC. Signed-off-by: Alim Akhtar <[email protected]> Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Link: https://lore.kernel.org/r/[email protected]' Signed-off-by: Arnd Bergmann <[email protected]>
2022-01-29arm64: dts: fsd: Add SPI device nodesAswani Reddy1-0/+57
Adds device tree node for SPI IPs Cc: [email protected] Signed-off-by: Aswani Reddy <[email protected]> Signed-off-by: Alim Akhtar <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-01-26arm64: dts: fsd: Add initial pinctrl supportAlim Akhtar2-0/+357
Add initial pin configuration nodes for FSD SoC. Cc: [email protected] Signed-off-by: Shashank Prashar <[email protected]> Signed-off-by: Aswani Reddy <[email protected]> Signed-off-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
2022-01-26arm64: dts: fsd: Add initial device tree supportAlim Akhtar3-0/+694
Add initial device tree support for "Full Self-Driving" (FSD) SoC This SoC contain three clusters of four cortex-a72 CPUs and various peripheral IPs. Cc: [email protected] Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Arjun K V <[email protected]> Signed-off-by: Aswani Reddy <[email protected]> Signed-off-by: Ajay Kumar <[email protected]> Signed-off-by: Sriranjani P <[email protected]> Signed-off-by: Chandrasekar R <[email protected]> Signed-off-by: Shashank Prashar <[email protected]> Signed-off-by: Alim Akhtar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
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