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2024-11-01Merge tag 'qcom-arm64-fixes-for-6.12-2' of ↵Arnd Bergmann8-26/+49
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into HEAD More Qualcomm Arm64 DeviceTree fixes for v6.12 Bring a range of PCIe fixes across the X Elite platform, as well as marking the NVMe power supply boot-on to avoid glitching the power supply during boot. The X Elite CRD audio configuration sees a spelling mistake corrected. On SM8450 the PCIe 1 PIPE clock definition is corrected, to fix a regression where this isn't able to acquire it's clocks. * tag 'qcom-arm64-fixes-for-6.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: x1e80100: fix PCIe5 interconnect arm64: dts: qcom: x1e80100: fix PCIe4 interconnect arm64: dts: qcom: x1e80100: Fix up BAR spaces arm64: dts: qcom: x1e80100-qcp: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-microsoft-romulus: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-yoga-slim7x: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-vivobook-s15: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-crd: fix nvme regulator boot glitch arm64: dts: qcom: x1e78100-t14s: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-crd Rename "Twitter" to "Tweeter" arm64: dts: qcom: x1e80100: Fix PCIe 6a lanes description arm64: dts: qcom: sm8450 fix PIPE clock specification for pcie1 arm64: dts: qcom: x1e80100: Add Broadcast_AND region in LLCC block arm64: dts: qcom: x1e80100: fix PCIe5 PHY clocks arm64: dts: qcom: x1e80100: fix PCIe4 and PCIe6a PHY clocks Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2024-11-01Merge tag 'qcom-arm64-fixes-for-6.12' of ↵Arnd Bergmann1-1/+1
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into HEAD Qualcomm Arm64 DeviceTree fix for v6.12 This reverts the conversion to use the mailbox binding for RPM IPC interrupts, as this broke boot on msm8939. * tag 'qcom-arm64-fixes-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: msm8939: revert use of APCS mbox for RPM Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100: fix PCIe5 interconnectJohan Hovold1-1/+1
The fifth PCIe controller is connected to the PCIe North ANoC. Fix the corresponding interconnect property so that the OS manages the right path. Fixes: 62ab23e15508 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes") Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100: fix PCIe4 interconnectJohan Hovold1-1/+1
The fourth PCIe controller is connected to the PCIe North ANoC. Fix the corresponding interconnect property so that the OS manages the right path. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: [email protected] # 6.9 Cc: Abel Vesa <[email protected]> Cc: Sibi Sankar <[email protected]> Cc: Rajendra Nayak <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100: Fix up BAR spacesKonrad Dybcio1-5/+5
The 32-bit BAR spaces are reaching outside their assigned register regions. Shrink them to match their actual sizes. This resolves an issue where the regions overlap and one of the controllers won't come up, which can be seen in the log as: qcom-pcie 1c08000.pci: resource collision: [mem 0x7c300000-0x7fffffff] conflicts with 1c00000.pci dbi [mem 0x7e000000-0x7e000f1c] While at it, unify the style. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: [email protected] Signed-off-by: Konrad Dybcio <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Tested-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/[email protected] [bjorn: Added note about overlapping resource regions] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100-qcp: fix nvme regulator boot glitchJohan Hovold1-0/+2
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Fixes: eb57cbe730d1 ("arm64: dts: qcom: x1e80100: Describe the PCIe 6a resources") Cc: [email protected] # 6.11 Cc: Abel Vesa <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100-microsoft-romulus: fix nvme regulator boot glitchJohan Hovold1-0/+2
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Fixes: 09d77be56093 ("arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devices") Cc: Konrad Dybcio <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100-yoga-slim7x: fix nvme regulator boot glitchJohan Hovold1-0/+2
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Fixes: 45247fe17db2 ("arm64: dts: qcom: x1e80100: add Lenovo Thinkpad Yoga slim 7x devicetree") Cc: [email protected] # 6.11 Cc: Srinivas Kandagatla <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100-vivobook-s15: fix nvme regulator boot glitchJohan Hovold1-0/+2
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Fixes: d0e2f8f62dff ("arm64: dts: qcom: Add device tree for ASUS Vivobook S 15") Cc: [email protected] # 6.11 Cc: Xilin Wu <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e80100-crd: fix nvme regulator boot glitchJohan Hovold1-0/+2
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Fixes: eb57cbe730d1 ("arm64: dts: qcom: x1e80100: Describe the PCIe 6a resources") Cc: [email protected] # 6.11 Cc: Abel Vesa <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-24arm64: dts: qcom: x1e78100-t14s: fix nvme regulator boot glitchJohan Hovold1-0/+2
The NVMe regulator has been left enabled by the boot firmware. Mark it as such to avoid disabling the regulator temporarily during boot. Fixes: 7d1cbe2f4985 ("arm64: dts: qcom: Add X1E78100 ThinkPad T14s Gen 6") Cc: Konrad Dybcio <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-22arm64: dts: qcom: x1e80100-crd Rename "Twitter" to "Tweeter"Maya Matuszczyk1-4/+4
This makes the name consistent with both other x1e80100 devices and the dictionary. A UCM fix was merged already and is required in order for sound to work after this commit. Signed-off-by: Maya Matuszczyk <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-16arm64: dts: qcom: x1e80100: Fix PCIe 6a lanes descriptionAbel Vesa1-3/+6
Fix the description and compatible for PCIe 6a, as it is in fact a 4-lanes controller and PHY, but it can also be used in 2-lanes mode. For 4-lanes mode, it uses the lanes provided by PCIe 6b. For 2-lanes mode, PCIe 6a uses 2 lanes and then PCIe 6b uses the other 2 lanes. The number of lanes in which the PHY should be configured depends on a TCSR register value on each individual board. Cc: [email protected] # Depends on pcie-qcom 16.0 GT/s support Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Signed-off-by: Abel Vesa <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Reviewed-by: Johan Hovold <[email protected]> Tested-by: Johan Hovold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-14arm64: dts: qcom: sm8450 fix PIPE clock specification for pcie1Dmitry Baryshkov1-1/+1
For historical reasons on SM8450 the second PCIe host (pcie1) also keeps a reference to the PIPE clock coming from the PHY. Commit e76862840660 ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc") has updated the PHY to use #clock-cells = <1>, making just <&pcie1_phy> clock specification invalid. Update corresponding clock entry in the PCIe1 host node. /soc@0/pcie@1c08000: Failed to get clk index: 2 ret: -22 qcom-pcie 1c08000.pcie: Failed to get clocks qcom-pcie 1c08000.pcie: probe with driver qcom-pcie failed with error -22 Fixes: e76862840660 ("arm64: dts: qcom: sm8450: correct pcie1 phy clocks inputs to gcc") Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Reviewed-by: Neil Armstrong <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-14arm64: dts: qcom: x1e80100: Add Broadcast_AND region in LLCC blockAbel Vesa1-2/+4
Add missing Broadcast_AND region to the LLCC block for x1e80100, as the LLCC version on this platform is 4.1 and it provides the region. This also fixes the following error caused by the missing region: [ 3.797768] qcom-llcc 25000000.system-cache-controller: error -EINVAL: invalid resource (null) This error started showing up only after the new regmap region called Broadcast_AND that has been added to the llcc-qcom driver. Cc: [email protected] # 6.11: 055afc34fd21: soc: qcom: llcc: Add regmap for Broadcast_AND region Fixes: af16b00578a7 ("arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts") Signed-off-by: Abel Vesa <[email protected]> Link: https://lore.kernel.org/r/20241014-x1e80100-dts-llcc-add-broadcastand_region-v2-1-5ee6ac128627@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-05arm64: dts: qcom: x1e80100: fix PCIe5 PHY clocksJohan Hovold1-3/+5
Add the missing clkref enable and pipediv2 clocks to the PCIe5 PHY. Fixes: 62ab23e15508 ("arm64: dts: qcom: x1e80100: add PCIe5 nodes") Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-10-05arm64: dts: qcom: x1e80100: fix PCIe4 and PCIe6a PHY clocksJohan Hovold1-6/+10
Add the missing clkref enable and pipediv2 clocks to the PCIe4 and PCIe6a PHYs. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: [email protected] # 6.9 Cc: Abel Vesa <[email protected]> Signed-off-by: Johan Hovold <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-09-17Merge tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds75-225/+6332
Pull SoC devicetree updates from Arnd Bergmann: "New SoC support for Broadcom bcm2712 (Raspberry Pi 5) and Renesas R9A09G057 (RZ/V2H(P)) and Qualcomm Snapdragon 414 (MSM8929), all three of these are variants of already supported chips, in particular the last one is almost identical to MSM8939. Lots of updates to Mediatek, ASpeed, Rockchips, Amlogic, Qualcomm, STM32, NXP i.MX, Sophgo, TI K3, Renesas, Microchip at91, NVIDIA Tegra, and T-HEAD. The added Qualcomm platform support once again dominates the changes, with seven phones and three laptops getting added in addition to many new features on existing machines. The Snapdragon X1E support specifically keeps improving. The other new machines are: - eight new machines using various 64-bit Rockchips SoCs, both on the consumer/gaming side and developer boards - three industrial boards with 64-bit i.MX, which is a very low number for them. - four more servers using a 32-bit Speed BMC - three boards using STM32MP1 SoCs - one new machine each using allwinner, amlogic, broadcom and renesas chips" * tag 'soc-dt-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (672 commits) arm64: dts: allwinner: h5: NanoPi NEO Plus2: Use regulators for pio arm64: dts: mediatek: add audio support for mt8365-evk arm64: dts: mediatek: add afe support for mt8365 SoC arm64: dts: mediatek: mt8186-corsola: Disable DPI display interface arm64: dts: mediatek: mt8186: Add svs node arm64: dts: mediatek: mt8186: Add power domain for DPI arm64: dts: mediatek: mt8195: Correct clock order for dp_intf* arm64: dts: mt8183: add dpi node to mt8183 arm64: dts: allwinner: h5: NanoPi Neo Plus2: Fix regulators arm64: dts: rockchip: add CAN0 and CAN1 interfaces to mecsbc board arm64: dts: rockchip: add CAN-FD controller nodes to rk3568 arm64: dts: nuvoton: ma35d1: Add uart pinctrl settings arm64: dts: nuvoton: ma35d1: Add pinctrl and gpio nodes arm64: dts: nuvoton: Add syscon to the system-management node ARM: dts: Fix undocumented LM75 compatible nodes arm64: dts: toshiba: Fix pl011 and pl022 clocks ARM: dts: stm32: Use SAI to generate bit and frame clock on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Switch bitclock/frame-master to flag on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Sort properties in audio endpoints on STM32MP15xx DHCOM PDK2 ARM: dts: stm32: Add MECIO1 and MECT1S board variants ...
2024-09-04arm64: dts: qcom: msm8939: revert use of APCS mbox for RPMFabien Parent1-1/+1
Commit 22e4e43484c4 ("arm64: dts: qcom: msm8939: Use mboxes properties for APCS") broke the boot on msm8939 platforms. The issue comes from the SMD driver failing to request the mbox channel because of circular dependencies: 1. rpm -> apcs1_mbox -> rpmcc (RPM_SMD_XO_CLK_SRC) -> rpm. 2. rpm -> apcs1_mbox -> gcc -> rpmcc (RPM_SMD_XO_CLK_SRC) -> rpm 3. rpm -> apcs1_mbox -> apcs2 -> gcc -> rpmcc (RPM_SMD_XO_CLK_SRC) -> rpm To fix this issue let's switch back to using the deprecated qcom,ipc property for the RPM node. Fixes: 22e4e43484c4 ("arm64: dts: qcom: msm8939: Use mboxes properties for APCS") Signed-off-by: Fabien Parent <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-30arm64: dts: qcom: x1e80100: Fix PHY for DP2Abel Vesa1-5/+5
The actual PHY used by MDSS DP2 is the USB SS2 QMP one. So switch to it instead. This is needed to get external DP support on boards like CRD where the 3rd Type-C USB port (right-hand side) is connected to DP2. Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes") Signed-off-by: Abel Vesa <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/20240829-x1e80100-dts-dp2-use-qmpphy-ss2-v1-1-9ba3dca61ccc@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-30arm64: dts: qcom: qcm6490-idp: Add SD Card nodeSachin Gupta1-0/+33
Add SD Card node for Qualcomm qcm6490-idp Board. Signed-off-by: Sachin Gupta <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Caleb Connolly <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-30arm64: dts: qcom: x1e80100: Add orientation-switch to all USB+DP QMP PHYsAbel Vesa1-0/+6
All three USB SS combo QMP PHYs need to power off, deinit, then init and power on again on every plug in event. This is done by forwarding the orientation from the retimer/mux to the PHY. All is needed is the orientation-switch property in each such PHY devicetree node. So add them. Fixes: 4af46b7bd66f ("arm64: dts: qcom: x1e80100: Add USB nodes") Signed-off-by: Abel Vesa <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/20240829-x1e80100-combo-qmpphys-add-orientation-switch-v1-1-5c61ea1794da@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-30arm64: dts: qcom: Add X1E78100 ThinkPad T14s Gen 6Konrad Dybcio2-0/+808
Add support for the aforementioned laptop. That includes: - input methods, incl. lid switch (keyboard needs the pdc wakeup-parent removal hack..) - NVMe, WiFi - USB-C ports - GPU, display - DSPs Notably, the USB-A ports on the side are depenedent on the USB multiport controller making it upstream. At least one of the eDP panels used (non-touchscreen) identifies as BOE 0x0b66. See below for the hardware description from the OEM. Link: https://www.lenovo.com/us/en/p/laptops/thinkpad/thinkpadt/lenovo-thinkpad-t14s-gen-6-(14-inch-snapdragon)/len101t0099 Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-30Revert "arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash"André Apitzsch1-26/+0
Patch "arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash" has been applied twice. This reverts the older version of the patch. Revert the commit f98bdb21cfc9 ("arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash") Fixes: f98bdb21cfc9 ("arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flash") Signed-off-by: André Apitzsch <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-26arm64: dts: qcom: Add support for X1-based Surface Laptop 7 devicesKonrad Dybcio4-0/+863
Add support for Surface Laptop 7 machines, based on X1E80100. The feature status is mostly on par with other X Elite machines, notably lacking: - USB-A and probably USB-over-Surface-connector (pending NXP retimer support) - SD card reader (Realtek RTS5261 connected over PCIe) - Touchscreen and touchpad support (hid-over-SPI [1]) - Audio (a quick look suggests the setup is very close to the one in X1E CRD) The two Surface Laptop 7 SKUs (13.8" and 15") only have very minor differences, amounting close to none on the software side. Even the MBN firmware files and ACPI tables are shared between the two machines. With that in mind, support is added for both, although only the larger one was physically tested. Display differences will be taken care of through fused-in EDID and other matters should be solved within the EC and boot firmware. [1] https://www.microsoft.com/en-us/download/details.aspx?id=103325 Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-26arm64: dts: qcom: x1e80100: Add UART2Konrad Dybcio1-5/+65
GENI SE2 within QUP0 is used as UART on some devices, describe it. While at it, rewrite the adjacent UART21 pins node to make it more easily modifiable. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-26arm64: dts: qcom: x1e80100-pmics: Add PMC8380C PWMKonrad Dybcio1-0/+8
The PMC8380C (PM8550) has a PWM block, describe it. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-21arm64: dts: qcom: sm8150-mtp: drop incorrect amd,imageonKrzysztof Kozlowski1-5/+0
The SM8150 MTP board does not have magically different GPU than the SM8150, so it cannot use amd,imageon compatible, also pointed by dtbs_check: sm8150-mtp.dtb: gpu@2c00000: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,adreno-640.1', 'qcom,adreno', 'amd,imageon'] is too long 'qcom,adreno-640.1' does not match '^qcom,adreno-[0-9a-f]{8}$' 'qcom,adreno-640.1' does not match '^amd,imageon-200\\.[0-1]$' 'amd,imageon' was expected The incorrect amd,imageon compatible was added in commit f30ac26def18 ("arm64: dts: qcom: add sm8150 GPU nodes") to the SM8150 and later moved to the SM8150 MTP board in commit 1642ab96efa4 ("arm64: dts: qcom: sm8150: Don't start Adreno in headless mode") with an intention to allow headless mode. This should be solved via proper driver quirks, not fake compatibles. Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-20arm64: qcom: sa8775p: Add ADSP and CDSP0 fastrpc nodesLing Xu1-0/+218
Add ADSP and CDSP0 fastrpc nodes. Signed-off-by: Ling Xu <[email protected]> Reviewed-by: Bartosz Golaszewski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-20arm64: dts: qcom: x1e80100: Add USB Multiport controllerKonrad Dybcio1-0/+170
X1E80100 has a multiport controller with 2 HS (eUSB) and 2 SS PHYs attached to it. It's commonly used for USB-A ports and internally routed devices. Configure it to support such functionality. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-16arm64: dts: qcom: sa8775p: fix the fastrpc labelBartosz Golaszewski1-1/+1
The fastrpc driver uses the label to determine the domain ID and create the device nodes. It should be "cdsp1" as this is the engine we use here. Fixes: df54dcb34ff2 ("arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodes") Reported-by: Ekansh Gupta <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-15arm64: dts: qcom: ipq5332: Add icc provider ability to gccVaradarajan Narayanan1-2/+5
IPQ SoCs dont involve RPM in managing NoC related clocks and there is no NoC scaling. Linux itself handles these clocks. However, these should not be exposed as just clocks and align with other Qualcomm SoCs that handle these clocks from a interconnect provider. Hence include icc provider capability to the gcc node so that peripherals can use the interconnect facility to enable these clocks. Change USB to use the icc-clk framework for the iface clock. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Varadarajan Narayanan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-15arm64: dts: qcom: sm8250: move lpass codec macros to use clks directlySrinivas Kandagatla1-27/+4
Move lpass codecs va and wsa macros to use the clks directly from AFE clock controller instead of going via gfm mux like other codec macros and SoCs. This makes it more align with the other SoCs and codec macros in this SoC which take AFE clocks directly. This will also avoid an extra clk mux layer, provides consistency and avoids the buggy mux driver which will be removed. This should also fix RB5 audio. Remove the gfm mux drivers for both audiocc and aoncc. Signed-off-by: Srinivas Kandagatla <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-15arm64: dts: qcom: msm8998: Add disabled support for LPASS iommu for Q6AngeloGioacchino Del Regno1-0/+27
Add support for the LPASS (Q6) SMMU and keep it disabled as this is used only when the audio DSP is present and used, which is not mandatory to have. It is expected for board-specific device-trees to enable this node if supported. Signed-off-by: AngeloGioacchino Del Regno <[email protected]> Signed-off-by: Marc Gonzalez <[email protected]> Link: https://lore.kernel.org/r/[email protected] [bjorn: s/iface/bus in clock-names, to match binding] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: msm8976: Add restart nodeBarnabás Czémán1-0/+5
Add a pshold restart node what can be found in downstream for enable to perform restart operations. Signed-off-by: Barnabás Czémán <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sa8775p: add CPU idle statesBartosz Golaszewski1-0/+115
Add CPU idle-state nodes and power-domains to the .dtsi for SA8775P. Signed-off-by: Bartosz Golaszewski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: x1e80100-yoga: Update panel bindingsRob Clark1-2/+15
Use the correct panel compatible, and wire up enable-gpio. It is wired up in the same way as the x1e80100-crd. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Abel Vesa <[email protected]> Reviewed-by: Stephan Gerhold <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: msm8916-samsung-gt58: Enable the touchkeysNikita Travkin1-0/+1
The tablet has two capacitive buttons on the scren bezel. Enable them by adding the keycodes in the dt. Signed-off-by: Nikita Travkin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sc8280xp-x13s: Enable RGB sensorBryan O'Donoghue1-0/+67
Enable the main RGB sensor on the Lenovo x13s a five megapixel 2 lane DPHY MIPI sensor connected to cisphy0. With the pm8008 patches recently applied to the x13s dtsi we can now also enable the RGB sensor. Once done we have all upstream support necessary for the RGB sensor on x13s. Reviewed-by: Vladimir Zapolskiy <[email protected]> Signed-off-by: Bryan O'Donoghue <[email protected]> Link: https://lore.kernel.org/r/20240806-b4-linux-next-24-07-31-camss-sc8280xp-lenovo-rgb-v2-v3-1-199767fb193d@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sa8775p-ride: enable remoteprocsBartosz Golaszewski1-0/+25
Enable all remoteproc nodes on the sa8775p-ride board and point to the appropriate firmware files. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]> Link: https://lore.kernel.org/r/20240805-topic-sa8775p-iot-remoteproc-v4-6-86affdc72c04@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sa8775p: add ADSP, CDSP and GPDSP nodesTengfei Fan1-0/+548
Add nodes for remoteprocs: ADSP, CDSP0, CDSP1, GPDSP0 and GPDSP1 for SA8775p SoCs. Reviewed-by: Dmitry Baryshkov <[email protected]> Signed-off-by: Tengfei Fan <[email protected]> [Ling: added the fastrcp nodes] Co-developed-by: Ling Xu <[email protected]> Signed-off-by: Ling Xu <[email protected]> [Bartosz: ported to mainline] Co-developed-by: Bartosz Golaszewski <[email protected]> Signed-off-by: Bartosz Golaszewski <[email protected]> Link: https://lore.kernel.org/r/20240805-topic-sa8775p-iot-remoteproc-v4-5-86affdc72c04@linaro.org Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: msm8916-samsung-j3ltetw: Add initial device treeLin, Meng-Bo3-0/+94
The dts and dtsi add support for msm8916 variant of Samsung Galaxy J3 SM-J320YZ smartphone released in 2016. Add a device tree for SM-J320YZ with initial support for: - GPIO keys - SDHCI (internal and external storage) - USB Device Mode - UART (on USB connector via the SM5703 MUIC) - WCNSS (WiFi/BT) - Regulators - QDSP6 audio - Speaker/earpiece/headphones/microphones via digital/analog codec in MSM8916/PM8916 - WWAN Internet via BAM-DMUX - Touchscreen - Accelerometer There are different variants of J3, with some differences in MUIC, sensor, NFC and touch key I2C buses. The common parts are shared in msm8916-samsung-j3-common.dtsi to reduce duplication. Signed-off-by: Lin, Meng-Bo <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sm8350: add refgen regulatorDmitry Baryshkov1-0/+8
On SM8350 platform the DSI internally is using the refgen regulator. Add corresponding device node and link it as a supply to the DSI node. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sm8350: add MDSS registers interconnectDmitry Baryshkov1-2/+6
Aside from the MDSS<->MEM interconnect, display devices have separate interconnect for register access. Add this interconnect to the display node. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sm7125-xiaomi-common: Add reset-gpios for ufs_mem_hcDanila Tikhonov1-0/+2
The SC7180/SM7125 SoCs have a special pin for UFS reset. Generally, this pin is the same for all devices on the same SoC because it is hardcoded in the pinctrl driver. Therefore, it might seem appropriate to add this pin configuration in sc7180.dtsi. However, this pin is defined in the device-specific DTS files instead of the SoC-level DTS files in all Qualcomm DTS. To maintain consistency with this approach, we will follow the same style. Add reset-gpios to ufs_mem_hc. Signed-off-by: Danila Tikhonov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: sa8775p: Add CPU and LLCC BWMONTengfei Fan1-0/+95
Add CPU and LLCC BWMON nodes and their corresponding opp tables for SA8775p SoC. SA8775p has two cpu clusters, with each cluster having a set of CPU-to-LLCC BWMON registers. Consequently, there are two sets of CPU-to-LLCC registers. Signed-off-by: Tengfei Fan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: msm8939-longcheer-l9100: Add rear flashAndré Apitzsch1-0/+27
The phone has a Silergy SY7802 flash LED controller. Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: André Apitzsch <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: add generic compat string to RPM glink channelsDmitry Baryshkov15-15/+15
Add the generic qcom,smd-rpm / qcom,glink-smd-rpm compatible to RPM nodes to follow the schema. Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: x1e80100: Fix Adreno SMMU global interruptKonrad Dybcio1-1/+1
Fix the unfortunate off-by-one. Fixes: 721e38301b79 ("arm64: dts: qcom: x1e80100: Add gpu support") Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
2024-08-14arm64: dts: qcom: disable GPU on x1e80100 by defaultDmitry Baryshkov3-1/+18
The GPU on X1E80100 requires ZAP 'shader' file to be useful. Since the file is signed by the OEM keys and might be not available by default, disable the GPU node and drop the firmware name from the x1e80100.dtsi file. Devices not being fused to use OEM keys can specify generic location at `qcom/x1e80100/gen70500_zap.mbn` while enabling the GPU. The CRD and QCP were lucky enough to work with the default settings, so reenable the GPU on those platforms and provide correct firmware-name (including the SoC subdir). Fixes: 721e38301b79 ("arm64: dts: qcom: x1e80100: Add gpu support") Cc: Akhil P Oommen <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> Reviewed-by: Caleb Connolly <[email protected]> Reviewed-by: Akhil P Oommen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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