| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
Every described BCM4908 board has WP pin not connected. This caused
problems for drivers since day 0 but there was no property to describe
that properly. Projects like OpenWrt were modifying Linux driver to deal
with it.
It's not clear if that is hardware limitation or just reference design
being copied over and over but this applies to all known / supported
BCM4908 boards. Handle it by marking WP as not connected by default.
Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull more ARM SoC updates from Arnd Bergmann:
"These are changes that for some reason ended up not making it into the
first four branches but that should still make it into 6.9:
- A rework of the omap clock support that touches both drivers and
device tree files
- The reset controller branch changes that had a dependency on late
bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
drivers branch
- The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
changes that got delayed and needed some extra time in linux-next
for wider testing"
* tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
soc: fsl: dpio: fix kcalloc() argument order
bus: ts-nbus: Improve error reporting
bus: ts-nbus: Convert to atomic pwm API
riscv: dts: starfive: jh7110: Add camera subsystem nodes
ARM: bcm: stop selecing CONFIG_TICK_ONESHOT
ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
clk: ti: Improve clksel clock bit parsing for reg property
clk: ti: Handle possible address in the node name
dt-bindings: pwm: opencores: Add compatible for StarFive JH8100
dt-bindings: riscv: cpus: reg matches hart ID
reset: Instantiate reset GPIO controller for shared reset-gpios
reset: gpio: Add GPIO-based reset controller
cpufreq: do not open-code of_phandle_args_equal()
of: Add of_phandle_args_equal() helper
reset: simple: add support for Sophgo SG2042
dt-bindings: reset: sophgo: support SG2042
riscv: dts: microchip: add specific compatible for mpfs pdma
riscv: dts: microchip: add missing CAN bus clocks
ARM: brcmstb: Add debug UART entry for 74165
...
|
|
Enable the nand controller and add WP pin connection property in actual
board dts as they are board level properties now that they are disabled
and moved out from SoC dtsi.
Also remove the unnecessary brcm,nand-has-wp property from AC5300 board.
This property is only needed for some old controller that this board
does not apply.
Signed-off-by: William Zhang <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
|
|
Add support for Broadcom STB NAND controller in BCMBCA ARMv8 chip dts
files.
Signed-off-by: William Zhang <[email protected]>
Reviewed-by: David Regan <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
Link: https://lore.kernel.org/linux-mtd/[email protected]
|
|
Ethernet switch does not have addressable subnodes.
This fixes:
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dtb: ethernet-switch@0: '#address-cells', '#size-cells' do not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/net/dsa/brcm,sf2.yaml#
Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Defining NVMEM cells as direct subnodes is deprecated since commit
bd912c991d2e ("dt-bindings: nvmem: layouts: add fixed-layout"). Use new
syntax based on NVMEM layout.
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add missing whitespace between node name/label and opening {.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:
bcm94908.dtb: l2-cache0: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
This device has 2 USB LEDs meant to be triggered by devices in relevant
USB ports.
While at it fix typo in USB LED name.
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Florian Fainelli <[email protected]>
|
|
This device has 2 USB LEDs meant to be triggered by devices in relevant
USB ports.
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Florian Fainelli <[email protected]>
|
|
BCM4908 has 3 USB controllers each with 2 USB ports. Home routers often
have LEDs indicating state of selected USB ports. Describe those SoC USB
ports to allow using them as LED trigger sources.
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Florian Fainelli <[email protected]>
|
|
This fixes:
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: syscon@280000: $nodename:0: 'syscon@280000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
From schema: schemas/simple-bus.yaml
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Florian Fainelli <[email protected]>
|
|
This fixes:
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dtb: leds@800: 'led-lan@19', 'led-power@11', 'led-wan-red@12', 'led-wan-white@15', 'led-wps@14' do not match any of the regexes: '^led@[a-f0-9]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/leds/leds-bcm63138.yaml
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Florian Fainelli <[email protected]>
|
|
This fixes:
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: interrupt-names:0: 'nand_ctlrdy' was expected
From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add support for HSSPI controller in ARMv8 chip dts files.
Signed-off-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Acked-by: William Zhang <[email protected]>
Signed-off-by: Pierre Gondois <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
BCM6858 contains TWD block with timers, watchdog, and reset subblocks.
Describe it.
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
BCM4908 TWD contains block with 4 timers. Add binding for it.
Signed-off-by: Rafał Miłecki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoC changes for 6.1,
please pull the following:
- Rafal adds the BCM4908 LED controller node and describes all 32 LED
pins, he also adds support for the Asus GC-AC5300 LEDs
* tag 'arm-soc/for-6.1/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcm4908: add Asus GT-AC5300 LEDs
arm64: dts: broadcom: bcm4908: add LEDs controller block
arm64: dts: broadcom: bcm4908: add remaining LED pins
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Arnd Bergmann <[email protected]>
|
|
Add generic bare bone bcm94908.dts file to support any 4908 based
design. It supports cpu subsystem, memory and an uart console. This can
be useful for board bring-up and cpu subsystem and memory related kernel
test as well.
Signed-off-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
As part of ARCH_BCM4908 to ARCH_BCMBCA migration, move the BCM4908 dts
files to bcmbca folder and use CONFIG_ARCH_BCMBCA to build all the
BCM4908 board dts. Delete bcm4908 folder and its makefile as well.
Signed-off-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
It's a home router with 1 GiB of RAM, 6 Ethernet ports, 2 USB ports.
Signed-off-by: Rafał Miłecki <[email protected]>
Acked-by: William Zhang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add DTS for ARMv8 based broadband SoC BCM6813. bcm6813.dtsi is the
SoC description DTS header and bcm96813.dts is a simple DTS file for
Broadcom BCM96813 Reference board that only enable the UART port.
Signed-off-by: William Zhang <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add DTS for ARMv8 based broadband SoC BCM6856. bcm6856.dtsi is the
SoC description DTS header and bcm96856.dts is a simple DTS file for
Broadcom BCM96956 Reference board that only enable the UART port.
Signed-off-by: William Zhang <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add DTS for ARMv8 based broadband SoC BCM63146. bcm63146.dtsi is the
SoC description DTS header and bcm963146.dts is a simple DTS file for
Broadcom BCM963146 Reference board that only enable the UART port.
Signed-off-by: William Zhang <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add DTS for ARMv8 based broadband SoC BCM6858. bcm6858.dtsi is the SoC
description DTS header and bcm96858.dts is a simple DTS file for
Broadcom BCM96858 Reference board that only enables the UART port.
Signed-off-by: Anand Gore <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add DTS for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
SoC description DTS header and bcm94912.dts is a simple DTS file for
Broadcom BCM94912 Reference board that only enable the UART port.
Signed-off-by: William Zhang <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
|
|
Add DTS for ARMv8 based broadband SoC BCM63158. bcm63158.dtsi is the
SoC description DTS header and bcm963158.dts is a simple DTS file for
Broadcom BCM963158 Reference board that only enable the UART port.
Signed-off-by: William Zhang <[email protected]>
Signed-off-by: Florian Fainelli <[email protected]>
|