aboutsummaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/arm
AgeCommit message (Collapse)AuthorFilesLines
2021-03-15arm64: dts: juno: Enable more SMMUsRobin Murphy3-1/+8
Now that PCI inbound window restrictions are handled generically between the of_pci resource parsing and the IOMMU layer, and described in the Juno DT, we can finally enable the PCIe SMMU without the risk of DMA mappings inadvertently allocating unusable addresses. Similarly, the relevant support for IOMMU mappings for peripheral transfers has been hooked up in the pl330 driver for ages, so we can happily enable the DMA SMMU without that breaking anything either. Link: https://lore.kernel.org/r/a730070d718cb119f77c8ca1782a0d4189bfb3e7.1614965598.git.robin.murphy@arm.com Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-03-15arm64: dts: juno: Describe PCI dma-rangesRobin Murphy1-0/+4
The PLDA root complex on Juno relies on an address-based lookup table to generate AXI attributes for inbound PCI transactions, and as such will not pass any transaction not matching any programmed address range. The standard firmware configuration programs 3 entries covering the GICv2m MSI doorbell and the 2 DRAM regions, so add a "dma-ranges" property to describe those usable inbound windows. Link: https://lore.kernel.org/r/720d0a9a42e33148fcac45cd39a727093a32bf32.1614965598.git.robin.murphy@arm.com Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-09-07arm64: dts: arm: Fix SP805 clock-namesAndre Przywara2-2/+2
The SP805 binding sets the name for the actual watchdog clock to "wdog_clk" (with an underscore). Change the name in the DTs for ARM Ltd. platforms to match that. The Linux and U-Boot driver use the *first* clock for this purpose anyway, so it does not break anything. Link: https://lore.kernel.org/r/20200828130602.42203-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: juno: Fix SCPI shared mem node nameAndre Przywara1-2/+2
The SRAM DT binding requires child nodes to use a certain node name scheme. Change the naming from scp-shmem to scp-sram to comply with that. Link: https://lore.kernel.org/r/20200513103016.130417-19-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: juno: Fix GPU interrupt orderAndre Przywara1-4/+4
The Mali binding insists on the GPU interrupts to be in ordered as: job, mmu, gpu. Sort the GPU interrupts and interrupt-names properties accordingly. Link: https://lore.kernel.org/r/20200513103016.130417-17-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: fvp/juno: Fix bus node namesAndre Przywara5-8/+8
Most Arm Ltd. boards are employing a layered bus structure, to map the hardware design (SoC, motherboard, IOFPGA) and structure the DTs. The "simple-bus" nodes only allow a limited set of node names. Switch to use *-bus to be binding compliant. This relies on a pending dt-schema.git fix for now: https://github.com/devicetree-org/dt-schema/pull/38 Link: https://lore.kernel.org/r/20200513103016.130417-16-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: fvp: Fix SMMU DT nodeAndre Przywara1-4/+4
The SMMU name in the RevC FVP DT file was not fully binding compliant. Adjust the node name to match the binding's list of allowed names, also shuffle the order of the interrupts to comply with the expected order. Link: https://lore.kernel.org/r/20200513103016.130417-15-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: fvp/juno: Fix serial node namesAndre Przywara3-9/+9
The UARTs for all Arm Ltd. boards were using "uart" as their node name stub. Replace that with the required "serial" string, to comply with the PL011 DT binding. Link: https://lore.kernel.org/r/20200513103016.130417-14-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18arm64: dts: juno: Use proper DT node name for USBAndre Przywara1-2/+2
The EHCI/OCHI DT binding requires to use "usb" as the node name stub. Replace the existing name with "usb" to comply with the binding. Link: https://lore.kernel.org/r/20200513103016.130417-13-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Fix ITS node names and #msi-cellsAndre Przywara2-2/+3
The GIC ITS nodes in the fastmodel DTS files were not fully binding compliant. Use one of the allowed node names, also add the required #msi-cells property for the older model. Link: https://lore.kernel.org/r/20200513103016.130417-12-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Fix GIC child nodesAndre Przywara3-48/+48
The GIC DT nodes for the fastmodels were not fully compliant with the DT binding, which has certain expectations about child nodes and their size and address cells values. Use smaller #address-cells and #size-cells values, as the binding requests, and adjust the reg properties accordingly. This requires adjusting the interrupt nexus nodes as well, as one field of the interrupt-map property depends on the GIC's address-size. Since the .dts files share interrupt nexus nodes across different interrupt controllers (GICv2 vs. GICv3), we need to use the only commonly allowed #address-size value of <1> for both. Link: https://lore.kernel.org/r/20200513103016.130417-11-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: juno: Fix GIC child nodesAndre Przywara1-25/+25
The GIC DT nodes for the Juno boards were not fully compliant with the DT binding, which has certain expectations about child nodes and their size and address cells values. Use smaller #address-cells and #size-cells values, as the binding requests, and adjust the reg properties accordingly. This requires adjusting the interrupt nexus nodes as well, as one field of the interrupt-map property depends on the GIC's address-size. Link: https://lore.kernel.org/r/20200513103016.130417-10-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Fix GIC compatible namesAndre Przywara2-2/+2
The GIC DT binding only allows certain combinations of DT compatible strings. The somewhat awkward "arm,cortex-a15-gic", "arm,cortex-a9-gic" is not among those. Drop that combination of different "cortex" based strings used for the models, and replace it with the more useful combination including "arm,gic-400". Link: https://lore.kernel.org/r/20200513103016.130417-9-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: juno: Fix mem-timerAndre Przywara1-4/+4
The Juno's mem-timer DT node was not fully compliant with the DT binding, which has certain expectation about child nodes and their size and address cells values. Use a cell size of 1, as the binding requests, and spell out the ranges property to be binding compliant. Link: https://lore.kernel.org/r/20200513103016.130417-8-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: juno: Move fixed devices out of bus nodeAndre Przywara1-79/+79
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz missing or empty reg/ranges property Move the fixed clocks, the fixed regulator, and the gpio keys to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-7-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Move fixed clocks out of bus nodeAndre Przywara1-21/+21
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/v2m_refclk32khz missing or empty reg/ranges property Move the fixed clocks to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-6-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp: Move fixed devices out of bus nodeAndre Przywara1-68/+68
The devicetree compiler complains when DT nodes without a reg property live inside a (simple) bus node: Warning (simple_bus_reg): Node /bus@8000000/motherboard-bus/v2m_refclk32khz missing or empty reg/ranges property Move the fixed clocks, the fixed regulator, and the config bus subtree to the root node, since they do not depend on any busses. Link: https://lore.kernel.org/r/20200513103016.130417-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17arm64: dts: fvp/juno: Fix node address fieldsAndre Przywara4-9/+9
The Arm Ltd. boards were using an outdated address convention in the DT node names, by separating the high from the low 32-bits of an address by a comma. Remove the comma from the node name suffix to be DT spec compliant. Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-03-25Merge tag 'versatile-dts-v5.7-1' of ↵Arnd Bergmann8-8/+8
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into arm/dt Versatile DTS updates for the v5.7 series take one: - Schema validation for the top level of all ARM reference designs: Integrator, Versatile, RealView, Juno. - Clean up some node names in the trees so they pass validation fine. - Drop the old text bindings. - A top level DMA ranges patch from Rob. * tag 'versatile-dts-v5.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM/arm64: dts: Rename SMB bus to just bus dt-bindings: arm: Drop the non-YAML bindings dt-bindings: arm: Add Versatile Express and Juno YAML schema dt-bindings: arm: Add RealView YAML schema dt-bindings: arm: Add Versatile YAML schema dt-bindings: arm: Add Integrator YAML schema ARM: dts: RealView: Fix the name of the SoC node ARM: dts: Versatile: Use syscon as node name for IB2 ARM: dts: integratorap: Remove top level dma-ranges Link: https://lore.kernel.org/r/CACRpkdbbniYVnsE-pAmU2qCerswserNgEFtY48XQ+_K+DUNC9Q@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-03-04ARM/arm64: dts: Rename SMB bus to just busLinus Walleij8-8/+8
Discussing the YAML validation schema with the DT maintainers it came out that a bus named "smb@80000000" is not really accepted, and the schema was written to name the static memory bus just "bus@80000000". This change is necessary for the schema to kick in and validate these device trees, else the schema gets ignored. Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-01-23arm64: dts: fast models: Fix FVP PCI interrupt-map propertyMarc Zyngier1-4/+4
The interrupt map for the FVP's PCI node is missing the parent-unit-address cells for each of the INTx entries, leading to the kernel code failing to parse the entries correctly. Add the missing zero cells, which are pretty useless as far as the GIC is concerned, but that the spec requires. This allows INTx to be usable on the model, and VFIO to work correctly. Fixes: fa083b99eb28 ("arm64: dts: fast models: Add DTS fo Base RevC FVP") Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-11-28Revert "arm64: dts: juno: add dma-ranges property"Sudeep Holla1-1/+0
This reverts commit 193d00a2b35ee3353813b4006a18131122087205. Commit 951d48855d86 ("of: Make of_dma_get_range() work on bus nodes") reworked the logic such that of_dma_get_range() works correctly starting from a bus node containing "dma-ranges". Since on Juno we don't have a SoC level bus node and "dma-ranges" is present only in the root node, we get the following error: OF: translation of DMA address(0) to CPU address failed node(/sram@2e000000) OF: translation of DMA address(0) to CPU address failed node(/uart@7ff80000) ... OF: translation of DMA address(0) to CPU address failed node(/mhu@2b1f0000) OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000) OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000) OF: translation of DMA address(0) to CPU address failed node(/iommu@2b600000) So let's fix it by dropping the "dma-ranges" property for now. This should be fine since it doesn't represent any kind of device-visible restriction; it was only there for completeness, and we've since given in to the assumption that missing "dma-ranges" implies a 1:1 mapping anyway. We can add it later with a proper SoC bus node and moving all the devices that belong there along with the "dma-ranges" if required. Fixes: 193d00a2b35e ("arm64: dts: juno: add dma-ranges property") Cc: Rob Herring <robh+dt@kernel.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-11-25arm64: dts: juno: Fix UART frequencyAndre Przywara1-2/+2
Older versions of the Juno *SoC* TRM [1] recommended that the UART clock source should be 7.2738 MHz, whereas the *system* TRM [2] stated a more correct value of 7.3728 MHz. Somehow the wrong value managed to end up in our DT. Doing a prime factorisation, a modulo divide by 115200 and trying to buy a 7.2738 MHz crystal at your favourite electronics dealer suggest that the old value was actually a typo. The actual UART clock is driven by a PLL, configured via a parameter in some board.txt file in the firmware, which reads 7.37 MHz (sic!). Fix this to correct the baud rate divisor calculation on the Juno board. [1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0515b.b/DDI0515B_b_juno_arm_development_platform_soc_trm.pdf [2] http://infocenter.arm.com/help/topic/com.arm.doc.100113_0000_07_en/arm_versatile_express_juno_development_platform_(v2m_juno)_technical_reference_manual_100113_0000_07_en.pdf Fixes: 71f867ec130e ("arm64: Add Juno board device tree.") Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-10-21arm64: dts: juno: add GPU subsystemRobin Murphy1-0/+27
Since we now have bindings for Mali Midgard GPUs, let's use them to describe Juno's GPU subsystem, if only because we can. Juno sports a Mali-T624 integrated behind an MMU-400 (as a gesture towards virtualisation), in their own dedicated power domain with DVFS controlled by the SCP. CC: Liviu Dudau <liviu.dudau@arm.com> CC: Sudeep Holla <sudeep.holla@arm.com> CC: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-08-05arm64: dts: fast models: Remove clcd's max-memory-bandwidthKevin Brodsky2-10/+0
It is unclear why max-memory-bandwidth should be set for CLCD on the fast model. Removing that property allows allocating and using 32bpp buffers, which may be desirable on certain platforms such as Android. Reported-by: Ruben Ayrapetyan <ruben.ayrapetyan@arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kevin Brodsky <kevin.brodsky@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-28arm64: dts: juno: set the right partition type for NOR flashLinus Walleij1-1/+3
We do not normally access the flash on the Juno, as this will disturb other aspects of the system, but if we choose to do so anyways, we should set up the partitions in the right way so we will find out what is in the flash. The ARM Firmware Suite now has its own compatible and proper device tree bindings to trigger discovery of the flash contents, and Linux supports handling the new type of AFS partitions. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-05-28arm64: dts: juno: update coresight DT bindingsLeo Yan2-5/+5
CoreSight DT bindings have been updated, thus the old compatible strings are obsolete and the drivers will report warning if DTS uses these obsolete strings. This patch switches to the new bindings for CoreSight dynamic funnel, so can dismiss warning during initialisation. Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-30Merge tag 'juno-updates-5.1' of ↵Arnd Bergmann11-167/+488
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/dt ARMv8 Juno/fast models updates for v5.1 1. Support for Fixed Virtual Platforms(FVP) Base RevC model to enable development of software around the new features available 2. Addition of dynamic-power-coefficient information for CPUs on Juno 3. Miscellaneous changes like re-ordering device nodes, using existing macros for GIC flags in interrupt-maps and using list instead of tuple(which is wrong but works as number of interrupt cells is 1) for mmci interrupts * tag 'juno-updates-5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: Add cpu dynamic-power-coefficient information arm64: dts: fast models: Add DTS fo Base RevC FVP arm64: dts: juno/fast models: sort couple of device nodes arm64: dts: models: use list instead of tuple for mmci interrupts arm64: dts: juno/fast models: using GIC macros instead of hardcoded values Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30arm64: dts: Remove inconsistent use of 'arm,armv8' compatible stringRob Herring4-20/+20
The 'arm,armv8' compatible string is only for software models. It adds little value otherwise and is inconsistently used as a fallback on some platforms. Remove it from those platforms. This fixes warnings generated by the DT schema. Reported-by: Michal Simek <michal.simek@xilinx.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Antoine Tenart <antoine.tenart@bootlin.com> Acked-by: Nishanth Menon <nm@ti.com> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Chanho Min <chanho.min@lge.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Tero Kristo <t-kristo@ti.com> Acked-by: Wei Xu <xuwei5@hisilicon.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Chunyan Zhang <zhang.lyra@gmail.com> Acked-by: Robert Richter <rrichter@cavium.com> Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-29arm64: dts: juno: Add cpu dynamic-power-coefficient informationDietmar Eggemann2-0/+12
A CPUfreq driver, like the scpi driver used on Juno boards, which provide the Energy Model with power cost information via the PM_OPP of_dev_pm_opp_get_cpu_power() function, do need the dynamic-power-coefficient (C) in the device tree. Method used to obtain the C value: C is computed by measuring energy (E) consumption of a frequency domain (FD) over a 10s runtime (t) sysbench workload running at each Operating Performance Point (OPP) affine to 1 or 2 CPUs of that FD while the other CPUs of the system are hotplugged out. By definition all CPUs of a FD have the the same micro-architecture. An OPP is characterized by a certain frequency (f) and voltage (V) value. The corresponding power values (P) are calculated by dividing the delta of the E values between the runs with 2 and 1 CPUs by t. With n data tuples (P, f, V), n equal to number of OPPs for this frequency domain, we can solve C by: P = Pstat + Pdyn P = Pstat + CV²f Cx = (Px - P1)/(Vx²fx - V1²f1) with x = {2, ..., n} The C value is the arithmetic mean out of {C2, ..., Cn}. Since DVFS is broken on Juno r1, no dynamic-power-coefficient information has been added to its dts file. Signed-off-by: Dietmar Eggemann <dietmar.eggemann@arm.com> Signed-off-by: Quentin Perret <quentin.perret@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: fast models: Add DTS fo Base RevC FVPJean-Philippe Brucker3-0/+305
Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform with GICv3, PCIe, SMMUv3 and various other features. These are available free of charge on the Arm Community website at Arm Development Platforms[1]. It resembles the Foundation Platform, which is a simple FVP that includes an Armv8‑A AEM processor model but this has two cluster of four cores, a CCI-550 interconnect, an SMMU and two PCI devices. In order to enable development of software, let's add a description of the Revison C version of Base platform. The documentation for this FVP model is available @[2] for reference. [1] https://community.arm.com/dev-platforms/ [2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf Cc: Vincent Stehlé <vincent.stehle@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> [sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: juno/fast models: sort couple of device nodesSudeep Holla2-41/+41
Sort the couple device nodes with unit addresses which are out of order. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: models: use list instead of tuple for mmci interruptsSudeep Holla1-1/+1
RTSM/FVP vexpress motherboard model MMCI requires dedicated interrupts for CMD and PIO, which obviously should be expressed as a list. Current form uses tuple and it works fine since interrupt-cells equal to 1. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reported-by: Vladimir Murzin <vladimir.murzin@arm.com> Reviewed-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29arm64: dts: juno/fast models: using GIC macros instead of hardcoded valuesSudeep Holla5-125/+129
There are macros that exist to indicate the GIC specific flags and custom cell values as per the GIC DT bindings. It's used in most of the places in these DTS files but not all. To maintain consistency, lets use the macros at all the places. Since DTC doesn't even warn is any cells are missing, it's very hard to debug if that's the case. Changing to use macros avoids missing cells/ columns. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-11-29ARM: dts: Modernize the Vexpress PL111 integrationLinus Walleij3-32/+42
The Versatile Express was submitted with the actual display bridges unconnected (but defined in the device tree) and mock "panels" encoded in the device tree node of the PL111 controller. This doesn't even remotely describe the actual Versatile Express hardware. Exploit the SiI9022 bridge by connecting the PL111 pads to it, making it use EDID or fallback values to drive the monitor. The also has to use the reserved memory through the CMA pool rather than by open coding a memory region and remapping it explicitly in the driver. To achieve this, a reserved-memory node must exist in the root of the device tree, so we need to pull that out of the motherboard .dtsi include files, and push it into each top-level device tree instead. We do the same manouver for all the Versatile Express boards, taking into account the different location of the video RAM depending on which chip select is used on each platform. This plays nicely with the new PL111 DRM driver and follows the standard ways of assigning bridges and memory pools for graphics. Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Cc: Robin Murphy <robin.murphy@arm.com> Tested-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-09-11arm64: dts: juno: Enable coresight tmc scatter gather in ETRSuzuki K Poulose1-0/+1
We do not enable scatter-gather mode in the TMC-ETR by default to prevent malfunctioning of systems where the ETR may not be properly connected to the memory subsystem to allow for simultaneous READ/WRITE transactions when used in SG mode. Instead we whitelist the platforms where we know that it is safe to use the mode. All revisions of Juno have a proper ETR connection and hence white list them. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pierlisi <lorenzo.pieralisi@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-09-10arm64: dts: juno: Update entries to match latest coresight bindingsSuzuki K Poulose3-121/+105
Switch to updated coresight bindings for Juno platforms. Cc: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> [sudeep.holla: minor modifications to patch title] Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-08-24arm64: dts: Fix various entry-method properties to reflect documentationAmit Kucheria3-3/+3
The idle-states binding documentation[1] mentions that the 'entry-method' property is required on 64-bit platforms and must be set to "psci". commit a13f18f59d26 ("Documentation: arm: Fix typo in the idle-states bindings examples") attempted to fix this earlier but clearly more is needed. Fix the cpu-capacity.txt documentation that uses the incorrect value so we don't get copy-paste errors like these. Clarify the language in idle-states.txt by removing the reference to the psci bindings that might be causing this confusion. Finally, fix devicetrees of various boards to reflect current documentation. [1] Documentation/devicetree/bindings/arm/idle-states.txt (see idle-states node) Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Li Yang <leoyang.li@nxp.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-15Merge tag 'juno-updates-4.18' of ↵Olof Johansson7-248/+262
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt ARMv8 Juno/Vexpress updates/cleanups for v4.18 1. Add the missing connections to the STM output port as all endpoint connections must be bidirectional. 2. Replace all the custom OF graph endpoint node names with the standard 'endpoint' 3. Cleanup to replace all underscores('_') with hyphens('-') in the device node names 4. Syntactic restructuring of motherboard include file so that it can be included at the top of any other DTS file as it should be rather than existing include in the middle of the file at a specific location * tag 'juno-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno/rtsm: re-structure motherboard includes arm64: dts: juno: replace '_' with '-' in node names arm64: dts: juno: Fix "debounce-interval" property misspelling arm64: dts: juno: fix OF graph endpoint node names arm64: dts: juno: fix missing Coresight STM graph connection Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-15Merge tag 'vexpress-updates-4.18' of ↵Olof Johansson1-3/+2
git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt ARMv7 Vexpress updates/cleanups for v4.18 1. Syntactic restructuring of motherboard include file so that it can be included at the top of any other DTS file as it should be rather than existing include in the middle of the file at a specific location 2. Use of standard GPIO controller bindings for few sysreg components like LED, MMC Write Protect/Card Detect and Flash Write Protect to fix some of the new DTC warnings 3. Cleanup to replace all underscores('_') with hyphens('-') in the device node names * tag 'vexpress-updates-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: ARM: dts: vexpress: replace '_' with '-' in node names ARM: dts: vexpress: use standard gpio bindings for sys_{led,mci,flash} ARM: dts: vexpress: Restructure motherboard includes Signed-off-by: Olof Johansson <olof@lixom.net>
2018-05-10arm64: dts: juno/rtsm: re-structure motherboard includesSudeep Holla4-229/+235
It is a bit unorthodox to just include a file in the middle of a another DTS file, it breaks the pattern from other device trees and also makes it really hard to reference things across the files with phandles. Restructure the include for the Juno/RTSM motherboards to happen at the top of the file, reference the target nodes directly, and indent the motherboard .dtsi files to reflect their actual depth in the hierarchy. This is a purely syntactic change that result in the same DTB files from the DTS/DTSI files. This is based on similar patch from Linus Walleij for ARM Vexpress platforms. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-10arm64: dts: juno: replace '_' with '-' in node namesSudeep Holla5-9/+9
The latest DTC throws warnings for character '_' in the node names. Warning (node_name_chars_strict): /thermal-zones/big_cluster: Character '_' not recommended in node name Warning (node_name_chars_strict): /thermal-zones/little_cluster: Character '_' not recommended in node name Warning (node_name_chars_strict): /smb@8000000/motherboard/gpio_keys: Character '_' not recommended in node name Warning (node_name_chars_strict): /pmu_a57: Character '_' not recommended in node name Warning (node_name_chars_strict): /pmu_a53: Character '_' not recommended in node name The general recommendation is to use character '-' for all the node names. This patch fixes the warnings following the recommendation. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-10arm64: dts: juno: Fix "debounce-interval" property misspellingSudeep Holla1-6/+6
"debounce_interval" was never supported in the bindings. It should be "debounce-interval". Moreover, latest DTC complains the following: Warning (property_name_chars_strict): debounce_interval: Character '_' not recommended in property name This patch fixes the above warning by using the correct property as per the bindings. Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-09arm64: dts: juno: fix OF graph endpoint node namesRob Herring1-4/+4
OF graph endpoint node names should be 'endpoint'. Fix the following warnings found by dtc: Warning (graph_endpoint): /hdlcd@7ff50000/port/hdlcd1-endpoint: graph endpont node nameshould be 'endpoint' Warning (graph_endpoint): /hdlcd@7ff60000/port/hdlcd0-endpoint: graph endpont node nameshould be 'endpoint' Warning (graph_endpoint): /i2c@7ffa0000/hdmi-transmitter@70/port/tda998x-0-endpoint: graph endpont node name should be 'endpoint' Warning (graph_endpoint): /i2c@7ffa0000/hdmi-transmitter@71/port/tda998x-1-endpoint: graph endpont node name should be 'endpoint' Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-09arm64: dts: juno: fix missing Coresight STM graph connectionRob Herring2-0/+8
OF graph endpoint connections must be bidirectional. Fix 2 missing connections to the STM output port: Warning (graph_endpoint): /stm@20100000/port/endpoint: graph connection to node '/funnel@20130000/ports/port@1/endpoint' is not bidirectional Warning (graph_endpoint): /stm@20100000/port/endpoint: graph connection to node '/funnel@20130000/ports/port@1/endpoint' is not bidirectional Fixes: cde6f9ab10c6 ("arm64: dts: juno: add missing CoreSight STM component") Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-05-09ARM: dts: vexpress: Restructure motherboard includesLinus Walleij1-3/+2
It is a bit unorthodox to just include a file in the middle of a another DTS file, it breaks the pattern from other device trees and also makes it really hard to reference things across the files with phandles. Restructure the include for the Versatile Express motherboards to happen at the top of the file, reference the target nodes directly, and indent the motherboard .dtsi files to reflect their actual depth in the hierarchy. This is a purely syntactic change that result in the same DTB files from the DTS/DTSI files. Cc: Robin Murphy <robin.murphy@arm.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Mali DP Maintainers <malidp@foss.arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-04-16arm64: dts: juno: drop unnecessary address-cells and size-cells propertiesSudeep Holla1-2/+0
/smb@8000000/motherboard/gpio_keys node doesn't have "ranges" or "reg" property in child nodes. So it's unnecessary to have address-cells as well as size-cells properties which results in below warning. Warning (avoid_unnecessary_addr_size): /smb@8000000/motherboard/gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property This patch drops the unnecessary address+size-cell properties. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-02-28arm64: dts: juno: fix size of GICv2m MSI framesSudeep Holla1-4/+4
Currently the size of GICv2m MSI frames are listed as 4kB while the Juno TRM specifies 64kB for each of these MSI frames. Though the devices connected themselves might just use the first 4kB, to be consistent with the general practice of 64kB boundary alignment to all the devices, let's keep the size as 64kB. This might also help in avoiding any surprise when passing the device to a VM. This patch increases the size of each GICv2m MSI frames from 4kB to 64kB as per the specification. Cc: Liviu Dudau <liviu.dudau@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2018-02-26arm64: dts: juno: Describe the full GICv2m regionRobin Murphy1-0/+19
Juno's GICv2m implementation consists of four frames providing 32 interrupts each. Since it is possible to plug in enough PCIe endpoints to consume more than 32 MSIs, and the driver already has a bodge to handle multiple frames, let's expose the other three as well. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2017-11-16Merge tag 'armsoc-dt' of ↵Linus Torvalds13-71/+150
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM device-tree updates from Arnd Bergmann: "We add device tree files for a couple of additional SoCs in various areas: Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking, Amlogic A113D for audio, and Renesas R-Car V3M for automotive. As usual, lots of new boards get added based on those and other SoCs: - Actions S500 based CubieBoard6 single-board computer - Amlogic Meson-AXG A113D based development board - Amlogic S912 based Khadas VIM2 single-board computer - Amlogic S912 based Tronsmart Vega S96 set-top-box - Allwinner H5 based NanoPi NEO Plus2 single-board computer - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers - Allwinner A83T based TBS A711 Tablet - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8 - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500 wireless access points and routers - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board - NXP i.MX53 based GE Healthcare PPD biometric monitor - NXP i.MX6 based Pistachio single-board computer - NXP i.MX6 based Vining-2000 automotive diagnostic interface - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards - Renasas r8a7745 based iWave G22D-SODIMM SoM - Rockchip rk3288 based Amarula Vyasa single-board computer - Samsung Exynos5800 based Odroid HC1 single-board computer For existing SoC support, there was a lot of ongoing work, as usual most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic and Allwinner platforms, but others were also active. Rob Herring and many others worked on reducing the number of issues that the latest version of 'dtc' now warns about. Unfortunately there is still a lot left to do. A rework of the ARM foundation model introduced several new files for common variations of the model" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits) arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3 dt-bindings: bus: Add documentation for the Technologic Systems NBUS arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock ARM: dts: owl-s500: Add CubieBoard6 dt-bindings: arm: actions: Add CubieBoard6 ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock ARM: dts: owl-s500: Set power domains for CPU2 and CPU3 arm: dts: mt7623: remove unused compatible string for pio node arm: dts: mt7623: update usb related nodes arm: dts: mt7623: update crypto node ARM: dts: sun8i: a711: Enable USB OTG ARM: dts: sun8i: a711: Add regulator support ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1 ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1 ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes ARM: dts: sunxi: Add dtsi for AXP81x PMIC arm64: dts: allwinner: H5: Restore EMAC changes ...
Powered by cgit, Gruvboxed by Blaster4385.