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2024-06-24dt-bindings: fuse: Document R-Car E-FUSE / OTP_MEMGeert Uytterhoeven1-0/+38
Document support for E-FUSE non-volatile memory accessible through OTP_MEM on R-Car V4H and V4M. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Link: https://lore.kernel.org/436506babe4ce468fda19380d9373470468e3752.1716974502.git.geert+renesas@glider.be
2024-06-24dt-bindings: fuse: Document R-Car E-FUSE / PFCGeert Uytterhoeven1-0/+55
Document support for E-FUSE non-volatile memory accessible through PFC on R-Car V3U and S4-8. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Yoshihiro Shimoda <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Link: https://lore.kernel.org/03e43e97941df238ef1a618852aecd7be68adbb0.1716974502.git.geert+renesas@glider.be
2023-01-23dt-bindings: drop type for operating-points-v2Krzysztof Kozlowski1-2/+1
The type for operating-points-v2 property is coming from dtschema (/schemas/opp/opp.yaml), so individual bindings can just use simple "true". Signed-off-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]>
2021-12-17dt-bindings: fuse: tegra: Document Tegra234 FUSEThierry Reding1-0/+1
Add the compatible string for the FUSE block found on the Tegra234 SoC. Acked-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-17dt-bindings: fuse: tegra: Convert to json-schemaThierry Reding2-42/+88
Convert the NVIDIA Tegra FUSE bindings from the free-form text format to json-schema. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-09-18dt-bindings: fuse: tegra: Add Tegra234 supportThierry Reding1-0/+1
The Tegra234 FUSE block is very similar to that on prior chips but not completely compatible. Document the new compatible string. Reviewed-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2020-07-17dt-bindings: fuse: tegra: Add missing compatible stringsThierry Reding1-2/+3
The Tegra FUSE device tree bindings haven't been updated in a while. Add compatible strings for the SoC generations that were released since the last update. Signed-off-by: Thierry Reding <[email protected]>
2015-05-04ARM: tegra: Use lower-case hexadecimal digitsThierry Reding1-1/+1
For consistency with other device tree content, use lower-case hexadecimal digits in register region specifications. Signed-off-by: Thierry Reding <[email protected]>
2015-02-03Documentation: DT bindings: add more Tegra chip compatible stringsPaul Walmsley1-5/+5
Align compatible strings for several IP blocks present on Tegra chips with the latest doctrine from the DT maintainers: http://marc.info/?l=devicetree&m=142255654213019&w=2 The primary objective here is to avoid checkpatch warnings, per: http://marc.info/?l=linux-tegra&m=142201349727836&w=2 DT binding text files have been updated for the following IP blocks: - PCIe - SOR - SoC timers - AHB "gizmo" - APB_MISC - pinmux control - UART - PWM - I2C - SPI - RTC - PMC - eFuse - AHCI - HDA - XUSB_PADCTRL - SDHCI - SOC_THERM - AHUB - I2S - EHCI - USB PHY N.B. The nvidia,tegra20-timer compatible string is removed from the nvidia,tegra30-timer.txt documentation file because it's already mentioned in the nvidia,tegra20-timer.txt documentation file. This second version takes into account the following requests from Rob Herring <[email protected]>: - Per-IP block patches have been combined into a single patch - Explicit documentation about which compatible strings are actually matched by the driver has been removed. In its place is implicit documentation that loosely follows Rob's prescribed format: "Must contain '"nvidia,<chip>-pcie", "nvidia,tegra20-pcie"' where <chip> is tegra30, tegra132, ..." [...] "You should attempt to document known values of <chip> if you use it" Signed-off-by: Paul Walmsley <[email protected]> Cc: Alexandre Courbot <[email protected]> Cc: Dylan Reid <[email protected]> Cc: Greg Kroah-Hartman <[email protected]> Cc: Hans de Goede <[email protected]> Cc: Ian Campbell <[email protected]> Cc: Jingchang Lu <[email protected]> Cc: John Crispin <[email protected]> Cc: Kumar Gala <[email protected]> Cc: Linus Walleij <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Mikko Perttunen <[email protected]> Cc: Murali Karicheri <[email protected]> Cc: Paul Walmsley <[email protected]> Cc: Pawel Moll <[email protected]> Cc: Peter De Schrijver <[email protected]> Cc: Peter Hurley <[email protected]> Cc: Sean Paul <[email protected]> Cc: Stephen Warren <[email protected]> Cc: Takashi Iwai <[email protected]> Cc: Tejun Heo <[email protected]> Cc: "Terje Bergström" <[email protected]> Cc: Thierry Reding <[email protected]> Cc: Tuomas Tynkkynen <[email protected]> Cc: Wolfram Sang <[email protected]> Cc: Zhang Rui <[email protected]> Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Cc: [email protected] Acked-by: Eduardo Valentin <[email protected]> Signed-off-by: Rob Herring <[email protected]>
2014-07-17soc/tegra: Add efuse and apbmisc bindingsPeter De Schrijver1-0/+40
Add efuse and apbmisc bindings for Tegra20, Tegra30, Tegra114 and Tegra124. Signed-off-by: Peter De Schrijver <[email protected]> Signed-off-by: Stephen Warren <[email protected]> Signed-off-by: Thierry Reding <[email protected]>