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This board is based on ti,j722s family using the am67a variation.
https://beagley-ai.org/
https://openbeagle.org/beagley-ai/beagley-ai
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Jared McArthur <j-mcarthur@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240829213929.48540-1-robertcnelson@gmail.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add devicetree bindings for AM62Ax based phyCORE-AM62A7 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626155244.3311436-3-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add bindings for SolidRun AM642 HummingBoard-T Board, which is the
evaluation board for SolidRun AM642 SoM.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240219-add-am64-som-v7-1-0e6e95b0a05d@solid-run.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add bindings for TI J722S family of devices.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
Reviewed-by: Manorit Chawdhry <m-chawdhry@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240206100608.127702-2-vaishnav.a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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This new variant is derived from the Advanced PG2 board, removing the
Arduino interface, and adding a new ASIC for communicating with the
PLC 1200 signal modules.
Signed-off-by: Su Bao Cheng <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/595d8d79647a0f5e6e635a22ee0fee011f8a5c5e.1707463401.git.jan.kiszka@siemens.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin
AM62 SoM. Mallow is a low-cost carrier board in the Verdin family with
a small form factor and build for volume production making it ideal for
industrial and embedded applications.
https://www.toradex.com/products/carrier-board/mallow-carrier-board
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20231205184605.35225-3-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add bindings for TI's AM62P5 family of devices.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230811184432.732215-2-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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and carrier board
For now only the MBaX4Xx carrier board is defined.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/e4283d6af59c77d2f690e070eb948dd9142a2276.1690463382.git.matthias.schiffer@ew.tq-group.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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Add toradex,verdin-am62 for Toradex Verdin AM62 SoM, its
nonwifi and wifi variants and the carrier boards (Dahlia,
Verdin Development Board and Yavia) they may be mated in.
Link: https://developer.toradex.com/hardware/verdin-som-family/modules/verdin-am62/
Link: https://www.toradex.com/computer-on-modules/verdin-arm-family/ti-am62
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230615095058.33890-2-francesco@dolcini.it
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add devicetree bindings for AM62x based phyCORE-AM62 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230504140143.1425951-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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Add compatible for AM62x SoC based Low Power Starter Kit board[1]
[1] https://www.ti.com/tool/SK-AM62-LP
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230321-am62-lp-sk-v2-1-0a56e1694804@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
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This board is based on ti,am625
https://beagleplay.org/
https://git.beagleboard.org/beagleplay/beagleplay
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230316152143.2438928-2-nm@ti.com
Co-developed-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
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AM69 Starter Kit is a single board designed for TI AM69 SoC.
The AM69 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive ADAS applications,
autonomous mobile robot and edge AI applications.
Add DT binding for AM69 Starter Kit.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230119132958.124435-2-sabiya.d@ti.com
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This new variant is derived from the Advanced PG2 board, replacing the
MiniPCI slot with B and E-keyed M.2 slots.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/e49b4451b6c85ba28bdbbe42b25d9eeecebbe2d7.1674110442.git.jan.kiszka@siemens.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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AM68 Starter Kit is a low cost, small form factor board designed for
TI's AM68 SoC which is optimized to provide best in class performance
for industrial applications and add binding for the same.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230116071446.28867-2-sinthu.raja@ti.com
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Add devicetree bindings for AM64x based phyCORE-AM64 SoM
and phyBOARD-Electra RDK.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230104162927.1215033-1-w.egorov@phytec.de
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Add binding for J784S4 SoC
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230112142725.77785-2-a-nandan@ti.com
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The Devicetree bindings document does not have to say in the title that
it is a "Devicetree binding", but instead just describe the hardware.
Drop trailing "Devicetree bindings" in various forms (also with
trailing full stop):
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \;
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \;
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \;
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media
Acked-by: Sebastian Reichel <sre@kernel.org> # power
Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
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This board is based on the ti,j721e
https://beagleboard.org/ai-64
https://git.beagleboard.org/beagleboard/beaglebone-ai-64
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
CC: Nishanth Menon <nm@ti.com>
CC: Jason Kridner <jkridner@beagleboard.org>
CC: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20221118163139.3592054-1-robertcnelson@gmail.com
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This adds bindings for TI's AM62A7 family of devices.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220901141328.899100-3-vigneshr@ti.com
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Use alphabetical sort to organize the SoCs
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220830160507.7726-3-nm@ti.com
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Use alphabetical sort to organize the am654 board names.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220830160507.7726-2-nm@ti.com
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The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC
architecture platform, providing ultra-low-power modes, dual display,
multi-sensor edge compute, security and other BOM-saving integration.
The AM62 SoC targets broad market to enable applications such as
Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building
Automation, Appliances and more.
Some highlights of this SoC are:
* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
Pin-to-pin compatible options for single and quad core are available.
* Cortex-M4F for general-purpose or safety usage.
* Dual display support, providing 24-bit RBG parallel interface and
OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
resolution.
* Selectable GPUsupport, up to 8GFLOPS, providing better user experience
in 3D graphic display case and Android.
* PRU(Programmable Realtime Unit) support for customized programmable
interfaces/IOs.
* Integrated Giga-bit Ethernet switch supporting up to a total of two
external ports (TSN capable).
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
* Dedicated Centralized System Controller for Security, Power, and
Resource Management.
* Multiple low power modes support, ex: Deep sleep,Standby, MCU-only,
enabling battery powered system design.
AM625 is the first device of the family. Add DT bindings for the same.
More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20220225120239.1303821-3-vigneshr@ti.com
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Add binding for J721S2 SoC
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211207080904.14324-2-a-govindraju@ti.com
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J721E Starter Kit (SK)[1] is a low cost, small form factor board
designed for TI’s J721E SoC. Add j721e-sk into compatible enum.
[1]https://www.ti.com/tool/SK-TDA4VM
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20210929081333.26454-2-sinthu.raja@ti.com
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Product Generation 2 (PG2) boards are based on SR2.x SoCs and will be
released soon.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/5d99e69ff1e2fb78f51f03c351eff1fe1f6c3a71.1632657917.git.jan.kiszka@web.de
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Add compatibles for j721e and j7200 evms to allow for newer platforms
to distinguish themselves.
While doing this, maintain support for older style of description where
the board compatibility was not required.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210925201430.11678-2-nm@ti.com
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These boards are based on AM6528 GP and AM6548 HS SOCs.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/173ce7d928ed9f352af7673dd44c6c76a1466eb5.1615473223.git.jan.kiszka@siemens.com
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AM642 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM642 SoC.
Add DT binding documentation for AM642 SK.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210226184251.26451-2-lokeshvutla@ti.com
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The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
peripherals.
* Centralized System Controller for Security, Power, and Resource
Management (DMSC).
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-2-d-gerlach@ti.com
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In order to add meta-schema checks for additional/unevaluatedProperties
being present, all schema need to make this explicit. As the top-level
board/SoC schemas always have additional properties, add
'additionalProperties: true'.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201005183830.486085-4-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
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The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20200914162231.2535-4-lokeshvutla@ti.com
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Convert TI K3 Board/SoC bindings to DT schema format.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20200914162231.2535-3-lokeshvutla@ti.com
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