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2024-09-06perf: Add driver for Arm NI-700 interconnect PMURobin Murphy2-0/+18
The Arm NI-700 Network-on-Chip Interconnect has a relatively straightforward design with a hierarchy of voltage, power, and clock domains, where each clock domain then contains a number of interface units and a PMU which can monitor events thereon. As such, it begets a relatively straightforward driver to interface those PMUs with perf. Even more so than with arm-cmn, users will require detailed knowledge of the wider system topology in order to meaningfully analyse anything, since the interconnect itself cannot know what lies beyond the boundary of each inscrutably-numbered interface. Given that, for now they are also expected to refer to the NI-700 documentation for the relevant event IDs to provide as well. An identifier is implemented so we can come back and add jevents if anyone really wants to. Signed-off-by: Robin Murphy <[email protected]> Link: https://lore.kernel.org/r/9933058d0ab8138c78a61cd6852ea5d5ff48e393.1725470837.git.robin.murphy@arm.com Signed-off-by: Will Deacon <[email protected]>
2024-08-30drivers/perf: hisi_pcie: Export supported Root Ports [bdf_min, bdf_max]Yicong Yang1-1/+3
Currently users can get the Root Ports supported by the PCIe PMU by "bus" sysfs attributes which indicates the PCIe bus number where Root Ports are located. This maybe insufficient since Root Ports supported by different PCIe PMUs may be located on the same PCIe bus. So export the BDF range the Root Ports additionally. Signed-off-by: Yicong Yang <[email protected]> Acked-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-08-23Documentation: dwc_pcie_pmu: Update bdf to sbdfKrishna chaitanya chundru1-8/+8
Update document to reflect the driver change to use sbdf instead of bdf alone. Signed-off-by: Krishna chaitanya chundru <[email protected]> Reviewed-by: Yicong Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-04-19Documentation: qcom-pmu: Use /sys/bus/event_source/devices pathsJonathan Cameron2-2/+2
To allow setting an appropriate parent for the struct pmu device remove existing references to /sys/devices/ path. Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-04-19Documentation: thunderx2-pmu: Use /sys/bus/event_source/devices pathsJonathan Cameron1-1/+1
To allow setting an appropriate parent for the struct pmu device remove existing references to /sys/devices/ path. Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-04-19Documentation: xgene-pmu: Use /sys/bus/event_source/devices pathsJonathan Cameron1-1/+1
To allow setting an appropriate parent for the struct pmu device remove existing references to /sys/devices/ path. Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-04-19Documentation: hns-pmu: Use /sys/bus/event_source/devices pathsJonathan Cameron1-4/+4
To allow setting an appropriate parent for the struct pmu device remove existing references to /sys/devices/ path. Reviewed-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-04-19Documentation: hisi-pmu: Drop reference to /sys/devices pathJonathan Cameron1-1/+0
Having assigned a parent to the device, the suggested path is no longer valid. As /sys/bus/event_sources based path is also provided, simply drop mention of alternative. Reviewed-by: Yicong Yang <[email protected]> Reviewed-by: Greg Kroah-Hartman <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-03-05docs: perf: Fix build warning of hisi-pcie-pmu.rstYicong Yang1-0/+1
`make htmldocs SPHINXDIRS="admin-guide"` shows below warnings: Documentation/admin-guide/perf/hisi-pcie-pmu.rst:48: ERROR: Unexpected indentation. Documentation/admin-guide/perf/hisi-pcie-pmu.rst:49: WARNING: Block quote ends without a blank line; unexpected unindent. Fix this. Closes: https://lore.kernel.org/lkml/[email protected]/ Fixes: 89a032923d4b ("docs: perf: Update usage for target filter of hisi-pcie-pmu") Signed-off-by: Yicong Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-03-04docs: perf: Add description for StarFive's StarLink PMUJi Sheng Teoh2-0/+47
StarFive StarLink PMU support monitoring L3 memory system PMU events. Add documentation to describe StarFive StarLink PMU support and it's usage. Signed-off-by: Ji Sheng Teoh <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2024-03-04docs: perf: Update usage for target filter of hisi-pcie-pmuJunhao He1-8/+23
One of the "port" and "bdf" target filter interface must be set, and the related events should preferably used in the same group. Update the usage in the documentation. Signed-off-by: Junhao He <[email protected]> Signed-off-by: Yicong Yang <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2023-12-13docs: perf: Add description for Synopsys DesignWare PCIe PMU driverShuai Xue2-0/+95
Alibaba's T-Head Yitan 710 SoC includes Synopsys' DesignWare Core PCIe controller which implements PMU for performance and functional debugging to facilitate system maintenance. Document it to provide guidance on how to use it. Signed-off-by: Shuai Xue <[email protected]> Reviewed-by: Baolin Wang <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Yicong Yang <[email protected]> Tested-by: Ilkka Koskinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2023-12-05docs/perf: Add explanation for DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quirkXu Yang1-8/+37
Add explanation for DDR_CAP_AXI_ID_PORT_CHANNEL_FILTER quirk. Signed-off-by: Xu Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2023-10-12docs/perf: Add ampere_cspmu to toctree to fix a build warningIlkka Koskinen1-0/+1
Add ampere_cspmu to toctree in order to address the following warning produced when building documents: Documentation/admin-guide/perf/ampere_cspmu.rst: WARNING: document isn't included in any toctree Reported-by: Stephen Rothwell <[email protected]> Closes: https://lore.kernel.org/all/[email protected]/ Fixes: 53a810ad3c5c ("perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMU") Signed-off-by: Ilkka Koskinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2023-10-10perf: arm_cspmu: ampere_cspmu: Add support for Ampere SoC PMUIlkka Koskinen1-0/+29
Ampere SoC PMU follows CoreSight PMU architecture. It uses implementation specific registers to filter events rather than PMEVFILTnR registers. Signed-off-by: Ilkka Koskinen <[email protected]> Link: https://lore.kernel.org/r/[email protected] [will: Include linux/io.h in ampere_cspmu.c for writel()] Signed-off-by: Will Deacon <[email protected]>
2023-07-28perf docs: Update metric usage for Alibaba's T-Head PMU driver (arm64)Jing Zhang1-0/+5
Alibaba's T-Head ali_drw PMU supports DDR bandwidth metrics. Update its usage in the documentation. Reviewed-by: John Garry <[email protected]> Signed-off-by: Jing Zhang <[email protected]> Acked-by: Ian Rogers <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Shuai Xue <[email protected]> Cc: Will Deacon <[email protected]> Cc: Zhuo Song <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2023-07-01Merge tag 'cxl-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds2-0/+69
Pull CXL updates from Dan Williams: "The highlights in terms of new functionality are support for the standard CXL Performance Monitor definition that appeared in CXL 3.0, support for device sanitization (wiping all data from a device), secure-erase (re-keying encryption of user data), and support for firmware update. The firmware update support is notable as it reuses the simple sysfs_upload interface to just cat(1) a blob to a sysfs file and pipe that to the device. Additionally there are a substantial number of cleanups and reorganizations to get ready for RCH error handling (RCH == Restricted CXL Host == current shipping hardware generation / pre CXL-2.0 topologies) and type-2 (accelerator / vendor specific) devices. For vendor specific devices they implement a subset of what the generic type-3 (generic memory expander) driver expects. As a result the rework decouples optional infrastructure from the core driver context. For RCH topologies, where the specification working group did not want to confuse pre-CXL-aware operating systems, many of the standard registers are hidden which makes support standard bus features like AER (PCIe Advanced Error Reporting) difficult. The rework arranges for the driver to help the PCI-AER core. Bjorn is on board with this direction but a late regression disocvery means the completion of this functionality needs to cook a bit longer, so it is code reorganizations only for now. Summary: - Add infrastructure for supporting background commands along with support for device sanitization and firmware update - Introduce a CXL performance monitoring unit driver based on the common definition in the specification. - Land some preparatory cleanup and refactoring for the anticipated arrival of CXL type-2 (accelerator devices) and CXL RCH (CXL-v1.1 topology) error handling. - Rework CPU cache management with respect to region configuration (device hotplug or other dynamic changes to memory interleaving) - Fix region reconfiguration vs CXL decoder ordering rules" * tag 'cxl-for-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (51 commits) cxl: Fix one kernel-doc comment cxl/pci: Use correct flag for sanitize polling docs: perf: Minimal introduction the the CXL PMU device and driver perf: CXL Performance Monitoring Unit driver tools/testing/cxl: add firmware update emulation to CXL memdevs tools/testing/cxl: Use named effects for the Command Effect Log tools/testing/cxl: Fix command effects for inject/clear poison cxl: add a firmware update mechanism using the sysfs firmware loader cxl/test: Add Secure Erase opcode support cxl/mem: Support Secure Erase cxl/test: Add Sanitize opcode support cxl/mem: Wire up Sanitization support cxl/mbox: Add sanitization handling machinery cxl/mem: Introduce security state sysfs file cxl/mbox: Allow for IRQ_NONE case in the isr Revert "cxl/port: Enable the HDM decoder capability for switch ports" cxl/memdev: Formalize endpoint port linkage cxl/pci: Unconditionally unmask 256B Flit errors cxl/region: Manage decoder target_type at decoder-attach time cxl/hdm: Default CXL_DEVTYPE_DEVMEM decoders to CXL_DECODER_DEVMEM ...
2023-06-25docs: perf: Minimal introduction the the CXL PMU device and driverJonathan Cameron2-0/+69
Very basic introduction to the device and the current driver support provided. I expect to expand on this in future versions of this patch set. Reviewed-by: Dave Jiang <[email protected]> Reviewed-by: Kan Liang <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dan Williams <[email protected]>
2023-06-19docs: perf: Fix warning from 'make htmldocs' in hisi-pmu.rstWill Deacon1-20/+24
Building the 'htmldocs' target results in the following warning when processing 'hisi-pmu.rst': | Documentation/admin-guide/perf/hisi-pmu.rst:107: ERROR: Unexpected indentation. Fix the warning by converting all of the register bitfield lists into proper bulleted lists and adjusting the indentation of the wrapping line accordingly. At the same time, use an enumerated list to describe the new PMUv2 functions. Fixes: ea8d1c062a0e ("docs: perf: Add new description for HiSilicon UC PMU") Reported-by: Stephen Rothwell <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2023-06-16docs: perf: Add new description for HiSilicon UC PMUJunhao He1-0/+8
A new function is added on HiSilicon uncore UC PMU. The UC PMU support to filter statistical information based on the specified tx request uring channel. Make user configuration through "uring_channel" parameter. Document them to provide guidance on how to use them. Signed-off-by: Junhao He <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Yicong Yang <[email protected]> Acked-by: Mark Rutland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2023-02-02Documentation: admin-guide: correct spellingRandy Dunlap1-1/+1
Correct spelling problems for Documentation/admin-guide/ as reported by codespell. Signed-off-by: Randy Dunlap <[email protected]> Reviewed-by: Mukesh Ojha <[email protected]> Cc: Tejun Heo <[email protected]> Cc: Zefan Li <[email protected]> Cc: Johannes Weiner <[email protected]> Cc: [email protected] Cc: Alasdair Kergon <[email protected]> Cc: Mike Snitzer <[email protected]> Cc: [email protected] Cc: Mauro Carvalho Chehab <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Corbet <[email protected]>
2022-11-29drivers/perf: hisi: Add TLP filter supportYicong Yang1-0/+18
The PMU support to filter the TLP when counting the bandwidth with below options: - only count the TLP headers - only count the TLP payloads - count both TLP headers and payloads In the current driver it's default to count the TLP payloads only, which will have an implicity side effects that on the traffic only have header only TLPs, we'll get no data. Make this user configuration through "len_mode" parameter and make it default to count both TLP headers and payloads when user not specified. Also update the documentation for it. Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Yicong Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-11-29Documentation: perf: Indent filter options list of hisi-pcie-pmuBagas Sanjaya1-37/+43
The "Filter options" list have a rather ugly indentation. Also, the first paragraph after list name is rendered without separator (as continuation from the name). Align the list by indenting the list items and add a blank line separator for each list name. Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Bagas Sanjaya <[email protected]> Signed-off-by: Yicong Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-11-29docs: perf: Fix PMU instance name of hisi-pcie-pmuYicong Yang1-11/+11
The PMU instance will be called hisi_pcie<sicl>_core<core> rather than hisi_pcie<sicl>_<core>. Fix this in the documentation. Fixes: c8602008e247 ("docs: perf: Add description for HiSilicon PCIe PMU driver") Reviewed-by: Jonathan Cameron <[email protected]> Signed-off-by: Yicong Yang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-11-21docs/perf: Add documentation for the Amlogic G12 DDR PMUJiucheng Xu2-0/+71
Add a user guide to show how to use DDR PMU to monitor DDR bandwidth on Amlogic G12 SoC Signed-off-by: Jiucheng Xu <[email protected]> Reviewed-by: Chris Healy <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-11-15perf: arm_cspmu: Add support for NVIDIA SCF and MCF attributeBesar Wicaksono2-0/+300
Add support for NVIDIA System Cache Fabric (SCF) and Memory Control Fabric (MCF) PMU attributes for CoreSight PMU implementation in NVIDIA devices. Acked-by: Suzuki K Poulose <[email protected]> Signed-off-by: Besar Wicaksono <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-09-22docs: perf: Add description for Alibaba's T-Head PMU driverShuai Xue2-0/+101
Alibaba's T-Head SoC implements uncore PMU for performance and functional debugging to facilitate system maintenance. Document it to provide guidance on how to use it. Signed-off-by: Shuai Xue <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Baolin Wang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-07-07docs: perf: Include hns3-pmu.rst in toctree to fix 'htmldocs' WARNINGWill Deacon1-0/+1
After commit 39915b6b5fc2 ("drivers/perf: hisi: Add description for HNS3 PMU driver"),building the 'htmldocs' target results in the following warning: | Documentation/admin-guide/perf/hns3-pmu.rst: WARNING: document isn't included in any toctree Add 'hns3-pmu' to the perf toctree to silence the warning. Reported-by: Stephen Rothwell <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2022-07-06drivers/perf: hisi: Add description for HNS3 PMU driverGuangbin Huang1-0/+136
HNS3 PMU End Point device is supported on HiSilicon HIP09 platform, so add document hns3-pmu.rst to provide guidance on how to use it. Signed-off-by: Guangbin Huang <[email protected]> Reviewed-by: John Garry <[email protected]> Reviewed-by: Shaokun Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2022-03-04docs: fix 'make htmldocs' warning in perfWan Jiabing1-0/+1
Fix following 'make htmldocs' warnings: ./Documentation/admin-guide/perf/hisi-pcie-pmu.rst: WARNING: document isn't included in any toctree Fixes: c8602008e247 ("docs: perf: Add description for HiSilicon PCIe PMU driver") Signed-off-by: Wan Jiabing <[email protected]> Reviewed-by: John Garry <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Corbet <[email protected]>
2021-12-14docs: perf: Add description for HiSilicon PCIe PMU driverQi Liu1-0/+106
PCIe PMU Root Complex Integrated End Point(RCiEP) device is supported on HiSilicon HIP09 platform. Document it to provide guidance on how to use it. Reviewed-by: John Garry <[email protected]> Signed-off-by: Qi Liu <[email protected]> Reviewed-by: Shaokun Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2021-03-30docs: perf: Address some html build warningsQi Liu1-3/+8
Fix following html build warnings: Documentation/admin-guide/perf/hisi-pmu.rst:61: WARNING: Unexpected indentation. Documentation/admin-guide/perf/hisi-pmu.rst:62: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/admin-guide/perf/hisi-pmu.rst:69: WARNING: Unexpected indentation. Documentation/admin-guide/perf/hisi-pmu.rst:70: WARNING: Block quote ends without a blank line; unexpected unindent. Documentation/admin-guide/perf/hisi-pmu.rst:83: WARNING: Unexpected indentation. Fixes: 9b86b1b41e0f ("docs: perf: Add new description on HiSilicon uncore PMU v2") Reported-by: Stephen Rothwell <[email protected]> Signed-off-by: Qi Liu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2021-03-25docs: perf: Add new description on HiSilicon uncore PMU v2Shaokun Zhang1-0/+49
Some news functions are added on HiSilicon uncore PMUs. Document them to provide guidance on how to use them. Cc: Mark Rutland <[email protected]> Cc: Will Deacon <[email protected]> Cc: John Garry <[email protected]> Cc: Jonathan Cameron <[email protected]> Reviewed-by: John Garry <[email protected]> Co-developed-by: Qi Liu <[email protected]> Signed-off-by: Qi Liu <[email protected]> Signed-off-by: Shaokun Zhang <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
2021-01-28perf/arm-cmn: Fix PMU instance namingRobin Murphy1-1/+1
Although it's neat to avoid the suffix for the typical case of a single PMU, it means systems with multiple CMN instances end up with inconsistent naming. I think it also breaks perf tool's "uncore alias" logic if the common instance prefix is also the full name of one. Avoid any surprises by not trying to be clever and simply numbering every instance, even when it might technically prove redundant. Fixes: 0ba64770a2f2 ("perf: Add Arm CMN-600 PMU driver") Signed-off-by: Robin Murphy <[email protected]> Link: https://lore.kernel.org/r/649a2281233f193d59240b13ed91b57337c77b32.1611839564.git.robin.murphy@arm.com Signed-off-by: Will Deacon <[email protected]>
2020-12-08Documentation: fix multiple typos found in the admin-guide subdirectoryAndrew Klychkov1-1/+1
Fix thirty five typos in dm-integrity.rst, dm-raid.rst, dm-zoned.rst, verity.rst, writecache.rst, tsx_async_abort.rst, md.rst, bttv.rst, dvb_references.rst, frontend-cardlist.rst, gspca-cardlist.rst, ipu3.rst, remote-controller.rst, mm/index.rst, numaperf.rst, userfaultfd.rst, module-signing.rst, imx-ddr.rst, intel-speed-select.rst, intel_pstate.rst, ramoops.rst, abi.rst, kernel.rst, vm.rst Signed-off-by: Andrew Klychkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Corbet <[email protected]>
2020-09-28perf: Add Arm CMN-600 PMU driverRobin Murphy2-0/+66
Initial driver for PMU event counting on the Arm CMN-600 interconnect. CMN sports an obnoxiously complex distributed PMU system as part of its debug and trace features, which can do all manner of things like sampling, cross-triggering and generating CoreSight trace. This driver covers the PMU functionality, plus the relevant aspects of watchpoints for simply counting matching flits. Tested-by: Tsahi Zidenberg <[email protected]> Tested-by: Tuan Phan <[email protected]> Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2020-07-05Documentation/admin-guide: arm-ccn: drop doubled wordRandy Dunlap1-1/+1
Drop the doubled word "as". Signed-off-by: Randy Dunlap <[email protected]> Cc: Jonathan Corbet <[email protected]> Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jonathan Corbet <[email protected]>
2020-03-10docs: perf: imx-ddr.rst: get rid of a warningMauro Carvalho Chehab1-1/+2
Documentation/admin-guide/perf/imx-ddr.rst:47: WARNING: Unexpected indentation. Signed-off-by: Mauro Carvalho Chehab <[email protected]> Link: https://lore.kernel.org/r/b27b54bd4f847032fd33313d6497ff320c0f3d78.1583250595.git.mchehab+huawei@kernel.org Signed-off-by: Jonathan Corbet <[email protected]>
2019-12-02Merge tag 'docs-5.5a' of git://git.lwn.net/linuxLinus Torvalds2-12/+22
Pull Documentation updates from Jonathan Corbet: "Here are the main documentation changes for 5.5: - Various kerneldoc script enhancements. - More RST conversions; those are slowing down as we run out of things to convert, but we're a ways from done still. - Dan's "maintainer profile entry" work landed at last. Now we just need to get maintainers to fill in the profiles... - A reworking of the parallel build setup to work better with a variety of systems (and to not take over huge systems entirely in particular). - The MAINTAINERS file is now converted to RST during the build. Hopefully nobody ever tries to print this thing, or they will need to load a lot of paper. - A script and documentation making it easy for maintainers to add Link: tags at commit time. Also included is the removal of a bunch of spurious CR characters" * tag 'docs-5.5a' of git://git.lwn.net/linux: (91 commits) docs: remove a bunch of stray CRs docs: fix up the maintainer profile document libnvdimm, MAINTAINERS: Maintainer Entry Profile Maintainer Handbook: Maintainer Entry Profile MAINTAINERS: Reclaim the P: tag for Maintainer Entry Profile docs, parallelism: Rearrange how jobserver reservations are made docs, parallelism: Do not leak blocking mode to other readers docs, parallelism: Fix failure path and add comment Documentation: Remove bootmem_debug from kernel-parameters.txt Documentation: security: core.rst: fix warnings Documentation/process/howto/kokr: Update for 4.x -> 5.x versioning Documentation/translation: Use Korean for Korean translation title docs/memory-barriers.txt: Remove remaining references to mmiowb() docs/memory-barriers.txt/kokr: Update I/O section to be clearer about CPU vs thread docs/memory-barriers.txt/kokr: Fix style, spacing and grammar in I/O section Documentation/kokr: Kill all references to mmiowb() docs/memory-barriers.txt/kokr: Rewrite "KERNEL I/O BARRIER EFFECTS" section docs: Add initial documentation for devfreq Documentation: Document how to get links with git am docs: Add request_irq() documentation ...
2019-11-04docs/perf: Add AXI ID filter capabilities informationJoakim Zhang1-4/+8
Add capabilities information for AXI ID filter. Signed-off-by: Joakim Zhang <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-11-04docs/perf: Add explanation for DDR_CAP_AXI_ID_FILTER_ENHANCED quirkJoakim Zhang1-0/+5
Add explanation for DDR_CAP_AXI_ID_FILTER_ENHANCED quirk. Signed-off-by: Joakim Zhang <[email protected]> [will: Simplified wording] Signed-off-by: Will Deacon <[email protected]>
2019-10-29Documentation: perf: Update documentation for ThunderX2 PMU uncore driverGanapatrao Prabhakerrao Kulkarni1-9/+11
Add documentation for Cavium Coherent Processor Interconnect (CCPI2) PMU. Signed-off-by: Ganapatrao Prabhakerrao Kulkarni <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-10-01docs: perf: Add imx-ddr to documentation indexAdam Zerella2-13/+23
Sphinx is currently outputting a warning where the file 'imx-ddr.rst' is not included in the documentation index. Additionally, the code highlighting and doc formatting can be slightly improved. Signed-off-by: Adam Zerella <[email protected]> Signed-off-by: Jonathan Corbet <[email protected]>
2019-08-28docs/perf: Add documentation for the i.MX8 DDR PMUJoakim Zhang1-0/+52
Add some documentation describing the DDR PMU residing in the Freescale i.MDX SoC and its perf driver implementation in Linux. Signed-off-by: Joakim Zhang <[email protected]> Signed-off-by: Will Deacon <[email protected]>
2019-07-15docs: add SPDX tags to new index filesMauro Carvalho Chehab1-0/+2
All those new files I added are under GPL v2.0 license. Add the corresponding SPDX headers to them. Signed-off-by: Mauro Carvalho Chehab <[email protected]>
2019-07-15docs: perf: move to the admin-guideMauro Carvalho Chehab8-0/+320
The perf infrastructure is used for userspace to track issues. At least a good part of what's described here is related to it. So, add it to the admin-guide. Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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