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2020-10-30docs: ABI: cleanup several ABI documentsMauro Carvalho Chehab1-0/+3
There are some ABI documents that, while they don't generate any warnings, they have issues when parsed by get_abi.pl script on its output result. Address them, in order to provide a clean output. Reviewed-by: Tom Rix <[email protected]> # for fpga-manager Reviewed-By: Kajol Jain<[email protected]> # for sysfs-bus-event_source-devices-hv_gpci and sysfs-bus-event_source-devices-hv_24x7 Acked-by: Jonathan Cameron <[email protected]> #for IIO Acked-by: Oded Gabbay <[email protected]> # for Habanalabs Acked-by: Vaibhav Jain <[email protected]> # for sysfs-bus-papr-pmem Acked-by: Cezary Rojewski <[email protected]> # for catpt Acked-by: Suzuki K Poulose <[email protected]> Acked-by: Ilya Dryomov <[email protected]> # for rbd Acked-by: Jonathan Corbet <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]> Link: https://lore.kernel.org/r/5bc78e5b68ed1e9e39135173857cb2e753be868f.1604042072.git.mchehab+huawei@kernel.org Signed-off-by: Greg Kroah-Hartman <[email protected]>
2019-06-19MAINTAINERS / Documentation: Thorsten Scherer is the successor of Gavin SchenkGavin Schenk1-11/+11
Due to new challenges in my life I can no longer take care of SIOX. Thorsten takes over my SIOX tasks. Signed-off-by: Gavin Schenk <[email protected]> Acked-by: Thorsten Scherer <[email protected]> Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
2017-12-19siox: new driver framework for eckelmann SIOXUwe Kleine-König1-0/+87
SIOX is a bus system invented at Eckelmann AG to control their building management and refrigeration systems. Traditionally the bus was implemented on custom microcontrollers, today Linux based machines are in use, too. The topology on a SIOX bus looks as follows: ,------->--DCLK-->---------------+----------------------. ^ v v ,--------. ,----------------------. ,------ | | | ,--------------. | | | |--->--DOUT-->---|->-|shift register|->-|--->---| | | | `--------------' | | | master | | device | | device | | | ,--------------. | | | |---<--DIN---<---|-<-|shift register|-<-|---<---| | | | `--------------' | | `--------' `----------------------' `------ v ^ ^ `----------DLD-------------------+----------------------' There are two control lines (DCLK and DLD) driven from the bus master to all devices in parallel and two daisy chained data lines, one for input and one for output. DCLK is the clock to shift both chains by a single bit. On an edge of DLD the devices latch both their input and output shift registers. This patch adds a framework for this bus type. Acked-by: Gavin Schenk <[email protected]> Signed-off-by: Uwe Kleine-König <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>