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2024-08-29ACPICA: Implement ACPI_WARNING_ONCE and ACPI_ERROR_ONCEVasily Khoruzhick1-0/+5
ACPICA commit 2ad4e6e7c4118f4cdfcad321c930b836cec77406 In some cases it is not practical nor useful to nag user about some firmware errors that they cannot fix. Add a macro that will print a warning or error only once to be used in these cases. Link: https://github.com/acpica/acpica/commit/2ad4e6e7 Signed-off-by: Vasily Khoruzhick <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29ACPICA: MPAM: Correct the typo in struct acpi_mpam_msc_node memberPunit Agrawal1-1/+1
ACPICA commit 3da3f7d776d17e9bfbb15de88317de8d7397ce38 A member of the struct acpi_mpam_msc_node that represents a Memory System Controller node structure - num_resource_nodes has a typo. Fix the typo No functional change. Link: https://github.com/acpica/acpica/commit/3da3f7d7 Signed-off-by: Punit Agrawal <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29libbpf: Fix bpf_object__open_skeleton()'s mishandling of optionsAndrii Nakryiko1-33/+19
We do an ugly copying of options in bpf_object__open_skeleton() just to be able to set object name from skeleton's recorded name (while still allowing user to override it through opts->object_name). This is not just ugly, but it also is broken due to memcpy() that doesn't take into account potential skel_opts' and user-provided opts' sizes differences due to backward and forward compatibility. This leads to copying over extra bytes and then failing to validate options properly. It could, technically, lead also to SIGSEGV, if we are unlucky. So just get rid of that memory copy completely and instead pass default object name into bpf_object_open() directly, simplifying all this significantly. The rule now is that obj_name should be non-NULL for bpf_object_open() when called with in-memory buffer, so validate that explicitly as well. We adopt bpf_object__open_mem() to this as well and generate default name (based on buffer memory address and size) outside of bpf_object_open(). Fixes: d66562fba1ce ("libbpf: Add BPF object skeleton support") Reported-by: Daniel Müller <[email protected]> Signed-off-by: Andrii Nakryiko <[email protected]> Signed-off-by: Daniel Borkmann <[email protected]> Reviewed-by: Daniel Müller <[email protected]> Acked-by: Eduard Zingerman <[email protected]> Link: https://lore.kernel.org/bpf/[email protected]
2024-08-29soc/tegra: pmc: Simplify with scoped for each OF child loopJinjie Ruan1-8/+4
Use scoped for_each_child_of_node_scoped() when iterating over device nodes to make code a bit simpler. Signed-off-by: Jinjie Ruan <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: defconfig: Enable Tegra194 PCIe EndpointJon Hunter1-0/+1
Build the Tegra194 PCIe Endpoint driver as a module by default for ARM64. Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ACPICA: Implement the Dword_PCC Resource Descriptor MacroJose Marinho1-0/+2
ACPICA commit 1209ecf682e03d9ef0c22f4986a2e53b03bd2985 The Dword_pcc (alongside word_pcc and Qword_pcc) were accepted to ACPI inclusion via a code-first process. This patch implements support in iASL for Dword_pcc. Link: https://bugzilla.tianocore.org/show_bug.cgi?id=4594 Link: https://github.com/acpica/acpica/commit/1209ecf6 Signed-off-by: Jose Marinho <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29arm64: tegra: Add thermal nodes to AGX Orin SKU8Dara Stotland1-0/+22
One of the key differences between p3701-0000 and p3701-0008 is the temperature range. Add this info for p3701-0008. Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Move BPMP nodes to AGX Orin moduleDara Stotland2-16/+17
All SKUs of the p3701 module contain a temp sensor connected to the BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi to tegra234-p3701.dtsi. Add missing compatible. Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Move padctl supply nodes to AGX Orin moduleDara Stotland3-33/+23
Some padctl supply nodes currently reside in board file, when they should reside on module level. The nodes are part of module, not board. Move these nodes to the correct AGX Orin module file. Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Move AGX Orin nodes to correct locationDara Stotland2-25/+26
Some of the nodes inside the AGX Orin module file are in the wrong location. In particular, the SD card interface and two of the PCIe regulators in the module file should instead reside in the board file. These components are not part of the module. They are part of the carrier board. Move these nodes to the correct location. Fixes: cd42b26a527f ("arm64: tegra: Add regulators required for PCIe") Fixes: d71b893a119d ("arm64: tegra: Add Tegra234 SDMMC1 device tree node") Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Combine IGX Orin board filesDara Stotland2-249/+235
Current IGX Orin structure has both a top-level module+board file as well as a board file. Most of the data in the board-file is closely related to the module itself. The benefit of this extra file is outweighed by the additional complexity. Merge the board file into the module+board file for simplicity. Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Combine AGX Orin board filesDara Stotland2-92/+80
The current AGX Orin structure has both a top-level module+board file as well as a board file. Most of the data in the board-file is closely related to the module itself. The benefit of this extra file is outweighed by the additional complexity. Merge the board file into the module+board file for simplicity. Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Add common nodes to AGX Orin moduleDara Stotland3-172/+85
The AGX Orin module boards contain common nodes that can be moved to the included module dtsi. This eliminates redundancy within the files and reduces lines of code. Data from tegra234-p3701-0000 and tegra234-p3701-0008 that is common is now in tegra234-p3701.dtsi. Signed-off-by: Dara Stotland <[email protected]> Reviewed-by: Brad Griffis <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: Wire up two front panel LEDs on TrimSliceTomasz Maciej Nowak1-5/+25
Pins responsible for controlling these LEDs need to have tristate control removed if we want them as GPIOs. This change aligns with pinmux configuration of "dte" pin group in downstream kernel[1]. These LEDs had no function assigned on vendor kernel and there is no label on the case, the only markings are on PCB which are part of node names (ds1 marking is on power LED controlled by PMIC), so generic term is assigned as the function. 1. https://github.com/compulab/trimslice-android-kernel/blob/upstream/arch/arm/mach-tegra/board-trimslice-pinmux.c#L45 Signed-off-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ACPICA: Headers: Add RISC-V SBI Subtype to DBG2Sia Jee Heng1-0/+1
ACPICA commit 6f4c900bcf9ca065129353f17a83773aa58095aa Include the RISC-V SBI debugging subtype as documented in DBG2 dated April 10, 2023 [1]. Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-port-table # [1] Link: https://github.com/acpica/acpica/commit/6f4c900b Signed-off-by: Sia Jee Heng <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29arm64: tegra: Wire up WiFi on Jetson TX1 moduleTomasz Maciej Nowak1-0/+19
P2180 modules have WiFi in form of BCM4354 chip, and kernel driver supports this one, so enable it for all users. The necessary calibration file can be obtained from Jetson Linux Archive. nvram.txt file is located in "Driver Package (BSP)" in nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb archive. The rest of necessary blobs can be obtained from official Linux Firmware repository or (newer ones) from Infineon ifx-linux-firmware repository (look in older releases). Signed-off-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Wire up Bluetooth on Jetson TX1 moduleTomasz Maciej Nowak1-0/+16
P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver supports this one, so enable it for all users. The necessary firmware can be obtained from Jetson Linux Archive. bcm4354.hcd file is located in "Driver Package (BSP)" in nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb archive. Signed-off-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29perf: cs-etm: Allocate queues for all CPUsJames Clark1-28/+25
Make cs_etm__setup_queue() setup a queue even if it's empty, and pre-allocate queues based on the max CPU that was recorded. In per-CPU mode aux queues are indexed based on CPU ID even if all CPUs aren't recorded, sparse queue arrays aren't used. This will allow HW_IDs to be saved even if no aux data was received in that queue without having to call cs_etm__setup_queue() from two different places. Reviewed-by: Mike Leach <[email protected]> Signed-off-by: James Clark <[email protected]> Cc: Adrian Hunter <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Anshuman Khandual <[email protected]> Cc: Ganapatrao Kulkarni <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: John Garry <[email protected]> Cc: Kan Liang <[email protected]> Cc: Leo Yan <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Suzuki Poulouse <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: James Clark <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2024-08-29arm64: tegra: Wire up power sensors on Jetson TX1 DevKitTomasz Maciej Nowak2-0/+79
One INA3221 sensor is located on P2180 module and the other two are on P2597 base board. Signed-off-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ACPICA: SPCR: Update the SPCR table to version 4Sia Jee Heng1-4/+8
ACPICA commit 1eeff52124a45d5cd887ba5687bbad0116e4d211 The Microsoft Serial Port Console Redirection (SPCR) specification revision 1.09 comprises additional fields [1]. The newly added fields are: - RISC-V SBI - Precise Baud Rate - namespace_string_length - namespace_string_offset - namespace_string Additionaly, this code will support up to SPCR revision 1.10, as it includes only minor wording changes. Link: https://learn.microsoft.com/en-us/windows-hardware/drivers/serports/serial-port-console-redirection-table # [1] Link: https://github.com/acpica/acpica/commit/1eeff521 Signed-off-by: Sia Jee Heng <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29perf cs-etm: Create decoders after both AUX and HW_ID search passesJames Clark1-69/+113
Both of these passes gather information about how to create the decoders. AUX records determine formatted/unformatted, and the HW_IDs determine the traceID/metadata mappings. Therefore it makes sense to cache the information and wait until both passes are over until creating the decoders, rather than creating them at the first HW_ID found. This will allow a simplification of the creation process where cs_etm_queue->traceid_list will exclusively used to create the decoders, rather than the current two methods depending on whether the trace is formatted or not. Previously the sample CPU from the AUX record was used to initialize the decoder CPU, but actually sample CPU == AUX queue index in per-CPU mode, so saving the sample CPU isn't required. Similarly formatted/unformatted was used upfront to create the decoders, but now it's cached until later. Reviewed-by: Anshuman Khandual <[email protected]> Reviewed-by: Mike Leach <[email protected]> Signed-off-by: James Clark <[email protected]> Signed-off-by: James Clark <[email protected]> Tested-by: Ganapatrao Kulkarni <[email protected]> Tested-by: Leo Yan <[email protected]> Acked-by: Suzuki Poulouse <[email protected]> Cc: Adrian Hunter <[email protected]> Cc: Alexander Shishkin <[email protected]> Cc: Alexandre Torgue <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Ingo Molnar <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: John Garry <[email protected]> Cc: Kan Liang <[email protected]> Cc: Leo Yan <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Maxime Coquelin <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Peter Zijlstra <[email protected]> Cc: Will Deacon <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2024-08-29arm64: tegra: Add p3767 PCIe C4 EP detailsVedant Deshpande1-0/+12
Add implementation details for Orin NX/Nano PCIe EP on C4. Signed-off-by: Vedant Deshpande <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Add Tegra234 PCIe C4 EP definitionVedant Deshpande1-0/+31
Add PCIe C4 EP controller definition in device tree for Tegra234 devices. Signed-off-by: Vedant Deshpande <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ACPICA: Complete CXL 3.0 CXIMS structuresZhang Rui1-0/+4
ACPICA commit eb2a2ff303416fb3f6c425d519dbcd6988dbd91f Commit 2d8dc0383d3c9 ("Add CXL 3.0 structures (CXIMS & RDPAS) to the CEDT table") introduces basic support for CXL XOR Interleave Math Structure (CXIMS). Complete the CXIMS structures. No functional change. Link: https://github.com/acpica/acpica/commit/eb2a2ff3 Signed-off-by: Zhang Rui <[email protected]> Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29arm64: tegra: Add wp-gpio for P2597's external card slotDiogo Ivo1-0/+1
Add the definition for the wp-gpio of the P2597's external card slot, enabling this functionality. Tested on a P2597 board. Signed-off-by: Diogo Ivo <[email protected]> Tested-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29arm64: tegra: Fix gpio for P2597 vmmc regulatorDiogo Ivo1-1/+1
The current declaration is off-by-one and actually corresponds to the wp-gpio of the external slot. Tested on a P2597 board. Signed-off-by: Diogo Ivo <[email protected]> Tested-by: Tomasz Maciej Nowak <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ACPICA: haiku: Fix invalid value used for semaphoresAdrien Destugues3-3/+9
ACPICA commit 49fe4f25483feec2f685b204ef19e28d92979e95 In Haiku, semaphores are represented by integers, not pointers. So, we can't use NULL as the invalid/destroyed value, the correct value is -1. Introduce a platform overridable define to allow this. Fixes #162 (which was closed after coming to the conclusion that this should be done, but the change was never done). Link: https://github.com/acpica/acpica/commit/49fe4f25 Signed-off-by: Rafael J. Wysocki <[email protected]>
2024-08-29dt-bindings: arm: tegra: Document Nyan, all revisions in kernel treeDavid Heidelberg1-0/+42
Avoid firing useless warnings when running make dtbs_check Signed-off-by: David Heidelberg <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Configure USBSvyatoslav Ryhel1-4/+4
Fixes issue when resuming after suspend made USB in peripheral mode inaccessible. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Use dedicated backlight regulatorSvyatoslav Ryhel1-2/+1
Downstream kernel states that backlight has no actual enable GPIO and uses fixed regulator. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Re-group GPIO keysSvyatoslav Ryhel1-8/+12
Group GPIO keys into keys and switches. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Bind WIFI SDIO and EMMCSvyatoslav Ryhel1-2/+55
Add MMC nodes configuration along with WIFI binding to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Complete sound bindingsSvyatoslav Ryhel1-7/+17
With these changes sound works, only UCM configs are needed for complete support. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Adjust sensors nodesSvyatoslav Ryhel1-3/+18
Complete and adjust magnetometer, thermal sensor, motion tracker, power and light sensors according to available sources. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Add Bluetooth nodeSvyatoslav Ryhel1-1/+27
Add serial node along with bluetooth node to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Add HDMI bindingsSvyatoslav Ryhel1-2/+31
Add HDMI nodes to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Correct and complete PMIC and PMC bindingsSvyatoslav Ryhel1-68/+195
Add missing parts of PMIC complex, extend PMC binding and add missing fixed regulators. Additionally, refresh naming to better reflect regulator purpose. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Bind VDE deviceSvyatoslav Ryhel1-0/+6
Add Video Decoder Engine node to ASUS TF701T device-tree. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29ARM: tegra: tf701t: Use unimomentary pinmux setupSvyatoslav Ryhel1-108/+993
Mimic original downstream board behavior to set up all pinmux at once. Per-device pinmux is good but we have no complete board schematics to allow such luxury. Signed-off-by: Svyatoslav Ryhel <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2024-08-29lsm: Use IS_ERR_OR_NULL() helper functionHongbo Li1-1/+1
Use the IS_ERR_OR_NULL() helper instead of open-coding a NULL and an error pointer checks to simplify the code and improve readability. Signed-off-by: Hongbo Li <[email protected]> Signed-off-by: Paul Moore <[email protected]>
2024-08-29ASoC: sunxi: sun4i-i2s: fix LRCLK polarity in i2s modeMatteo Martelli1-70/+73
This fixes the LRCLK polarity for sun8i-h3 and sun50i-h6 in i2s mode which was wrongly inverted. The LRCLK was being set in reversed logic compared to the DAI format: inverted LRCLK for SND_SOC_DAIFMT_IB_NF and SND_SOC_DAIFMT_NB_NF; normal LRCLK for SND_SOC_DAIFMT_IB_IF and SND_SOC_DAIFMT_NB_IF. Such reversed logic applies properly for DSP_A, DSP_B, LEFT_J and RIGHT_J modes but not for I2S mode, for which the LRCLK signal results reversed to what expected on the bus. The issue is due to a misinterpretation of the LRCLK polarity bit of the H3 and H6 i2s controllers. Such bit in this case does not mean "0 => normal" or "1 => inverted" according to the expected bus operation, but it means "0 => frame starts on low edge" and "1 => frame starts on high edge" (from the User Manuals). This commit fixes the LRCLK polarity by setting the LRCLK polarity bit according to the selected bus mode and renames the LRCLK polarity bit definition to avoid further confusion. Fixes: dd657eae8164 ("ASoC: sun4i-i2s: Fix the LRCK polarity") Fixes: 73adf87b7a58 ("ASoC: sun4i-i2s: Add support for H6 I2S") Signed-off-by: Matteo Martelli <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
2024-08-29drm/i915: deprecate the i915.modeset module parameterJani Nikula2-2/+7
The i915.modeset parameter doesn't really provide any useful benefit over the nomodeset kernel parameter. Anything that i915.modeset does can be achieved via nomodeset or not probing i915 at all. Unfortunately, the i915.modeset parameter is widely referenced on various forums, and removing it is not that simple. Start off by deprecating it in the module parameter documentation, and logging a warning message on non-default values. Cc: Daniel Veter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/2c63e2048eed64f728478fbcfc84f51c7f3212e6.1724843853.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-08-29drm/i915: fail module probe on nomodeset and i915.modeset=0Jani Nikula1-2/+1
Since commit b30324adaf8d ("drm/i915: Deprecated UMS support") we've silently failed the probe, without propagating errors, on nomodeset and i915.modeset=0. This has been to not upset userspace. See the above commit for details. Since then, we've removed both the UMS and KMS kconfig options in commit 03dae59c72ff ("drm/i915: Ditch UMS config option") and commit fd930478fb79 ("drm/i915: Remove KMS Kconfig option") respectively. Another ten years or so have passed. Continue with the deprecation by actually failing the probe with nomodeset and i915.modeset=0. Cc: Daniel Veter <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/1f34651ae8ae96dd5ecd9969b5bc43d23feda08c.1724843853.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <[email protected]>
2024-08-29Revert "tools build: Remove leftover libcap tests that prevents fast path ↵Arnaldo Carvalho de Melo2-1/+25
feature detection from working" Ian pointed out that the libcap feature test is also used by bpftool, so we can't remove it just because perf stopped using it, revert the removal of the feature test. Since both perf and libcap uses the fast path feature detection (tools/build/feature/test-all.c), probably the best thing is to keep libcap-devel when building perf even it not being used there. This reverts commit 47b3b6435e4bfb61ae8ffc63a11bd3c310f69acf. Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Kan Liang <[email protected]> Cc: Namhyung Kim <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
2024-08-29drm/mediatek: Use spin_lock_irqsave() for CRTC event lockFei Shao1-2/+3
Use the state-aware spin_lock_irqsave() and spin_unlock_irqrestore() to avoid unconditionally re-enabling the local interrupts. Fixes: 411f5c1eacfe ("drm/mediatek: handle events when enabling/disabling crtc") Signed-off-by: Fei Shao <[email protected]> Link: https://patchwork.kernel.org/project/dri-devel/patch/[email protected]/ Signed-off-by: Chun-Kuang Hu <[email protected]>
2024-08-29io_uring/kbuf: add support for incremental buffer consumptionJens Axboe3-20/+82
By default, any recv/read operation that uses provided buffers will consume at least 1 buffer fully (and maybe more, in case of bundles). This adds support for incremental consumption, meaning that an application may add large buffers, and each read/recv will just consume the part of the buffer that it needs. For example, let's say an application registers 1MB buffers in a provided buffer ring, for streaming receives. If it gets a short recv, then the full 1MB buffer will be consumed and passed back to the application. With incremental consumption, only the part that was actually used is consumed, and the buffer remains the current one. This means that both the application and the kernel needs to keep track of what the current receive point is. Each recv will still pass back a buffer ID and the size consumed, the only difference is that before the next receive would always be the next buffer in the ring. Now the same buffer ID may return multiple receives, each at an offset into that buffer from where the previous receive left off. Example: Application registers a provided buffer ring, and adds two 32K buffers to the ring. Buffer1 address: 0x1000000 (buffer ID 0) Buffer2 address: 0x2000000 (buffer ID 1) A recv completion is received with the following values: cqe->res 0x1000 (4k bytes received) cqe->flags 0x11 (CQE_F_BUFFER|CQE_F_BUF_MORE set, buffer ID 0) and the application now knows that 4096b of data is available at 0x1000000, the start of that buffer, and that more data from this buffer will be coming. Now the next receive comes in: cqe->res 0x2010 (8k bytes received) cqe->flags 0x11 (CQE_F_BUFFER|CQE_F_BUF_MORE set, buffer ID 0) which tells the application that 8k is available where the last completion left off, at 0x1001000. Next completion is: cqe->res 0x5000 (20k bytes received) cqe->flags 0x1 (CQE_F_BUFFER set, buffer ID 0) and the application now knows that 20k of data is available at 0x1003000, which is where the previous receive ended. CQE_F_BUF_MORE isn't set, as no more data is available in this buffer ID. The next completion is then: cqe->res 0x1000 (4k bytes received) cqe->flags 0x10001 (CQE_F_BUFFER|CQE_F_BUF_MORE set, buffer ID 1) which tells the application that buffer ID 1 is now the current one, hence there's 4k of valid data at 0x2000000. 0x2001000 will be the next receive point for this buffer ID. When a buffer will be reused by future CQE completions, IORING_CQE_BUF_MORE will be set in cqe->flags. This tells the application that the kernel isn't done with the buffer yet, and that it should expect more completions for this buffer ID. Will only be set by provided buffer rings setup with IOU_PBUF_RING INC, as that's the only type of buffer that will see multiple consecutive completions for the same buffer ID. For any other provided buffer type, any completion that passes back a buffer to the application is final. Once a buffer has been fully consumed, the buffer ring head is incremented and the next receive will indicate the next buffer ID in the CQE cflags. On the send side, the application can manage how much data is sent from an existing buffer by setting sqe->len to the desired send length. An application can request incremental consumption by setting IOU_PBUF_RING_INC in the provided buffer ring registration. Outside of that, any provided buffer ring setup and buffer additions is done like before, no changes there. The only change is in how an application may see multiple completions for the same buffer ID, hence needing to know where the next receive will happen. Note that like existing provided buffer rings, this should not be used with IOSQE_ASYNC, as both really require the ring to remain locked over the duration of the buffer selection and the operation completion. It will consume a buffer otherwise regardless of the size of the IO done. Signed-off-by: Jens Axboe <[email protected]>
2024-08-29io_uring/kbuf: pass in 'len' argument for buffer commitJens Axboe5-30/+31
In preparation for needing the consumed length, pass in the length being completed. Unused right now, but will be used when it is possible to partially consume a buffer. Signed-off-by: Jens Axboe <[email protected]>
2024-08-29Revert "io_uring: Require zeroed sqe->len on provided-buffers send"Jens Axboe1-3/+1
This reverts commit 79996b45f7b28c0e3e08a95bab80119e95317e28. Revert the change that restricts a send provided buffer to be zero, so it will always consume the whole buffer. This is strictly needed for partial consumption, as the send may very well be a subset of the current buffer. In fact, that's the intended use case. For non-incremental provided buffer rings, an application should set sqe->len carefully to avoid the potential issue described in the reverted commit. It is recommended that '0' still be set for len for that case, if the application is set on maintaining more than 1 send inflight for the same socket. This is somewhat of a nonsensical thing to do. Signed-off-by: Jens Axboe <[email protected]>
2024-08-29io_uring/kbuf: move io_ring_head_to_buf() to kbuf.hJens Axboe2-6/+3
In preparation for using this helper in kbuf.h as well, move it there and turn it into a macro. Signed-off-by: Jens Axboe <[email protected]>
2024-08-29io_uring/kbuf: add io_kbuf_commit() helperJens Axboe2-8/+13
Committing the selected ring buffer is currently done in three different spots, combine it into a helper and just call that. Signed-off-by: Jens Axboe <[email protected]>
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