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2023-11-22drm/i915/iosf: Drop unused APIsAndy Shevchenko2-20/+0
Drop unused vlv_iosf_sb_read() and vlv_iosf_sb_write(). Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Combine checks in mipi_exec_gpio()Andy Shevchenko1-3/+1
For a couple of cases the branches call the same bxt_gpio_set_value(). As Ville suggested they can be combined by dropping the DISPLAY_VER() check from Gen 11 to Gen 9. Do it that way. Suggested-by: Ville Syrjälä <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Replace poking of CHV GPIOs behind the driver's backAndy Shevchenko1-37/+10
It's a dirty hack in the driver that pokes GPIO registers behind the driver's back. Moreoever it might be problematic as simultaneous I/O may hang the system, see the commit 0bd50d719b00 ("pinctrl: cherryview: prevent concurrent access to GPIO controllers") for the details. Taking all this into consideration replace the hack with proper GPIO APIs being used. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Prepare soc_gpio_set_value() to distinguish GPIO communitiesAndy Shevchenko1-10/+10
Currently soc_gpio_set_value() supports only a single indexing for GPIO pin. For CHV case, for example, we will need to distinguish community based index from the one that VBT is using. Introduce an additional parameter to soc_gpio_set_value() and its callers. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Replace poking of VLV GPIOs behind the driver's backAndy Shevchenko1-70/+28
It's a dirty hack in the driver that pokes GPIO registers behind the driver's back. Moreoever it might be problematic as simultaneous I/O may hang the system, see the commit 40ecab551232 ("pinctrl: baytrail: Really serialize all register accesses") for the details. Taking all this into consideration replace the hack with proper GPIO APIs being used. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Extract common soc_gpio_set_value() helperAndy Shevchenko1-20/+26
Extract a common soc_gpio_set_value() helper that may be used by a few SoCs. Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Fix wrong initial value for GPIOs in bxt_gpio_set_value()Hans de Goede1-3/+1
Fix wrong initial value for GPIOs in bxt_gpio_set_value(). Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Remove GPIO lookup table at the end of intel_dsi_vbt_gpio_init()Hans de Goede1-16/+9
To properly deal with GPIOs used in MIPI panel sequences a temporary GPIO lookup will be used. Since there can only be 1 GPIO lookup table for the "0000:00:02.0" device this will not work if the GPIO lookup table used by intel_dsi_vbt_gpio_init() is still registered. After getting the "backlight" and "panel" GPIOs the lookup table registered by intel_dsi_vbt_gpio_init() is no longer necessary, remove it so that another temporary lookup-table for the "0000:00:02.0" device can be added. Signed-off-by: Hans de Goede <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Replace check with a (missing) MIPI sequence nameAndy Shevchenko1-1/+2
Names of the MIPI sequence steps are sequential and defined, no need to check for the gaps. However in seq_name the MIPI_SEQ_END is missing. Add it there, and drop unneeded NULL check in sequence_name(). Reviewed-by: Andi Shyti <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Get rid of redundant 'else'Andy Shevchenko1-29/+27
In the snippets like the following if (...) return / goto / break / continue ...; else ... the 'else' is redundant. Get rid of it. Reviewed-by: Andi Shyti <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: Replace while(1) with one with clear exit conditionAndy Shevchenko1-4/+1
Move existing condition to while(), so it will be clear on what circumstances the loop is successfully finishing. Reviewed-by: Andi Shyti <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Acked-by: Jani Nikula <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: bxt/icl GPIO set value do not need gpio sourceJani Nikula1-3/+3
Drop the unused parameter. Cc: Andy Shevchenko <[email protected]> Cc: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: rename platform specific *_exec_gpio() to *_gpio_set_value()Jani Nikula1-10/+10
The lowest level functions are about setting GPIO values, not about executing any sequences anymore. Cc: Andy Shevchenko <[email protected]> Cc: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: clarify GPIO exec sequenceJani Nikula1-14/+17
With the various sequence versions and pointer increments interleaved, it's a bit hard to decipher what's going on. Add separate paths for different sequence versions. Cc: Andy Shevchenko <[email protected]> Cc: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: switch mipi_exec_gpio() from dev_priv to i915Jani Nikula1-7/+7
Follow the contemporary conventions. Cc: Andy Shevchenko <[email protected]> Cc: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-22drm/i915/dsi: assume BXT gpio works for non-native GPIOJani Nikula1-9/+1
Purely a guess. Drop the nop function. Cc: Andy Shevchenko <[email protected]> Cc: Hans de Goede <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Signed-off-by: Andy Shevchenko <[email protected]> Tested-by: Hans de Goede <[email protected]> Reviewed-by: Hans de Goede <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp: Reuse intel_dp_{max,effective}_data_rate in ↵Imre Deak1-22/+3
intel_link_compute_m_n() Reuse intel_dp_max_data_rate() and intel_dp_effective_data_rate() in intel_link_compute_m_n(), instead of open-coding the equivalent. Note the kbit/sec -> kByte/sec unit change in the M/N values, but this not reducing the precision, as the link rate value is based anyway on a less precise 10 kbit/sec value. Suggested-by: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp: Simplify intel_dp_max_data_rate()Imre Deak1-14/+12
Simplify intel_dp_max_data_rate() using drm_dp_bw_channel_coding_efficiency() to calculate the max data rate for both DP1.4 and UHBR link rates. This trades a redundant multiply/divide for readability. Cc: Jani Nikula <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp: Report a rounded-down value as the maximum data rateImre Deak1-2/+2
Callers of intel_dp_max_data_rate() use the return value as an upper bound for the BW a given mode requires. As such the rounding shouldn't result in a bigger value than the actual upper bound. Use round-down instead of -closest accordingly. Cc: Jani Nikula <[email protected]> Reviewed-by: Stanislav Lisovskiy <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp_mst: Fix PBN / MTP_TU size calculation for UHBR ratesImre Deak3-10/+44
Atm the allocated MST PBN value is calculated from the TU size (number of allocated MTP slots) as PBN = TU * pbn_div pbn_div being the link BW for each MTP slot. For DP 1.4 link rates this worked, as pbn_div there is guraranteed to be an integer number, however on UHBR this isn't the case. To get a PBN, TU pair where TU is a properly rounded-up value covering all the BW corresponding to PBN, calculate first PBN and from PBN the TU value. Calculate PBN directly from the effective pixel data rate, instead of calculating it indirectly from the corresponding TU and pbn_div values (which are in turn derived from the pixel data rate and BW overhead). Add a helper function to calculate the effective data rate, also adding a note that callers of intel_dp_link_required() may also need to check the effective data rate (vs. the data rate w/o the BW overhead). While at it add a note to check if WA#14013163432 is applicable. v2: - Fix PBN calculation, deriving it from the effective data rate directly instead of using the indirect TU and pbn_div values for this. - Add a note about WA#14013163432. (Arun) v3: - Fix rounding up quotient while calculating remote_tu. (Ville) Cc: Ville Syrjälä <[email protected]> Reviewed-by: Arun R Murthy <[email protected]> (v1) Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp_mst: Calculate the BW overhead in ↵Imre Deak1-9/+18
intel_dp_mst_find_vcpi_slots_for_bpp() The next patch will calculate the PBN value directly from the pixel data rate and the BW allocation overhead, not requiring the data, link M/N and TU values for this. To prepare for that move the calculation of BW overheads from intel_dp_mst_compute_m_n() to intel_dp_mst_find_vcpi_slots_for_bpp(). While at it store link_bpp in a .4 fixed point format. Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp: Fix UHBR link M/N valuesImre Deak3-6/+36
The link M/N ratio is the data rate / link symbol clock rate, fix things up accordingly. On DP 1.4 this ratio was correct as the link symbol clock rate in that case matched the link data rate (in bytes/sec units, the symbol size being 8 bits), however it wasn't correct for UHBR rates where the symbol size is 32 bits. Kudos to Arun noticing in Bspec the incorrect use of link data rate in the ratio's N value. Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp: Account for channel coding efficiency on UHBR linksImre Deak1-10/+0
Apply the correct BW allocation overhead and channel coding efficiency on UHBR link rates, similarly to DP1.4 link rates. Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/i915/dp: Replace intel_dp_is_uhbr_rate() with drm_dp_is_uhbr_rate()Imre Deak3-8/+2
Replace intel_dp_is_uhbr_rate() with the recently added drm_dp_is_uhbr_rate(). Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/dp_mst: Add kunit tests for drm_dp_get_vc_payload_bw()Imre Deak1-0/+160
Add kunit test cases for drm_dp_get_vc_payload_bw() with all the DP1.4 and UHBR link configurations. v2: - List test cases in decreasing rate,lane count order matching the corresponding DP Standard tables. (Ville) - Add references to the DP Standard tables. v3: - Sort the testcases properly. v4: - Avoid 'stack frame size x exceeds limit y in drm_test_dp_mst_calc_pbn_div()' compiler warn. (LKP) Cc: Ville Syrjälä <[email protected]> Cc: Lyude Paul <[email protected]> Cc: [email protected] Cc: kernel test robot <[email protected]> Acked-by: Daniel Vetter <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Reviewed-by: Ville Syrjälä <[email protected]> (v3) Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/dp_mst: Fix PBN divider calculation for UHBR ratesImre Deak2-3/+20
The current way of calculating the pbn_div value, the link BW per each MTP slot, worked only for DP 1.4 link rates. Fix things up for UHBR rates calculating with the correct channel coding efficiency based on the link rate. v2: - Return the fractional pbn_div value from drm_dp_get_vc_payload_bw(). v3: - Fix rounding up quotient while calculating req_slots. (Ville) Cc: Ville Syrjälä <[email protected]> Cc: Lyude Paul <[email protected]> Cc: [email protected] Reviewed-by: Ville Syrjälä <[email protected]> Acked-by: Daniel Vetter <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-21drm/dp_mst: Store the MST PBN divider value in fixed point formatImre Deak7-18/+34
On UHBR links the PBN divider is a fractional number, accordingly store it in fixed point format. For now drm_dp_get_vc_payload_bw() always returns a whole number and all callers will use only the integer part of it which should preserve the current behavior. The next patch will fix drm_dp_get_vc_payload_bw() for UHBR rates returning a fractional number for those (also accounting for the channel coding efficiency correctly). Cc: Lyude Paul <[email protected]> Cc: Harry Wentland <[email protected]> Cc: Alex Deucher <[email protected]> Cc: Wayne Lin <[email protected]> Cc: [email protected] Cc: [email protected] Reviewed-by: Ville Syrjälä <[email protected]> Acked-by: Daniel Vetter <[email protected]> Acked-by: Maarten Lankhorst <[email protected]> [Rebased changes in dm_helpers_construct_old_payload() on drm-intel-next] Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-20drm/i915/fbc: Bump ivb FBC max surface size to 4kx4kVille Syrjälä1-1/+1
IVB Bspec says: "Frame Buffer Compression is only supported with memory surfaces of 4096 lines or less and pipe source sizes of 4096 pixels by 2048 lines or less. " so seems like we should be able to bump the offset+size limit to at least 4kx4k. Make it so. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Juha-Pekka Heikkila <[email protected]>
2023-11-20drm/i915/fbc: Bump max surface size to 8kx4k on icl+Ville Syrjälä1-1/+4
FBC on icl+ should supposedly be fine with surface sizes up to 8kx4k. Bump up the limit. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Juha-Pekka Heikkila <[email protected]>
2023-11-20drm/i915/fbc: Split plane size vs. surface size checks apartVille Syrjälä1-1/+31
Do separate checks for the visible plane size vs. the surface size (which I take to mean offset+size). For now both use the same max w/h, but we can relax the surface size limits as a followup. Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Juha-Pekka Heikkila <[email protected]>
2023-11-20drm/i915: Also check for VGA converter in eDP probeVille Syrjälä1-6/+22
Unfortunately even the HPD based detection added in commit cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe") fails to detect that the VBT's eDP/DDI-A is a ghost on Asus B360M-A (CFL+CNP). On that board eDP/DDI-A has its HPD asserted despite nothing being actually connected there :( The straps/fuses also indicate that the eDP port is present. So if one boots with a VGA monitor connected the eDP probe will mistake the DP->VGA converter hooked to DDI-E for an eDP panel on DDI-A. As a last resort check what kind of DP device we've detected, and if it looks like a DP->VGA converter then conclude that the eDP port should be ignored. Cc: [email protected] Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9636 Fixes: cfe5bdfb27fa ("drm/i915: Check HPD live state during eDP probe") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Jani Nikula <[email protected]>
2023-11-17drm/i915: convert vlv_dpio_read()/write() from pipe to phyJani Nikula5-151/+151
vlv_dpio_read() and vlv_dpio_write() really operate on the phy, not pipe. Passing the pipe instead of the phy as parameter is supposed to be a convenience, but when the caller has the phy, it becomes an inconvenience. See e.g. chv_dpio_cmn_power_well_enable() and assert_chv_phy_powergate(). Figure out the phy in the callers, and pass phy to the dpio functions. v2: retract one overzealous pipe->phy change (Ville) Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-17drm/i915: add vlv_pipe_to_phy() helper to replace DPIO_PHY()Jani Nikula5-5/+24
Add a helper with better typing and handing for bogus input, and better in line with vlv_dig_port_to_channel(), vlv_dig_port_to_phy(), and vlv_pipe_to_channel(). Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-17drm/i915: move *_crtc_clock_get() to intel_dpll.cJani Nikula5-177/+181
Considering what the functions do, intel_dpll.c is a more suitable location, and lets us make some functions static while at it. This also means intel_display.c no longer does any DPIO access. Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Jani Nikula <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-17drm/i915/display: keep struct intel_display members sortedJani Nikula1-9/+9
Like the comment says, /* Grouping using anonymous structs. Keep sorted. */ Stick to it. Signed-off-by: Jani Nikula <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-16drm/i915/dsb: DSB code refactoringAnimesh Manna4-62/+148
Refactor DSB implementation to be compatible with Xe driver. v1: RFC version. v2: Make intel_dsb structure opaque from external usage. [Jani] v3: Rebased on latest. v4: - Add boundary check in dsb_buffer_memset(). [Luca] - Use size_t instead of u32. [Luca] v5: WARN_ON() added for out of boudary case with some optimization. [Luca] v6: Rebased on latest and fix a rebase-miss. Cc: Jani Nikula <[email protected]> Reviewed-by: Luca Coelho <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-15drm/i915: Fix fractional bpp handling in intel_link_bw_reduce_bpp()Imre Deak1-7/+7
Convert crtc_state->pipe_bpp to U6.4 format as expected by the rest of the function. Fixes: 59a266f068b4 ("drm/i915/display: Store compressed bpp in U6.4 format") Cc: Ankit Nautiyal <[email protected]> Cc: Suraj Kandpal <[email protected]> Cc: Sui Jingfeng <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-15drm/i915/panelreplay: Debugfs support for panel replayAnimesh Manna1-24/+63
Add debugfs support which will print source and sink status per connector basis. Existing i915_psr_status and i915_psr_sink_status will be used to get the source and sink status of panel replay. v1: Initial version. [rb-ed by Arun] v2: Added check for DP 2.0 and connector type in connector_debugfs_add(). v3: Optimization and cosmetic changes. [Jouni] Cc: Jouni Högander <[email protected]> Cc: Arun R Murthy <[email protected]> Cc: Jani Nikula <[email protected]> Reviewed-by: Arun R Murthy <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Reviewed-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-15drm/i915/xe2lpd: implement WA for underruns while enabling FBCVinod Govindapillai1-1/+7
FIFO underruns are observed when FBC is enabled on plane 2 or plane 3. Recommended WA is to update the FBC enabling sequence. The plane binding register bits need to be updated separately before programming the FBC enable bit. Bspec: 74151 Reviewed-by: Mika Kahola <[email protected]> #v3 Signed-off-by: Vinod Govindapillai <[email protected]> Reviewed-by: Mika Kahola <[email protected]> Signed-off-by: Mika Kahola <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/dp: Tune down FEC detection timeout error messageImre Deak1-2/+2
At least a Realtek DP branch device with the OUI 00-e0-4c dev-ID Dp1.4 HW-rev 1.0 SW-rev 131.1 device identification doesn't report detecting the FEC decoding start symbol. Tune down the corresponding error to a debug message. Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/display: Use int for entry setup framesMika Kahola1-3/+3
At least one TGL had regression when using u8 types for entry setup frames calculation. So, let's switch to use ints instead. intel_psr_entry_setup_frames() function expects to return u8 but since in case of error the error code -ETIME is returned. This doesn't fit into u8 and hence the return value is not as expected. Fixes: 2b981d57e480 ("drm/i915/display: Support PSR entry VSC packet to be transmitted one frame earlier") Signed-off-by: Mika Kahola <[email protected]> Reviewed-by: Jouni Högander <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfsSwati Sharma1-0/+7
If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff compressed bpp is fractional. Continue if the computed compressed bpp turns out to be a integer. v2: -Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) -Fix comment (Suraj) Signed-off-by: Swati Sharma <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/dsc: Add debugfs entry to validate DSC fractional bppSwati Sharma2-0/+85
DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show to depict sink's precision. Also, new debugfs entry is created to enforce fractional bpp. If Force_DSC_Fractional_BPP_en is set then while iterating over output bpp with fractional step size we will continue if output_bpp is computed as integer. With this approach, we will be able to validate DSC with fractional bpp. v2: Add drm_modeset_unlock to new line(Suraj) Signed-off-by: Swati Sharma <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/dp: Iterate over output bpp with fractional step sizeAnkit Nautiyal1-16/+25
This patch adds support to iterate over compressed output bpp as per the fractional step, supported by DP sink. v2: -Avoid ending up with compressed bpp, same as pipe bpp. (Stan) Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/dsc/mtl: Add support for fractional bppVandita Kulkarni2-8/+20
Consider the fractional bpp while reading the qp values. v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) Signed-off-by: Vandita Kulkarni <[email protected]> Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/audio: Consider fractional vdsc bpp while computing tu_dataAnkit Nautiyal1-8/+8
MTL+ supports fractional compressed bits_per_pixel, with precision of 1/16. This compressed bpp is stored in U6.4 format. Accommodate the precision during calculation of transfer unit data for hblank_early calculation. v2: -Fix tu_data calculation while dealing with U6.4 format. (Stan) v3: -Use BPP_X16_FMT to print vdsc bpp. Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/display: Consider fractional vdsc bpp while computing m_n valuesAnkit Nautiyal4-18/+19
MTL+ supports fractional compressed bits_per_pixel, with precision of 1/16. This compressed bpp is stored in U6.4 format. Accommodate this precision while computing m_n values. v1: Replace the computation of 'data_clock' with 'data_clock = DIV_ROUND_UP(data_clock, 16).' (Sui Jingfeng). v2: Rebase and pass bits_per_pixel in U6.4 format. Signed-off-by: Ankit Nautiyal <[email protected]> Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/i915/display: Store compressed bpp in U6.4 formatAnkit Nautiyal10-28/+33
DSC parameter bits_per_pixel is stored in U6.4 format. The 4 bits represent the fractional part of the bpp. Currently we use compressed_bpp member of dsc structure to store only the integral part of the bits_per_pixel. To store the full bits_per_pixel along with the fractional part, compressed_bpp is changed to store bpp in U6.4 formats. Intergral part is retrieved by simply right shifting the member compressed_bpp by 4. v2: -Use to_bpp_int, to_bpp_frac_dec, to_bpp_x16 helpers while dealing with compressed bpp. (Suraj) -Fix comment styling. (Suraj) v3: -Add separate file for 6.4 fixed point helper(Jani, Nikula) -Add comment for magic values(Suraj) v4: -Fix checkpatch warnings caused by renaming(Suraj) v5: -Rebase. -Use existing helpers for conversion of bpp_int to bpp_x16 and vice versa. Signed-off-by: Ankit Nautiyal <[email protected]> Signed-off-by: Mitul Golani <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-14drm/display/dp: Add helper function to get DSC bpp precisionAnkit Nautiyal2-0/+28
Add helper to get the DSC bits_per_pixel precision for the DP sink. Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Reviewed-by: Sui Jingfeng <[email protected]> Acked-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2023-11-13drm/i915/mtl: C20 state verificationMika Kahola3-36/+88
Add state verification for C20 as we have one for C10. V2: Use abstractation of HW readout (Gustavo) Drop MPLLA/B from message for TX and CMN parameters (Gustavo) Reviewed-by: Gustavo Sousa <[email protected]> (v1,v2) Signed-off-by: Mika Kahola <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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