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2024-07-02drm/amdgpu: add PSP IP v14.0.4 supportTim Huang2-0/+2
This patch is to add PSP 14.0.4 support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add firmware for VPE IP v6.1.3Tim Huang1-0/+1
This patch is to add firmware for VPE 6.1.3. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add VPE IP v6.1.3 discovery supportTim Huang1-0/+1
This patch is to add VPE 6.1.3 support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add VPE IP v6.1.3 supportTim Huang1-0/+1
This patch is to add VPE 6.1.3 support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: Add NBIO IP v7.11.3 supportTim Huang1-0/+1
Enable setting soc21 common clockgating for NBIO 7.11.3. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add NBIO IP v7.11.3 discovery supportTim Huang1-0/+1
This patch is to add NBIO 7.11.3 support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add firmware for SDMA IP v6.1.2Tim Huang1-0/+1
This patch is to add firmware for SDMA 6.1.2. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdkfd: add KFD support for SDMA IP v6.1.2Tim Huang1-0/+2
Enable KFD setting SDMA info for SDMA 6.1.2. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add SDMA IP v6.1.2 discovery supportTim Huang1-0/+1
This patch is to add SDMA 6.1.2 support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add firmware for GC IP v11.5.2Tim Huang3-0/+7
This patch is to add firmware for GC 11.5.2. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdkfd: add KFD support for GC IP v11.5.2Tim Huang2-0/+6
Enable KFD for GC 11.5.2. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add GC IP v11.5.2 to GC 11.5.0 familyTim Huang1-0/+6
This patch is to add GC 11.5.2 to GC 11.5.0 family. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add GC IP v11.5.2 soc21 supportTim Huang1-0/+26
Add CG and PG flags for GFX IP v11.5.2 and PG flags for VCN IP v4.0.5. Signed-off-by: Saleemkhan Jamadar <[email protected]> Signed-off-by: Li Ma <[email protected]> Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Veerabadhran Gopalakrishnan <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add tmz support for GC IP v11.5.2Tim Huang1-0/+1
Add tmz support for GC 11.5.2. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: add GFXHUB IP v11.5.2 supportTim Huang1-0/+2
This patch is to add GFXHUB 11.5.2 support. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: initialize GC IP v11.5.2Tim Huang1-1/+7
Initialize GC 11.5.2 and set gfx hw configuration. Signed-off-by: Tim Huang <[email protected]> Reviewed-by: Yifan Zhang <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amdgpu: fix out of bounds access in gfx10 during ip dumpSunil Khatri1-0/+2
During ip dump in gfx10 the index variable is reused but is not reinitialized to 0 and this causes the index calculation to be wrong and access out of bound access. Acked-by: Christian König <[email protected]> Signed-off-by: Sunil Khatri <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amd/display: Fix warning comparing pointer to 0Jiapeng Chong1-1/+1
Avoid pointer type value compared with 0 to make code clear. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/dml2_core_factory.c:14:12-13: WARNING comparing pointer to 0. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amd/display: Fix warning comparing pointer to 0Jiapeng Chong1-1/+1
Avoid pointer type value compared with 0 to make code clear. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/dml2_dpmm_factory.c:24:12-13: WARNING comparing pointer to 0. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amd/display: Fix warning comparing pointer to 0Jiapeng Chong1-1/+1
Avoid pointer type value compared with 0 to make code clear. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_mcg/dml2_mcg_factory.c:19:12-13: WARNING comparing pointer to 0. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amd/display: Fix warning comparing pointer to 0Jiapeng Chong1-1/+1
Avoid pointer type value compared with 0 to make code clear. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/dml2_pmo_factory.c:31:12-13: WARNING comparing pointer to 0. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9458 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/amd/display: Fix unsigned comparison with less than zeroJiapeng Chong1-9/+6
The return value from the call to dml21_find_dc_pipes_for_plane() is int. However, the return value is being assigned to an unsigned int variable 'num_pipes', the condition if(num_pipes <= 0) is not rigorous enough, so making 'num_pipes' an int. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:318:6-15: WARNING: Unsigned expression compared with zero: num_pipes <= 0. ./drivers/gpu/drm/amd/display/dc/dml2/dml21/dml21_wrapper.c:360:6-15: WARNING: Unsigned expression compared with zero: num_pipes <= 0. Reported-by: Abaci Robot <[email protected]> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=9454 Signed-off-by: Jiapeng Chong <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-02drm/xe/bmg: Apply Wa_22019338487Vinay Belgaumkar4-8/+18
Extend this WA to BMG GT as well. In this case media GT is not affected. The cap frequencies and max allowed ggtt writes are different as well. On BMG, we need to do a flush after 1100 GGTT writes, and we need to limit the GT frequency request to 2133 Mhz during driver load and leave it at that value after driver unloads. v3: Fix checkpatch issue Reviewed-by: Rodrigo Vivi <[email protected]> Signed-off-by: Vinay Belgaumkar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
2024-07-02drm/xe/guc: Prevent use of uninitialized mutexVinay Belgaumkar1-0/+4
When skip_guc_pc is set and/or this is for a VF. Fixes: 3b1592fb7835 ("drm/xe/lnl: Apply Wa_22019338487") Signed-off-by: Vinay Belgaumkar <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
2024-07-02drm/msm/gem: Add missing rcu_dereference()Rob Clark1-1/+1
Fixes a sparse "different address spaces" error. Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Rob Clark <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/601612/
2024-07-02drm/msm/a6xx: Add missing __always_unusedRob Clark1-1/+1
The __build_asserts() function only exists to have a place to put build-time asserts. Reported-by: kernel test robot <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/ Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/601606/
2024-07-01drm/msm/adreno: Add support for Adreno 505 GPUDaniil Titov3-12/+35
This GPU is found on SoCs such as MSM8937 (450 MHz), MSM8940 (475 MHz), SDM439 (650 MHz). Signed-off-by: Daniil Titov <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Barnabás Czémán <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/601411/ Signed-off-by: Rob Clark <[email protected]>
2024-07-01drm/msm/dpu: check ubwc support before adding compressed formatsAbhinav Kumar1-1/+6
On QCM2290 chipset DPU does not support UBWC. Add a dpu cap to indicate this and do not expose compressed formats in this case. changes since RFC: - use ubwc enc and dec version of mdss_data instead of catalog to decide if ubwc is supported Signed-off-by: Abhinav Kumar <[email protected]> Reviewed-by: Dmitry Baryshkov <[email protected]> Patchwork: https://patchwork.freedesktop.org/patch/601392/ Signed-off-by: Rob Clark <[email protected]>
2024-07-01drm/amdgpu: rewrite convert_tiling_flags_to_modifier_gfx12Marek Olšák1-27/+18
There were multiple bugs, like checking SWIZZLE_MODE before checking GFX12_SWIZZLE_MODE, which has undefined behavior. The function had no effect before (it always returned -EINVAL). Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/radeon: check bo_va->bo is non-NULL before using itPierre-Eric Pelloux-Prayer1-1/+1
The call to radeon_vm_clear_freed might clear bo_va->bo, so we have to check it before dereferencing it. Signed-off-by: Pierre-Eric Pelloux-Prayer <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdkfd: Use device based logging for errorsLijo Lazar5-45/+74
Convert some pr_* to some dev_* APIs to identify the device. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: Fix hbm stack id in boot error reportHawking Zhang1-1/+1
To align with firmware, hbm id field 0x1 refers to hbm stack 0, 0x2 refers to hbm statck 1. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: add amdgpu_framebuffer::gfx12_dccMarek Olšák2-7/+9
amdgpu_framebuffer doesn't have tiling_flags, so we need this. amdgpu_display_get_fb_info never gets NULL parameters, so checking for NULL was useless. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/display: add all gfx12 modifiersMarek Olšák1-5/+6
Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/display: set plane attributes for gfx12 correctlyMarek Olšák1-1/+49
It used gfx9 flags, which has undefined behavior on gfx12. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/display: handle gfx12 in amdgpu_dm_plane_format_mod_supportedMarek Olšák1-22/+25
All this code has undefined behavior on GFX12 and shouldn't be executed. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: handle gfx12 in amdgpu_display_verify_sizesMarek Olšák2-1/+28
It verified GFX9-11 swizzle modes on GFX12, which has undefined behavior. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: Correct register used to clear fault statusHawking Zhang1-1/+1
Driver should write to fault_cntl registers to do one-shot address/status clear. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: don't use amdgpu_lookup_format_info on gfx12Marek Olšák1-0/+4
It only uses fields for GFX9-11 related to the separate DCC buffer, which doesn't exist in GFX12. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/display: handle gfx12 in dm_check_cursor_fbMarek Olšák1-3/+5
Checking SWIZZLE_MODE has undefined behavior on gfx12. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: remove AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_* definitionsMarek Olšák1-3/+0
They were added accidentally. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Reviewed-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/gfx12: remove GDS leftoversMarek Olšák1-16/+0
GDS doesn't exist in gfx12. The incomplete packet allows userspace to hang the hw from the kernel. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/gfx12: remove superfluous cache flagsMarek Olšák1-6/+0
If any INV flags are needed, they should be executed via ACQUIRE_MEM before INDIRECT_BUFFER. GLM flags are also removed because the hw ignores them. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu/gfx11: remove superfluous cache flagsMarek Olšák1-5/+1
If any INV flags are needed, they should be executed via ACQUIRE_MEM before INDIRECT_BUFFER. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Christian König <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amdgpu: check for LINEAR_ALIGNED correctly in check_tiling_flags_gfx6Marek Olšák1-2/+1
Fix incorrect check. Signed-off-by: Marek Olšák <[email protected]> Acked-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amd/display: 3.2.291Aric Cyr1-1/+1
* FW Release 0.0.224.0 * Fix bw issue for dcn351 * Fix FAMS2 logic issue for dcn401 * Fix Coverity issues * Fix cursor issues * Refactor dio sources Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Aric Cyr <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amd/display: Fix array-index-out-of-bounds in dml2/FCLKChangeSupportRoman Li1-1/+1
[Why] Potential out of bounds access in dml2_calculate_rq_and_dlg_params() because the value of out_lowest_state_idx used as an index for FCLKChangeSupport array can be greater than 1. [How] Currently dml2 core specifies identical values for all FCLKChangeSupport elements. Always use index 0 in the condition to avoid out of bounds access. Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Roman Li <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amd/display: Update efficiency bandwidth for dcn351Fangzhi Zuo1-0/+1
Fix 4k240 underflow on dcn351 Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amd/display: Fix refresh rate range for some panelTom Chung1-0/+48
[Why] Some of the panels does not have the refresh rate range info in base EDID and only have the refresh rate range info in DisplayID block. It will cause the max/min freesync refresh rate set to 0. [How] Try to parse the refresh rate range info from DisplayID if the max/min refresh rate is 0. Reviewed-by: Sun peng Li <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Tom Chung <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
2024-07-01drm/amd/display: replace CRTC disable function callXi (Alex) Liu1-2/+2
[Why] In OTG disable workarund, CRTC is disabled immediately to improve performance, but this may cause timing issue in DP HPO encoder FIFO and result in blank CRCs. [How] Replace the immediate CRTC disable call with normal disable call Reviewed-by: Nicholas Kazlauskas <[email protected]> Signed-off-by: Jerry Zuo <[email protected]> Signed-off-by: Xi (Alex) Liu <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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