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authorMarek Olšák <marek.olsak@amd.com>2024-06-01 14:56:16 -0400
committerAlex Deucher <alexander.deucher@amd.com>2024-07-01 16:10:46 -0400
commit8d9ffd15ff5c9da7bc6171f2536aaaff40bcab6e (patch)
treeb3ab424c9648d785530d62317d32e6999d97cdc4
parent30fb9cad6fbbd9d23d2d0ff7be8c59ce39b882bc (diff)
drm/amdgpu: remove AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_* definitions
They were added accidentally. Signed-off-by: Marek Olšák <marek.olsak@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--include/uapi/drm/drm_fourcc.h3
1 files changed, 0 insertions, 3 deletions
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index d0063ac6e09f..4168445fbb8b 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -1540,9 +1540,6 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier)
#define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_SHIFT 18
#define AMD_FMT_MOD_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3
-#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_SHIFT 3
-#define AMD_FMT_MOD_GFX12_DCC_MAX_COMPRESSED_BLOCK_MASK 0x3 /* 0:64B, 1:128B, 2:256B */
-
/*
* DCC supports embedding some clear colors directly in the DCC surface.
* However, on older GPUs the rendering HW ignores the embedded clear color