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Add support for the PDC to enable deep sleep wakeup from external sources.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Similar to A5, E5 uses a Melfas MMS345L touchscreen that is connected to
blsp_i2c5. Add it to the device tree.
Signed-off-by: Lin, Meng-Bo <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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When initially submitted, the sc7180 support only targeted CROS devices
that make use of alternative TF-A firmware and not the official Qualcomm
firmware. The PSCI implementations in those firmwares differ however so
devices that use qcom firmware, like WoA laptops such as aspire1 need
different setup.
This commit adjusts the SoC dtsi to the OSI mode PSCI setup, common to
the Qualcomm firmware and introduces new sc7180-firmware-tfa.dtsi that
overrides the PSCI setup for the PC mode and uses TF-A specific
psci-suspend-param. This dtsi is added to all boards that appear to use
TF-A.
Signed-off-by: Nikita Travkin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Disappointigly, the camera activity LED is implemented in software.
Hook it up as a gpio-led and (until we have camera *and* a "camera on"
LED trigger) configure it as a panic indicator.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Pins 83-86 and 158-160 are NC, so there's no point in keeping them
reserved. Take care of that.
Fixes: 32c231385ed4 ("arm64: dts: qcom: sc8280xp: add Lenovo Thinkpad X13s devicetree")
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add the required nodes to support the display hardware on msm8998.
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
[konrad: update the commit msg and AGdR's email, rebase]
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Fix IRQ flags mismatch which was keeping dsi1 from probing by changing
interrupts = <4> to interrupts = <5>.
Fixes: 2752bb7d9b58 ("arm64: dts: qcom: msm8996: add second DSI interface")
Signed-off-by: David Wronek <[email protected]>
Acked-by: Yassine Oudjana <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add all the regulators along with labels found on SDX75 IDP.
Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add rpmhpd node and opps for this node to the SDX75 dts.
Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[bjorn: include qcom-rpmpd.h as well]
Signed-off-by: Bjorn Andersson <[email protected]>
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SDX75-idp features pmk8550, pmx75 and pm7550ba pmic, so include them.
Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add dtsi for pmx75 PMIC found in Qualcomm platforms.
Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add dtsi for pm7550ba PMIC found in Qualcomm platforms.
Signed-off-by: Rohit Agarwal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add pinctrl gpio dts node for pm7250b.
Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add SPMI node to SDX75 dtsi.
Signed-off-by: Rohit Agarwal <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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The MMSS SMMU has its own power domain. Attach it so that we can drop
the "keep it always-on" hack.
Fixes: 05ce21b54423 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu")
Reviewed-by: Jeffrey Hugo <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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The MMSS SMMU has been abusingly consuming the exposed RPM interconnect
clock. Drop it.
Fixes: 05ce21b54423 ("arm64: dts: qcom: msm8998: Configure the multimedia subsystem iommu")
Reviewed-by: Jeffrey Hugo <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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SM8450 also exposes RPMh stats, hook them up for low power state
monitoring.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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MMCC has its own GPLL0 legs - one for 1-1 and one for div-2 output.
We've already been using the correct one in the non-div case, start
doing so for the other one as well.
Reviewed-by: Jeffrey Hugo <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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GPUCC has its own GPLL0 leg, switch to it to allow shutting it down
when it's unused.
Reviewed-by: Jeffrey Hugo <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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arm64-for-6.6
Merge additional MSM8998 GCC DeviceTree binding constants for use in the
MSM8998 DeviceTree source.
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GPLL0 has two separate outputs to both GPUSS and MMSS: one that's
2-divided and one that runs at the same rate as the GPLL0 itself.
Add the missing ones to the binding.
Acked-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Jeffrey Hugo <[email protected]>
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add support for wlan-2g LED on GPIO 36 and wps buttons on GPIO 35.
Signed-off-by: Sridharan S N <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add the Qualcomm Pseudo-Random Number Generator.
Signed-off-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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When we have no camera mezzanine attached it is still possible to run the
test-pattern generator of the CSID block.
As an example:
media-ctl --reset
yavta --no-query -w '0x009f0903 1' /dev/v4l-subdev2
yavta --list /dev/v4l-subdev2
media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:UYVY8_1X16/1920x1080 field:none]'
media-ctl -l '"msm_csid0":1->"msm_ispif0":0[1]'
media-ctl -d /dev/media0 -V '"msm_ispif0":0[fmt:UYVY8_1X16/1920x1080 field:none]'
media-ctl -l '"msm_ispif0":1->"msm_vfe0_rdi0":0[1]'
media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:UYVY8_1X16/1920x1080]'
media-ctl -d /dev/media0 -p
yavta -B capture-mplane --capture=5 -n 5 -I -f UYVY -s 1920x1080 --file=TPG-UYVU-1920x1080-000-#.bin /dev/video0
Signed-off-by: Bryan O'Donoghue <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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standalone dts
At the moment we define a single ov5640 sensor in the apq8016-sbc and
disable that sensor.
The sensor mezzanine for this is a D3 Engineering Dual ov5640 mezzanine
card. Move the definition from the apq8016-sbc where it shouldn't be to a
standalone dts.
Enables the sensor by default, as we are adding a standalone mezzanine
structure.
Signed-off-by: Bryan O'Donoghue <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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There are two control lines controlled by GPIO going into ov5640
- Reset
- Powerdown
The driver and yaml expect "reset-gpios" and "powerdown-gpios" there has
never been an "enable-gpios".
Fixes: 39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes")
Signed-off-by: Bryan O'Donoghue <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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The driver for the ov5640 doesn't do a set-rate, instead it expects the
clock to already be set at an appropriate rate.
Similarly the yaml for ov5640 doesn't understand clock-frequency. Convert
from clock-rate to assigned-clock and assigned-clock-rate to remediate.
Signed-off-by: Bryan O'Donoghue <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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The yaml constraint for data-lanes is [1, 2] not [0, 2]. The driver itself
doesn't do anything with the data-lanes declaration save count the number
of specified data-lanes and calculate the link rate so, this change doesn't
have any functional side-effects.
Signed-off-by: Bryan O'Donoghue <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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The ov5640 driver expects DOVDD, AVDD and DVDD as regulator supply names.
The ov5640 has depended on these names since the driver was committed
upstream in 2017. Similarly apq8016-sbc.dtsi has had completely different
regulator names since its own initial commit in 2020.
Perhaps the regulators were left on in previous 410c bootloaders. In any
case today on 6.5 we won't switch on the ov5640 without correctly naming
the regulators.
Fixes: 39e0ce6cd1bf ("arm64: dts: qcom: apq8016-sbc: Add CCI/Sensor nodes")
Signed-off-by: Bryan O'Donoghue <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Each CSIPHY in CAMMS maps to a port here in the dtsi, since the number of
CSIPHYs is fixed per SoC define the 8916 ports for both available PHYs.
Signed-off-by: Bryan O'Donoghue <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add initial device tree support for the Qualcomm IPQ5018 SoC and
rdp432-c2 board.
Few things like 'reboot' does not work because, couple of more 'SCM'
APIS are needed to clear some TrustZone settings. Those will be
posted separately.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Co-developed-by: Varadarajan Narayanan <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Co-developed-by: Gokul Sriram Palanisamy <[email protected]>
Signed-off-by: Gokul Sriram Palanisamy <[email protected]>
Signed-off-by: Sricharan Ramabadhran <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Document the new ipq5018 SOC/board device tree bindings.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Sricharan Ramabadhran <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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into arm64-for-6.6
Merge the IPQ5018 GCC Devicetree binding through a topic branch, in
order to the the clock defines.
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This patch adds support for the global clock controller found on
the IPQ5018 based devices.
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Co-developed-by: Varadarajan Narayanan <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Signed-off-by: Sricharan Ramabadhran <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Enable the second MAC on sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Once we add a second ethernet node, the MDIO bus names will conflict
unless we provide aliases. Add one for the existing ethernet node.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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For improved readability order the aliases alphabetically for
sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Suggested-by: Konrad Dybcio <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add a second SGMII PHY that will be used by EMAC1 on sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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We'll be adding a second SGMII PHY on the same MDIO bus, so let's index
the first one for better readability.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Andrew Halaney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Device-tree bindings for MDIO define per-PHY reset-gpios as well as a
global reset-gpios property at the MDIO node level which controls all
devices on the bus. The latter is most likely a workaround for the
chicken-and-egg problem where we cannot read the ID of the PHY before
bringing it out of reset but we cannot bring it out of reset until we've
read its ID.
I have proposed a comprehensive solution for this problem in 2020 but it
never got upstream. We do however have workaround in place which allows
us to hard-code the PHY id in the compatible property, thus skipping the
ID scanning.
Let's make the device-tree for sa8775p-ride slightly more correct by
moving the reset-gpios property to the PHY node with its ID put into the
PHY node's compatible.
Link: https://lore.kernel.org/all/[email protected]/
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Enable the second SerDes PHY on sa8775p-ride development board.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Andrew Halaney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add a node for the second MAC on sa8775p platforms.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Andrew Halaney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add a node for the SerDes PHY used by EMAC1 on sa8775p-ride.
Signed-off-by: Bartosz Golaszewski <[email protected]>
Reviewed-by: Andrew Halaney <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Tested-by: Andrew Halaney <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Enable CAMSS on the standard RB3 as it is possible to run the test pattern
generator (TPG) without any populated ports/endpoints.
media-ctl --reset
yavta --no-query -w '0x009f0903 9' /dev/v4l-subdev4
yavta --list /dev/v4l-subdev4
media-ctl -d /dev/media0 -V '"msm_csid0":0[fmt:SGRBG10_1X10/3280x2464]'
media-ctl -d /dev/media0 -V '"msm_vfe0_rdi0":0[fmt:SGRBG10_1X10/3280x2464]'
media-ctl -l '"msm_csid0":1->"msm_vfe0_rdi0":0[1]'
media-ctl -d /dev/media0 -p
yavta -B capture-mplane --capture=5 -n 5 -I -f SGRBG10P -s 3280x2464 --file=TPG-SGRBG10-3280x2464-000-#.bin /dev/video2
Signed-off-by: Bryan O'Donoghue <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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SA8540P-ride is one of the Qualcomm platforms that does not have access
to UEFI runtime services and on which the RTC registers are read-only,
as described in:
https://lore.kernel.org/all/[email protected]/
Reserve four bytes in one of the PMIC registers to hold the RTC offset
the same way as it was done for sc8280xp-crd which has similar
limitations:
commit e67b45582c5e ("arm64: dts: qcom: sc8280xp-crd: enable rtc")
On SA8540P-ride, the register bank SDAM6 of the first PMIC is not
writable. Following recommendations provided during the review, use
SDAM2 from the second PMIC at offset 0xa0 instead.
Reviewed-by: Caleb Connolly <[email protected]>
Signed-off-by: Eric Chanudet <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add the coefficients for the CPU frequencies to aid in frequency
scaling.
Profiling setup:
- freqbench (https://github.com/kdrag0n/freqbench)
- LineageOS kernel, android_kernel_google_msm-4.9
- recommended configuration options by freqbench
- disabled options that require clang or 32-bit compilers
- mmc governor switched from simple_ondemand to powersave
Frequency domains: cpu1 cpu6
Offline CPUs: cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7
Sampling power every 1000 ms
Baseline power usage: 445 mW
===== CPU 1 =====
Frequencies: 300 576 748 998 1209 1324 1516 1612 1708
300: 1114 3.7 C/MHz 43 mW 11.6 J 25.8 I/mJ 269.4 s
576: 2138 3.7 C/MHz 51 mW 7.1 J 42.2 I/mJ 140.3 s
748: 2780 3.7 C/MHz 67 mW 7.3 J 41.3 I/mJ 107.9 s
998: 3706 3.7 C/MHz 73 mW 5.9 J 51.1 I/mJ 80.9 s
1209: 4490 3.7 C/MHz 86 mW 5.7 J 52.2 I/mJ 66.8 s
1324: 4918 3.7 C/MHz 90 mW 5.5 J 54.6 I/mJ 61.0 s
1516: 5631 3.7 C/MHz 103 mW 5.5 J 54.9 I/mJ 53.3 s
1612: 5987 3.7 C/MHz 109 mW 5.5 J 55.0 I/mJ 50.1 s
1708: 6344 3.7 C/MHz 126 mW 5.9 J 50.5 I/mJ 47.3 s
===== CPU 6 =====
Frequencies: 300 652 825 979 1132 1363 1536 1747 1843 1996
300: 1868 6.2 C/MHz 53 mW 8.5 J 35.2 I/mJ 160.6 s
652: 4073 6.2 C/MHz 96 mW 7.1 J 42.4 I/mJ 73.7 s
825: 5132 6.2 C/MHz 117 mW 6.9 J 43.7 I/mJ 58.5 s
979: 6099 6.2 C/MHz 151 mW 7.4 J 40.4 I/mJ 49.2 s
1132: 7071 6.2 C/MHz 207 mW 8.8 J 34.1 I/mJ 42.4 s
1363: 8482 6.2 C/MHz 235 mW 8.3 J 36.1 I/mJ 35.4 s
1536: 9578 6.2 C/MHz 287 mW 9.0 J 33.3 I/mJ 31.3 s
1747: 10892 6.2 C/MHz 340 mW 9.4 J 32.0 I/mJ 27.6 s
1843: 11471 6.2 C/MHz 368 mW 9.6 J 31.1 I/mJ 26.2 s
1996: 12425 6.2 C/MHz 438 mW 10.6 J 28.3 I/mJ 24.2 s
Signed-off-by: Richard Acayan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add CPU frequency scaling, and also add the corresponding memory and
cache bandwidths for each frequency.
Signed-off-by: Richard Acayan <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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Add the interconnect node for L3 cache on SDM670.
Signed-off-by: Richard Acayan <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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As discussed in [1] it is more convenient to use a generic `channel`
node name for ADC channels while storing a friendly - board-specific
instead of PMIC-specific - name in the label, if/when desired to
overwrite the channel description already contained (but previously
unused) in the driver [2]. Follow up on the dt-bindings' `channel` node
name requirement, and instead provide this (sometimes per-board) channel
description through a label property.
Also remove all the unused label references (not to be confused with
label properties) from pm660, pmp8074 and pms405.
[1]: https://lore.kernel.org/linux-arm-msm/[email protected]/T/#u
[2]: https://lore.kernel.org/linux-arm-msm/[email protected]/
Acked-by: Konrad Dybcio <[email protected]>
Signed-off-by: Marijn Suijten <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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MAX98927 speaker amplifier "interleave_mode" property was never
documented. Corrected bindings expect "maxim,interleave-mode" instead,
which is already supported by Linux driver. Change is not compatible
with older Linux kernels.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
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