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2016-06-03arm64: dts: mt8173: Add display subsystem related nodesCK Hu1-0/+223
This patch adds the device nodes for the DISP function blocks comprising the display subsystem. Signed-off-by: CK Hu <[email protected]> Signed-off-by: Cawa Cheng <[email protected]> Signed-off-by: Jie Qiu <[email protected]> Signed-off-by: Daniel Kurtz <[email protected]> Signed-off-by: Philipp Zabel <[email protected]> Signed-off-by: Matthias Brugger <[email protected]>
2016-06-01ARM64: dts: amlogic: Enable Reset Controller on GXBB-based platformsNeil Armstrong1-0/+7
Update DTSI file to add the reset controller node. Signed-off-by: Neil Armstrong <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: gxbb: add ethernetKevin Hilman3-0/+45
Add node for ethernet interface and pinctrl pins. Enable on odroid-C2 and P20x boards. Acked-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: gxbb: pinctrl: add/update UARTKevin Hilman2-1/+42
Add DT nodes for additional UARTs (UART B & C in EE domain) and add pins for all EE domain UARTs. Acked-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: add pins for EMMC, SDKevin Hilman1-0/+21
Acked-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: Enable pin controller on GXBB-based platformsCarlo Caione4-0/+59
Update DTS and DTSI files to enable the pin controller. We also now support the blinking blue LED on the Odroid-C2. Signed-off-by: Carlo Caione <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01documentation: Add compatibles for Amlogic Meson GXBB pin controllersCarlo Caione1-0/+2
Add the two new compatibles for the Amlogic Meson GXBB pin controllers. Signed-off-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-06-01ARM64: dts: amlogic: Add hiu and periphs busesCarlo Caione1-0/+16
Add two new buses in the DTS: hiu and periphs buses. In the Amlogic S905/GXBB SoC several devices (clock / eth / pin controllers, etc...) are mapped under these two buses. Add them in the DT before starting to add new devices. Signed-off-by: Carlo Caione <[email protected]> Signed-off-by: Kevin Hilman <[email protected]>
2016-05-31arm64: dts: NS2: Add CCI-400 PMU supportJon Mason1-0/+20
Add support to the Northstar 2 Device tree file for the ARM CCI-400 PMU. Signed-off-by: Jon Mason <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: NS2: Add all of the UARTsJon Mason2-0/+46
Add all of the UARTs present on NS2 and enable them in the SVK device tree file. Also, do some magic to make sure that uart3 is discovered as ttyS0 (as that is the console UART). Signed-off-by: Jon Mason <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: Enable GPIO for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy1-0/+19
This enables the GPIO support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: enable pinctrl for Broadcom NS2 SoCYendapally Reddy Dhananjaya Reddy2-0/+16
This enables the pinctrl support for Broadcom NS2 SoC Signed-off-by: Yendapally Reddy Dhananjaya Reddy <[email protected]> Reviewed-by: Ray Jui <[email protected]> Acked-by: Linus Walleij <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2Anup Patel2-0/+55
We have one dual-port SATA3 AHCI controller present in NS2 SoC. This patch enables SATA3 AHCI controller and SATA3 PHY for NS2 SoC in NS2 DT. Signed-off-by: Anup Patel <[email protected]> Reviewed-by: Ray Jui <[email protected]> Reviewed-by: Scott Branden <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31dt-bindings: ata: add compatible string for iProc AHCI controllerAnup Patel1-0/+1
The Broadcom iProc SoCs have AHCI compliant SATA controller. This patch adds common compatible string for AHCI SATA controller on iProc SoCs. Signed-off-by: Anup Patel <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Florian Fainelli <[email protected]>
2016-05-31ARM: bcm2835: dt: Add the ethernet to the device treesLubomir Rintel7-0/+44
The hub and the ethernet in its port 1 are hardwired on the board. Compared to the adapters that can be plugged into the USB ports, this one has no serial EEPROM to store its MAC. Nevertheless, the Raspberry Pi has the MAC address for this adapter in its ROM, accessible from its firmware. U-Boot can read out the address and set the local-mac-address property of the node with "ethernet" alias. Let's add the node so that U-Boot can do its business. Model B rev2 and Model B+ entries were verified by me, the hierarchy and pid/vid pair for the Version 2 was provided by Peter Chen. Original Model B is a blind shot, though very likely correct. Signed-off-by: Lubomir Rintel <[email protected]> Acked-by: Stephen Warren <[email protected]> Signed-off-by: Eric Anholt <[email protected]>
2016-05-30arm64: dts: rockchip: add rk3399 io-domain core nodesHeiko Stuebner1-0/+10
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: add rk3368-r88 iodomainsHeiko Stuebner1-0/+16
Add the supply-links according to the R88 schematics. Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: add rk3368 io-domain core nodesHeiko Stuebner1-0/+10
Add the core io-domain nodes to grf and pmugrf which individual boards than just have to enable and add the necessary supplies to. Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: make rk3368 grf syscons simple-mfdsHeiko Stuebner1-2/+2
The general register files do contain a lot of separate functions and while some really are only registers with a lot of different 1-bit settings, there are also a lot of them containing some bigger function blocks. To be able to define these as sub-devices, make them simple-mfds. Signed-off-by: Heiko Stuebner <[email protected]> Tested-by: David Wu <[email protected]>
2016-05-30arm64: dts: rockchip: enable eMMC for rk3399 EVBBrian Norris1-0/+12
Rockchip's rk3399 evaluation board has eMMC. Let's enable the newly-added nodes. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: add sdhci/emmc for rk3399Brian Norris1-0/+20
Add description for the SDHCI v5.1 eMMC controller on rk3399. Fix it to 200 MHz, to support all supported timing modes. Note that 'rockchip,rk3399-sdhci-5.1' is not documented; we presumably have a compliant Arasan controller, but let's have a rockchip property as the canonical backup/precautionary measure. Per Heiko's previous suggestion, let's not clutter the arasan doc with it. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Shawn Lin <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: make rk3399's grf a "simple-mfd"Brian Norris1-2/+6
Per the examples in Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt, we need the grf node to be a simple-mfd in order to properly enumerate child devices like our eMMC PHY. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> [directly mimic for the pmugrf, which will need the same change later and there is no need to pollute commit history with another patch] Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: rockchip: assign default rates for core rk3399 clocksXing Zheng1-0/+16
These clocks are all core clocks used by many blocks/peripherals, many of whose drivers don't set their clock rates at all. Let's assign reasonable default clock rates for these core clocks, so that these peripherals get something reasonable by default, and also so that if child devices want to select a clock rate themselves, their muxes have some reasonable parent clock rates to branch off of (rather than just the boot-time defaults). This helps the eMMC PHY, for one, to get a reasonable ACLK rate. Signed-off-by: Xing Zheng <[email protected]> Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Douglas Anderson <[email protected]> Signed-off-by: Heiko Stuebner <[email protected]>
2016-05-30arm64: dts: r8a7795: Drop 0x from unit address of gicSimon Horman1-1/+1
Drop 0x from unit address of gic as this is the desired form for a unit address. Signed-off-by: Simon Horman <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]>
2016-05-30arm64: dts: salvator-x: Fix W=1 dtc warningsGeert Uytterhoeven1-4/+4
Warning (unit_address_vs_reg): Node /regulator@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /regulator@4 has a unit name, but no reg property Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Fix W=1 dtc warningsGeert Uytterhoeven1-34/+36
Warning (unit_address_vs_reg): Node /cache-controller@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /cache-controller@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,dvc/dvc@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,src/src@9 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@0 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@1 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@2 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@3 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@4 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@5 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@6 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@7 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@8 has a unit name, but no reg property Warning (unit_address_vs_reg): Node /soc/sound@ec500000/rcar_sound,ssi/ssi@9 has a unit name, but no reg property Move the cache-controller nodes under the cpus node, and make their unit names and reg properties match the MPIDR values. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Use SYSC "always-on" PM Domain for RWDT nodeGeert Uytterhoeven1-1/+1
Hook up the RWDT device node to the SYSC "always-on" PM Domain, for a more consistent device-power-area description in DT. Cfr. commit 38dbb45ee4bc ("arm64: dts: r8a7795: Use SYSC "always-on" PM Domain") Fixes: f43838a7ae014cba ("arm64: dts: r8a7795: Add RWDT node") Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: salvator-x: Enable watchdog timerWolfram Sang1-0/+5
This patch enables watchdog timer for Salvator-X board. Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Wolfram Sang <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Acked-by: Guenter Roeck <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Add RWDT nodeWolfram Sang1-0/+8
This patch adds the RWDT device node for r8a7795. Signed-off-by: Takeshi Kihara <[email protected]> Signed-off-by: Wolfram Sang <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Acked-by: Guenter Roeck <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: enable DMA for I2CNiklas Söderlund1-0/+14
Add DMA properties to the I2C nodes. Signed-off-by: Niklas Söderlund <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: r8a7795: Increase the size of GIC-400 mapped registersPooya Keshavarzi1-2/+2
There are some requirements about the GIC-400 memory layout and its mapping if using 64k aligned base addresses like on r8a7795. See e.g. http://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=21550029f709072aacf3b9 Map the whole memory range instead of only 0x2000. This will fix the issue that some hypervisors, e.g. Xen, fail to handle the interrupts correctly. Signed-off-by: Pooya Keshavarzi <[email protected]> Signed-off-by: Dirk Behme <[email protected]> Acked-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-30arm64: dts: salvator-x: SCIF1 supports RTS/CTS hardware flow controlGeert Uytterhoeven1-0/+1
On the Salvator-X development board, the RTS and CTS pins of debug serial-1 port SCIF1 are wired to the CP2102 Serial-USB bridge. Reflect this in the DTS by adding the "uart-has-rtscts" property to the scif1 device node. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Simon Horman <[email protected]>
2016-05-29Linux 4.7-rc1Linus Torvalds1-3/+3
2016-05-29hash_string: Fix zero-length case for !DCACHE_WORD_ACCESSGeorge Spelvin1-2/+2
The self-test was updated to cover zero-length strings; the function needs to be updated, too. Reported-by: Geert Uytterhoeven <[email protected]> Signed-off-by: George Spelvin <[email protected]> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <[email protected]>
2016-05-28Rename other copy of hash_string to hashlen_stringGeorge Spelvin1-2/+2
The original name was simply hash_string(), but that conflicted with a function with that name in drivers/base/power/trace.c, and I decided that calling it "hashlen_" was better anyway. But you have to do it in two places. [ This caused build errors for architectures that don't define CONFIG_DCACHE_WORD_ACCESS - Linus ] Signed-off-by: George Spelvin <[email protected]> Reported-by: Guenter Roeck <[email protected]> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <[email protected]>
2016-05-28hpfs: implement the show_options methodMikulas Patocka1-11/+32
The HPFS filesystem used generic_show_options to produce string that is displayed in /proc/mounts. However, there is a problem that the options may disappear after remount. If we mount the filesystem with option1 and then remount it with option2, /proc/mounts should show both option1 and option2, however it only shows option2 because the whole option string is replaced with replace_mount_options in hpfs_remount_fs. To fix this bug, implement the hpfs_show_options function that prints options that are currently selected. Signed-off-by: Mikulas Patocka <[email protected]> Cc: [email protected] Signed-off-by: Linus Torvalds <[email protected]>
2016-05-28affs: fix remount failure when there are no options changedMikulas Patocka1-2/+3
Commit c8f33d0bec99 ("affs: kstrdup() memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: c8f33d0bec99 ("affs: kstrdup() memory handling") Signed-off-by: Mikulas Patocka <[email protected]> Cc: [email protected] # v4.1+ Signed-off-by: Linus Torvalds <[email protected]>
2016-05-28hpfs: fix remount failure when there are no options changedMikulas Patocka1-2/+3
Commit ce657611baf9 ("hpfs: kstrdup() out of memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: ce657611baf9 ("hpfs: kstrdup() out of memory handling") Signed-off-by: Mikulas Patocka <[email protected]> Cc: [email protected] Signed-off-by: Linus Torvalds <[email protected]>
2016-05-28Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds67-258/+373
Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
2016-05-28fs: fix binfmt_aout.c build errorGuenter Roeck1-1/+0
Various builds (such as i386:allmodconfig) fail with fs/binfmt_aout.c:133:2: error: expected identifier or '(' before 'return' fs/binfmt_aout.c:134:1: error: expected identifier or '(' before '}' token [ Oops. My bad, I had stupidly thought that "allmodconfig" covered this on x86-64 too, but it obviously doesn't. Egg on my face. - Linus ] Fixes: 5d22fc25d4fc ("mm: remove more IS_ERR_VALUE abuses") Signed-off-by: Guenter Roeck <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2016-05-28Merge branch 'hash' of git://ftp.sciencehorizons.net/linuxLinus Torvalds17-150/+734
Pull string hash improvements from George Spelvin: "This series does several related things: - Makes the dcache hash (fs/namei.c) useful for general kernel use. (Thanks to Bruce for noticing the zero-length corner case) - Converts the string hashes in <linux/sunrpc/svcauth.h> to use the above. - Avoids 64-bit multiplies in hash_64() on 32-bit platforms. Two 32-bit multiplies will do well enough. - Rids the world of the bad hash multipliers in hash_32. This finishes the job started in commit 689de1d6ca95 ("Minimal fix-up of bad hashing behavior of hash_64()") The vast majority of Linux architectures have hardware support for 32x32-bit multiply and so derive no benefit from "simplified" multipliers. The few processors that do not (68000, h8/300 and some models of Microblaze) have arch-specific implementations added. Those patches are last in the series. - Overhauls the dcache hash mixing. The patch in commit 0fed3ac866ea ("namei: Improve hash mixing if CONFIG_DCACHE_WORD_ACCESS") was an off-the-cuff suggestion. Replaced with a much more careful design that's simultaneously faster and better. (My own invention, as there was noting suitable in the literature I could find. Comments welcome!) - Modify the hash_name() loop to skip the initial HASH_MIX(). This would let us salt the hash if we ever wanted to. - Sort out partial_name_hash(). The hash function is declared as using a long state, even though it's truncated to 32 bits at the end and the extra internal state contributes nothing to the result. And some callers do odd things: - fs/hfs/string.c only allocates 32 bits of state - fs/hfsplus/unicode.c uses it to hash 16-bit unicode symbols not bytes - Modify bytemask_from_count to handle inputs of 1..sizeof(long) rather than 0..sizeof(long)-1. This would simplify users other than full_name_hash" Special thanks to Bruce Fields for testing and finding bugs in v1. (I learned some humbling lessons about "obviously correct" code.) On the arch-specific front, the m68k assembly has been tested in a standalone test harness, I've been in contact with the Microblaze maintainers who mostly don't care, as the hardware multiplier is never omitted in real-world applications, and I haven't heard anything from the H8/300 world" * 'hash' of git://ftp.sciencehorizons.net/linux: h8300: Add <asm/hash.h> microblaze: Add <asm/hash.h> m68k: Add <asm/hash.h> <linux/hash.h>: Add support for architecture-specific functions fs/namei.c: Improve dcache hash function Eliminate bad hash multipliers from hash_32() and hash_64() Change hash_64() return value to 32 bits <linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string() fs/namei.c: Add hashlen_string() function Pull out string hash to <linux/stringhash.h>
2016-05-28h8300: Add <asm/hash.h>George Spelvin2-0/+54
This will improve the performance of hash_32() and hash_64(), but due to complete lack of multi-bit shift instructions on H8, performance will still be bad in surrounding code. Designing H8-specific hash algorithms to work around that is a separate project. (But if the maintainers would like to get in touch...) Signed-off-by: George Spelvin <[email protected]> Cc: Yoshinori Sato <[email protected]> Cc: [email protected]
2016-05-28microblaze: Add <asm/hash.h>George Spelvin2-0/+82
Microblaze is an FPGA soft core that can be configured various ways. If it is configured without a multiplier, the standard __hash_32() will require a call to __mulsi3, which is a slow software loop. Instead, use a shift-and-add sequence for the constant multiply. GCC knows how to do this, but it's not as clever as some. Signed-off-by: George Spelvin <[email protected]> Cc: Alistair Francis <[email protected]> Cc: Michal Simek <[email protected]>
2016-05-28m68k: Add <asm/hash.h>George Spelvin2-0/+60
This provides a multiply by constant GOLDEN_RATIO_32 = 0x61C88647 for the original mc68000, which lacks a 32x32-bit multiply instruction. Yes, the amount of optimization effort put in is excessive. :-) Shift-add chain found by Yevgen Voronenko's Hcub algorithm at http://spiral.ece.cmu.edu/mcm/gen.html Signed-off-by: George Spelvin <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Greg Ungerer <[email protected]> Cc: Andreas Schwab <[email protected]> Cc: Philippe De Muyter <[email protected]> Cc: [email protected]
2016-05-28<linux/hash.h>: Add support for architecture-specific functionsGeorge Spelvin6-4/+299
This is just the infrastructure; there are no users yet. This is modelled on CONFIG_ARCH_RANDOM; a CONFIG_ symbol declares the existence of <asm/hash.h>. That file may define its own versions of various functions, and define HAVE_* symbols (no CONFIG_ prefix!) to suppress the generic ones. Included is a self-test (in lib/test_hash.c) that verifies the basics. It is NOT in general required that the arch-specific functions compute the same thing as the generic, but if a HAVE_* symbol is defined with the value 1, then equality is tested. Signed-off-by: George Spelvin <[email protected]> Cc: Geert Uytterhoeven <[email protected]> Cc: Greg Ungerer <[email protected]> Cc: Andreas Schwab <[email protected]> Cc: Philippe De Muyter <[email protected]> Cc: [email protected] Cc: Alistair Francis <[email protected]> Cc: Michal Simek <[email protected]> Cc: Yoshinori Sato <[email protected]> Cc: [email protected]
2016-05-28fs/namei.c: Improve dcache hash functionGeorge Spelvin1-40/+81
Patch 0fed3ac866 improved the hash mixing, but the function is slower than necessary; there's a 7-instruction dependency chain (10 on x86) each loop iteration. Word-at-a-time access is a very tight loop (which is good, because link_path_walk() is one of the hottest code paths in the entire kernel), and the hash mixing function must not have a longer latency to avoid slowing it down. There do not appear to be any published fast hash functions that: 1) Operate on the input a word at a time, and 2) Don't need to know the length of the input beforehand, and 3) Have a single iterated mixing function, not needing conditional branches or unrolling to distinguish different loop iterations. One of the algorithms which comes closest is Yann Collet's xxHash, but that's two dependent multiplies per word, which is too much. The key insights in this design are: 1) Barring expensive ops like multiplies, to diffuse one input bit across 64 bits of hash state takes at least log2(64) = 6 sequentially dependent instructions. That is more cycles than we'd like. 2) An operation like "hash ^= hash << 13" requires a second temporary register anyway, and on a 2-operand machine like x86, it's three instructions. 3) A better use of a second register is to hold a two-word hash state. With careful design, no temporaries are needed at all, so it doesn't increase register pressure. And this gets rid of register copying on 2-operand machines, so the code is smaller and faster. 4) Using two words of state weakens the requirement for one-round mixing; we now have two rounds of mixing before cancellation is possible. 5) A two-word hash state also allows operations on both halves to be done in parallel, so on a superscalar processor we get more mixing in fewer cycles. I ended up using a mixing function inspired by the ChaCha and Speck round functions. It is 6 simple instructions and 3 cycles per iteration (assuming multiply by 9 can be done by an "lea" instruction): x ^= *input++; y ^= x; x = ROL(x, K1); x += y; y = ROL(y, K2); y *= 9; Not only is this reversible, two consecutive rounds are reversible: if you are given the initial and final states, but not the intermediate state, it is possible to compute both input words. This means that at least 3 words of input are required to create a collision. (It also has the property, used by hash_name() to avoid a branch, that it hashes all-zero to all-zero.) The rotate constants K1 and K2 were found by experiment. The search took a sample of random initial states (I used 1023) and considered the effect of flipping each of the 64 input bits on each of the 128 output bits two rounds later. Each of the 8192 pairs can be considered a biased coin, and adding up the Shannon entropy of all of them produces a score. The best-scoring shifts also did well in other tests (flipping bits in y, trying 3 or 4 rounds of mixing, flipping all 64*63/2 pairs of input bits), so the choice was made with the additional constraint that the sum of the shifts is odd and not too close to the word size. The final state is then folded into a 32-bit hash value by a less carefully optimized multiply-based scheme. This also has to be fast, as pathname components tend to be short (the most common case is one iteration!), but there's some room for latency, as there is a fair bit of intervening logic before the hash value is used for anything. (Performance verified with "bonnie++ -s 0 -n 1536:-2" on tmpfs. I need a better benchmark; the numbers seem to show a slight dip in performance between 4.6.0 and this patch, but they're too noisy to quote.) Special thanks to Bruce fields for diligent testing which uncovered a nasty fencepost error in an earlier version of this patch. [checkpatch.pl formatting complaints noted and respectfully disagreed with.] Signed-off-by: George Spelvin <[email protected]> Tested-by: J. Bruce Fields <[email protected]>
2016-05-28Eliminate bad hash multipliers from hash_32() and hash_64()George Spelvin2-53/+36
The "simplified" prime multipliers made very bad hash functions, so get rid of them. This completes the work of 689de1d6ca. To avoid the inefficiency which was the motivation for the "simplified" multipliers, hash_64() on 32-bit systems is changed to use a different algorithm. It makes two calls to hash_32() instead. drivers/media/usb/dvb-usb-v2/af9015.c uses the old GOLDEN_RATIO_PRIME_32 for some horrible reason, so it inherits a copy of the old definition. Signed-off-by: George Spelvin <[email protected]> Cc: Antti Palosaari <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]>
2016-05-28Change hash_64() return value to 32 bitsGeorge Spelvin1-3/+3
That's all that's ever asked for, and it makes the return type of hash_long() consistent. It also allows (upcoming patch) an optimized implementation of hash_64 on 32-bit machines. I tried adding a BUILD_BUG_ON to ensure the number of bits requested was never more than 32 (most callers use a compile-time constant), but adding <linux/bug.h> to <linux/hash.h> breaks the tools/perf compiler unless tools/perf/MANIFEST is updated, and understanding that code base well enough to update it is too much trouble. I did the rest of an allyesconfig build with such a check, and nothing tripped. Signed-off-by: George Spelvin <[email protected]>
2016-05-28<linux/sunrpc/svcauth.h>: Define hash_str() in terms of hashlen_string()George Spelvin1-31/+9
Finally, the first use of previous two patches: eliminate the separate ad-hoc string hash functions in the sunrpc code. Now hash_str() is a wrapper around hash_string(), and hash_mem() is likewise a wrapper around full_name_hash(). Note that sunrpc code *does* call hash_mem() with a zero length, which is why the previous patch needed to handle that in full_name_hash(). (Thanks, Bruce, for finding that!) This also eliminates the only caller of hash_long which asks for more than 32 bits of output. The comment about the quality of hashlen_string() and full_name_hash() is jumping the gun by a few patches; they aren't very impressive now, but will be improved greatly later in the series. Signed-off-by: George Spelvin <[email protected]> Tested-by: J. Bruce Fields <[email protected]> Acked-by: J. Bruce Fields <[email protected]> Cc: Jeff Layton <[email protected]> Cc: [email protected]
2016-05-28fs/namei.c: Add hashlen_string() functionGeorge Spelvin3-9/+53
We'd like to make more use of the highly-optimized dcache hash functions throughout the kernel, rather than have every subsystem create its own, and a function that hashes basic null-terminated strings is required for that. (The name is to emphasize that it returns both hash and length.) It's actually useful in the dcache itself, specifically d_alloc_name(). Other uses in the next patch. full_name_hash() is also tweaked to make it more generally useful: 1) Take a "char *" rather than "unsigned char *" argument, to be consistent with hash_name(). 2) Handle zero-length inputs. If we want more callers, we don't want to make them worry about corner cases. Signed-off-by: George Spelvin <[email protected]>