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2014-05-28mtd: nand_bbt: handle error case for nand_create_badblock_pattern()Brian Norris1-2/+6
Signed-off-by: Brian Norris <[email protected]>
2014-05-28mtd: nand_bbt: remove unused variableBrian Norris1-4/+1
Set, but unused, variable. Signed-off-by: Brian Norris <[email protected]>
2014-05-28mtd: maps: sc520cdp: fix warningsBrian Norris1-3/+3
On m86k, and maybe a few other architectures, we get this kind of warning, due to misuse of volatile: drivers/mtd/maps/sc520cdp.c: In function 'sc520cdp_setup_par': >> drivers/mtd/maps/sc520cdp.c:223:2: warning: passing argument 1 of 'iounmap' discards 'volatile' qualifier from pointer target type [enabled by default] arch/m68k/include/asm/raw_io.h:22:13: note: expected 'void *' but argument is of type 'volatile long unsigned int *' Rather than annotating the variable declaration, let's just use the proper accessors, which add the 'volatile' qualifier to the operation. Signed-off-by: Brian Norris <[email protected]>
2014-05-28mtd: slram: fix unused variable warningBrian Norris1-3/+1
drivers/mtd/devices/slram.c: In function 'init_slram': drivers/mtd/devices/slram.c:283:6: warning: variable 'i' set but not used [-Wunused-but-set-variable] Signed-off-by: Brian Norris <[email protected]>
2014-05-28mtd: pfow: remove unused variableBrian Norris1-3/+0
Fixes warning: In file included from drivers/mtd/lpddr/qinfo_probe.c:31:0: include/linux/mtd/pfow.h: In function ‘send_pfow_command’: include/linux/mtd/pfow.h:104:6: warning: variable ‘chipnum’ set but not used [-Wunused-but-set-variable] int chipnum; ^ Signed-off-by: Brian Norris <[email protected]>
2014-05-26mtd: lpddr: fix Kconfig dependency, for I/O accessorsBrian Norris1-1/+2
Not all architectures implement a writel_relaxed() accessor. Hopefully this will change eventually, but for now, this means lpddr2_nvm.c can't compile on some architectures. Let's add an ARM dependency for now, and leave a comment so maybe we can change this in the future. Signed-off-by: Brian Norris <[email protected]> Cc: Vincenzo Aliberti <[email protected]>
2014-05-21mtd: nand: pxa3xx: Add supported ECC strength and step size to the DT bindingEzequiel Garcia1-0/+8
This commit updates the devicetree binding documentation for this driver with the supported ECC strength and step size combinations. Signed-off-by: Ezequiel Garcia <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-21mtd: nand: pxa3xx: Use ECC strength and step size devicetree bindingEzequiel Garcia2-2/+18
This commit adds support for the user to specify the ECC strength and step size through the devicetree. We keep the previous behavior, when there is no DT parameter provided. Signed-off-by: Ezequiel Garcia <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-21mtd: nand: pxa3xx: Clean pxa_ecc_init() error handlingEzequiel Garcia1-11/+10
Let's make pxa_ecc_init() return a negative errno on error or zero if succesful, which is standard kernel practice. Also, report the selected ECC strength and step size, which is important information. Signed-off-by: Ezequiel Garcia <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-21mtd: nand: Warn the user if the selected ECC strength is too weakEzequiel Garcia1-0/+36
This commit makes use of the chip->ecc_strength_ds and chip->ecc_step_ds which contain the datasheet minimum requested ECC strength to produce a noisy warning if the configured ECC strength is weaker. Signed-off-by: Ezequiel Garcia <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: omap: Documentation: How to select correct ECC scheme for your ↵pekon gupta1-0/+45
device ? - Adds DT binding property for BCH16 ECC scheme - Adds describes on factors which determine choice of ECC scheme for particular device CC: [email protected] Signed-off-by: Pekon Gupta <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: omap: add support for BCH16_ECC - NAND driver updatespekon gupta1-0/+94
This patch add support for BCH16 ecc-scheme in OMAP NAND driver, by extending following functions: - omap_enable_hwecc (nand_chip->ecc.hwctl): configure GPMC controller - omap_calculate_ecc_bch (nand_chip->ecc.calculate): fetch ECC signature from GPMC controller - omap_elm_correct_data (nand_chip->ecc.correct): detect and correct ECC errors using ELM (a) BCH16 ecc-scheme can detect and correct 16 bit-flips per 512Bytes of data. (b) BCH16 ecc-scheme generates 26-bytes of ECC syndrome / 512B. Due to (b) this scheme can only be used with NAND devices which have enough OOB to satisfy the relation: "OOBsize per page >= 26 * (page-size / 512)" Signed-off-by: Pekon Gupta <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: omap: add support for BCH16_ECC - ELM driver updatespekon gupta2-1/+38
ELM hardware engine is used to detect ECC errors for BCHx ecc-schemes (like BCH4/BCH8/BCH16). This patch extends configuration of ELM registers for adding support of BCH16_HW ecc-scheme. Signed-off-by: Pekon Gupta <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: omap: add support for BCH16_ECC - GPMC driver updatespekon gupta2-0/+20
This patch add support for BCH16_ECC in GPMC (controller) driver: - extends configuration space to include BCH16 registers - extends parsing of DT binding for selecting BCH16 ecc-scheme Signed-off-by: Pekon Gupta <[email protected]> Acked-by: Tony Lindgren <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20NAND_ECC_SOFT_BCH can support subpage reads tooRon Lee1-2/+10
Signed-off-by: Ron Lee <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: lpddr: add driver for LPDDR2-NVM PCM memoriesVincenzo Aliberti4-2/+519
Signed-off-by: Vincenzo Aliberti <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: Kconfig: give the CFI command set version in prompt and helpPhilippe De Muyter1-8/+8
Enhances the help for the CFI command set choices. Signed-off-by: Philippe De Muyter <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: fsl_ifc_nand: Workaround bogus WP on 16-bit NANDJoe Schultz1-1/+4
A workaround was already in place that set the WP bit in the IFC_CSPR0 register after a STATUS command, however it used an 8-bit write method. As a result, the WP bit was never set on 16-bit devices, and these devices would eventually be incorrectly marked as write-protected. This patch checks the chip options for a 16-bit device and uses the appropriate write method to set the WP bit after a STATUS command. Signed-off-by: Joe Schultz <[email protected]> Signed-off-by: Aaron Sierra <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: fsl_ifc_nand: Use void type for IFC bufferAaron Sierra1-7/+9
The IFC buffer is accessed via 8-bit and 16-bit accessors. Changing the 'addr' member of 'struct fsl_ifc_nand_ctrl' from 'u8 __iomem *' to 'void __iomem *' eliminates the need for explicit casts when the 16-bit accessors are used. Signed-off-by: Aaron Sierra <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: cfi: indent some if statementsDan Carpenter2-3/+3
The break statements should be indented another tab. Signed-off-by: Dan Carpenter <[email protected]> Reviewed-by: Jingoo Han <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: Add support to use nand_base poi databuf as bounce bufferKamal Dasu2-6/+36
nand_base can be passed a kmap()'d buffers from highmem by filesystems like jffs2. This results in failure to map the physical address of the DMA buffer on various contoller driver on different platforms. This change adds a chip option to use preallocated databuf as bounce buffers used in nand_do_read_ops() and nand_do_write_ops(). This allows for specific nand controller driver to set this option as needed. Signed-off-by: Kamal Dasu <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20Documentation: mtd: update the document for m25p80Huang Shijie1-2/+2
The m25p80.c has used the SPI NOR framework now, and the m25p_ids has been moved to spi-nor.c and renamed to spi_nor_ids. This patch updates the document for m25p80. Signed-off-by: Huang Shijie <[email protected]> Acked-by: Marek Vasut <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: eLBC NAND: fix subpage write supportPekon Gupta1-0/+14
As subpage write is enabled by default for all drivers, nand_write_subpage_hwecc causes a crash if the driver did not register ecc->hwctl or ecc->calculate. This behavior was introduced in commit 837a6ba4f3b6d23026674e6af6b6849a4634fff9 "mtd: nand: subpage write support for hardware based ECC schemes". This fixes a crash by emulating subpage write support by padding sub-page data with 0xff on either sides to make it full page compatible. Reported-by: Helmut Schaa <[email protected]> Tested-by: Helmut Schaa <[email protected]> Signed-off-by: Pekon Gupta <[email protected]> Reviewed-by: Scott Wood <[email protected]> Cc: <[email protected]> # 3.10.x+ Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: onenand: fix build warning for dma typeArnd Bergmann1-4/+4
The samsung onenand driver passes around a dma address token through a void pointer, which is incorrect and leads to warnings like this one: onenand/samsung.c:548:2: warning: passing argument 1 of '__fswab32' makes integer from pointer without a cast [enabled by default] writel(src, base + S5PC110_DMA_SRC_ADDR); ^ This patch makes it use dma_addr_t here, which is more appropriate. Signed-off-by: Arnd Bergmann <[email protected]> Cc: Kyungmin Park <[email protected]> Cc: David Woodhouse <[email protected]> Cc: [email protected] Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: orion_nand: Make of_device_id array constJingoo Han1-1/+1
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <[email protected]> Acked-by: Andrew Lunn <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: pxa3xx: Make of_device_id array constJingoo Han1-1/+1
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <[email protected]> Acked-by: Jason Cooper <[email protected]> Acked-by: Ezequiel Garcia <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: st_spi_fsm: Make of_device_id array constJingoo Han1-1/+1
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: Fix warning in access_ok() parameter passingGeert Uytterhoeven1-9/+11
On m68k, where access_ok() doesn't cast the address parameter: drivers/mtd/mtdchar.c: In function 'mtdchar_write_ioctl': drivers/mtd/mtdchar.c:575:4: warning: passing argument 2 of 'access_ok' makes pointer from integer without a cast [enabled by default] arch/m68k/include/asm/uaccess_mm.h:17:90: note: expected 'const void *' but argument is of type '__u64' drivers/mtd/mtdchar.c:576:4: warning: passing argument 2 of 'access_ok' makes pointer from integer without a cast [enabled by default] arch/m68k/include/asm/uaccess_mm.h:17:90: note: expected 'const void *' but argument is of type '__u64' The address parameter of access_ok() is really a userspace pointer. On most architectures, access_ok() is a macro that casts the address parameter, hiding issues in its users. Move around and use the existing usr_data and usr_oob temporary variables to kill the warnings. Add a few "consts", and make more use of the temporaries while we're at it. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-20mtd: nand: omap: fix BCHx ecc.correct to return detected bit-flips in ↵pekon gupta1-1/+1
erased-page fixes: commit 62116e5171e00f85a8d53f76e45b84423c89ff34 mtd: nand: omap2: Support for hardware BCH error correction. In omap_elm_correct_data(), if bitflip_count in an erased-page is within the correctable limit (< ecc.strength), then it is not indicated back to the caller ecc->read_page(). This mis-guides upper layers like MTD and UBIFS layer to assume erased-page as perfectly clean and use it for writing even if actual bitflip_count was dangerously high (bitflip_count > mtd->bitflip_threshold). This patch fixes this above issue, by returning 'stats' to caller ecc->read_page() under all scenarios. Reported-by: Brian Norris <[email protected]> Signed-off-by: Pekon Gupta <[email protected]> Cc: <[email protected]> # 3.9.x+ Signed-off-by: Brian Norris <[email protected]>
2014-05-12mtd: spi-nor: Enable Dual and Quad SPI read transfers for s25sl032pGeert Uytterhoeven1-1/+1
Spansion s25sl032p supports Dual and Quad SPI transfers, hence set the SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags. Signed-off-by: Geert Uytterhoeven <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-12mtd: m25p80: Revive dual read supportGeert Uytterhoeven1-0/+2
Commit 03e296f613affcc2671c1e86d8c25ecad867204e ("mtd: m25p80: use the SPI nor framework") accidentally removed support for Dual SPI read transfers. Add it back. Signed-off-by: Geert Uytterhoeven <[email protected]> Acked-by: Huang Shijie <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-12mtd: elm: compile suspend/resume only with PM_SLEEPWolfram Sang1-0/+2
Fixes: drivers/mtd/devices/elm.c:480:12: warning: 'elm_suspend' defined but not used [-Wunused-function] drivers/mtd/devices/elm.c:488:12: warning: 'elm_resume' defined but not used [-Wunused-function] Signed-off-by: Wolfram Sang <[email protected]> Acked-by: Pekon Gupta <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-12mtd: Fix Elan SC520 dependenciesJean Delvare1-2/+2
Anyone working with an AMD Elan SC520 development or evaluation board would be building a dedicated kernel for it, so we can make the sc520cdp and netsc520 maps depend on MELAN. SC520_CPUFREQ already depends on MELAN so it makes things more consistent. It also makes kernel configuration for every other x86 user easier. Signed-off-by: Jean Delvare <[email protected]> Cc: David Woodhouse <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-05-09mtd: nand: refactor erase_cmd() to return chip statusBrian Norris4-16/+16
The nand_chip::erase_cmd callback previously served a dual purpose; for one, it allowed a per-flash-chip override, so that AG-AND devices could use a different erase command than other NAND. These AND devices were dropped in commit 14c6578683367b1e7af0c3c09e872b45a45183a7 (mtd: nand: remove AG-AND support). On the other hand, some drivers (denali and doc-g4) need to use this sort of callback to implement controller-specific erase operations. To make the latter operation easier for some drivers (e.g., ST's new BCH NAND driver), it helps if the command dispatch and wait functions can be lumped together, rather than called separately. This patch does two things: 1. Pull the call to chip->waitfunc() into chip->erase_cmd(), and return the status from this callback 2. Rename erase_cmd() to just erase(), since this callback does a little more than just send a command Signed-off-by: Brian Norris <[email protected]> Tested-by: Lee Jones <[email protected]>
2014-04-29mtd: nand: fix a typo in a comment lineMasahiro Yamada1-1/+1
Signed-off-by: Masahiro Yamada <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-17mtd: mtd_oobtest: generate consistent data for verificationAkinobu Mita1-7/+10
mtd_oobtest writes OOB, read it back and verify. The verification is not correctly done if oobsize is not multiple of 4. Although the data to be written and the data to be compared are generated by several prandom_byte_state() calls starting with the same seed, these two are generated with the different size and different number of calls. Due to the implementation of prandom_byte_state() if the size on each call is not multiple of 4, the resulting data is not always same. This fixes it by just calling prandom_byte_state() once and using correct range instead of calling it multiple times for each. Reported-by: George Cherian <[email protected]> Reported-by: Lothar Waßmann <[email protected]> Tested-by: Lothar Waßmann <[email protected]> Cc: George Cherian <[email protected]> Cc: Lothar Waßmann <[email protected]> Cc: David Woodhouse <[email protected]> Cc: Lee Jones <[email protected]> Cc: [email protected] Signed-off-by: Akinobu Mita <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-16Merge branch 'spinor'Brian Norris13-1415/+2723
Addition of the spi-nor framework, plus updates to the ST SPI FSM driver.
2014-04-16mtd: st_spi_fsm: only build for ARMBrian Norris1-1/+1
COMPILE_TEST allows us to build this driver on other arch'es. But not all arch'es have the right I/O accessors -- particularly, x86 is missing readsl() and writesl(). So just restrict this driver to ARCH_STI. It's still buildable for a multiplatform ARM kernel, so it can get decent compile coverage. Signed-off-by: Brian Norris <[email protected]> Acked-by: Lee Jones <[email protected]>
2014-04-16mtd: st_spi_fsm: correct type issuesBrian Norris1-6/+6
Compile-testing for a 64-bit arch uncovers several bad casts: In file included from include/linux/linkage.h:4:0, from include/linux/kernel.h:6, from drivers/mtd/devices/st_spi_fsm.c:15: drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_read_fifo’: drivers/mtd/devices/st_spi_fsm.c:758:11: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] BUG_ON((((uint32_t)buf) & 0x3) || (size & 0x3)); ... Use uintptr_t instead of uint32_t, since it's guaranteed to be pointer-sized. We also see this warning, if size_t is not 32 bits wide: In file included from drivers/mtd/devices/st_spi_fsm.c:15:0: drivers/mtd/devices/st_spi_fsm.c: In function ‘stfsm_mtd_write’: include/linux/kernel.h:712:17: warning: comparison of distinct pointer types lacks a cast [enabled by default] (void) (&_min1 == &_min2); \ ^ drivers/mtd/devices/st_spi_fsm.c:1704:11: note: in expansion of macro ‘min’ bytes = min(FLASH_PAGESIZE - page_offs, len); ^ Just use min_t() to force the type conversion, since we don't really want to upgrade 'page_offs' and 'bytes' to size_t; they only should be handling <= 256 byte offsets. Signed-off-by: Brian Norris <[email protected]> Acked-by: Lee Jones <[email protected]>
2014-04-16mtd: fsl-quadspi: fix __iomem annotationsBrian Norris1-2/+2
This corrects some sparse warnings: drivers/mtd/spi-nor/fsl-quadspi.c:281:31: warning: incorrect type in initializer (different address spaces) [sparse] drivers/mtd/spi-nor/fsl-quadspi.c:281:31: expected void *[noderef] <asn:2>base [sparse] drivers/mtd/spi-nor/fsl-quadspi.c:281:31: got void [noderef] <asn:2>*iobase [sparse] (etc.) Signed-off-by: Brian Norris <[email protected]> Acked-by: Huang Shijie <[email protected]>
2014-04-16mtd: gpmi: add gpmi_devdata{} to simplify the codeHuang Shijie3-40/+46
More and more chips use the GPMI controller, but these chips may use different version of the IPs for GPMI and BCH. Different IPs have different features, such as the BCH's maximum ECC strength: imx23/imx28 -- the BCH's maximum ECC strength is 20 imx6q -- the BCH's maximum ECC strength is 40 imx6sx -- the BCH's maximum ECC strength is 62 This patch does the following things: [1] add a new data structure, gpmi_devdata{}, to store the information for each IP. Besides the IP version, we store the following information: <1> BCH's maximum ECC strength. <2> the maximum chain delay in ns used by the EDO mode. but we may add more information in future. [2] add the gpmi_devdata_imx{23|28|6q} to replace the gpmi_ids. [3] simplify the code by using the ECC strength from gpmi_devdata, such as gpmi_check_ecc() and legacy_set_geometry(); [4] use the maximum chain delay to initialize the EDO mode, see gpmi_compute_edo_timing(). [5] rewrite the macros, such GPMI_IS_MX{23|28|6Q}. Signed-off-by: Huang Shijie <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-16mtd: nand: add line feed to pr_errRaphaël Poggi1-1/+1
Add line feed to pr_err. Signed-off-by: Raphaël Poggi <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-15mtd: davinci-nand: disable subpage write for keystone-nandMurali Karicheri1-0/+6
Sub page write doesn't work because of hw issue in controller found on Keystone SOCs. AEMIF controller is also used on DaVinci SOCs which don't seems to have any issue. So add "ti,keysone-nand" compatible to nand driver in order to set NAND_NO_SUBPAGE_WRITE option. Cc: Warner Losh <[email protected]> Signed-off-by: Murali Karicheri <[email protected]> Signed-off-by: Ivan Khoronzhuk <[email protected]> Acked-by: Santosh Shilimkar <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-15mtd: mtd_blkdevs: handle REQ_FLUSH request and do explicit flush of ↵Roman Peniaev1-0/+6
writeback buffer mtd_blkdevs is device with volatile cache (writeback buffer), so it should support REQ_FLUSH to do explicit flush. Without this patch 'sync' does not guarantee that writeback buffer will be flushed on disk in case of power off, e.g.: $ cp some_file /mnt $ sync ### POWER OFF In case of this sequence writeback buffer will not be flushed on disk. This patch fixes this behaviour and explicitly reports to block layer that flush requests are being supported. Signed-off-by: Roman Peniaev <[email protected]> Cc: David Woodhouse <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Brian Norris <[email protected]>
2014-04-15mtd: nand: use the nand_read_subpage index everywhereRon1-2/+1
Now that the index variable is correctly set earlier in this function we can use it in other places that compute the same thing too. Signed-off-by: Ron Lee <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-15mtd: nand: omap: fix compile warning on ‘erased_sector_bitflips’Christian Engelmayer1-1/+1
Commit 2c9f2365 (mtd: nand: omap: ecc.calculate: merge omap3_calculate_ecc_bch4 in omap_calculate_ecc_bch) introduced minor compile warning "‘erased_sector_bitflips’ defined but not used [-Wunused-function]" when compiling without CONFIG_MTD_NAND_OMAP_BCH. Move function erased_sector_bitflips() into the same ifdef section as the only caller. Signed-off-by: Christian Engelmayer <[email protected]> Reviewed-by: Jingoo Han <[email protected]> Acked-by: Pekon Gupta <[email protected]> Signed-off-by: Brian Norris <[email protected]>
2014-04-14mtd: spi-nor: allow to be built as moduleBrian Norris1-2/+2
There's no reason this can't be a module. Also, give SPI-NOR its own submenu. Signed-off-by: Brian Norris <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2014-04-14mtd: st_spi_fsm: begin using spi-nor.h opcodesBrian Norris2-24/+5
Many of the serial_flash_cmds.h opcodes are duplicated with spi-nor.h. Let's begin to unify them. Signed-off-by: Brian Norris <[email protected]> Acked-by: Lee Jones <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2014-04-14mtd: st_spi_fsm: replace FLACH_CMD_* with SPINOR_OP_*Brian Norris2-87/+87
Begin to unify the differences between serial_flash_cmds.h and spi-nor.h. Signed-off-by: Brian Norris <[email protected]> Acked-by: Lee Jones <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
2014-04-14mtd: st_spi_fsm: kill duplicate CMD definitionsBrian Norris1-36/+0
These are also in serial_flash_cmds.h. (FWIW, I didn't know the C preprocessor allowed redefinitions without warning like this.) Signed-off-by: Brian Norris <[email protected]> Acked-by: Lee Jones <[email protected]> Reviewed-by: Marek Vasut <[email protected]>
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