diff options
| author | Ezequiel Garcia <[email protected]> | 2014-05-14 14:58:09 -0300 |
|---|---|---|
| committer | Brian Norris <[email protected]> | 2014-05-21 12:55:09 -0700 |
| commit | fe4fd75b827a3c037d71ecaed04503e3637ccb1c (patch) | |
| tree | 39946f4e14c738ea13df552afbad9fda354cd5ca | |
| parent | 5b3e507820c6e120bc2680c0d35f9d9d81fcb98d (diff) | |
mtd: nand: pxa3xx: Add supported ECC strength and step size to the DT binding
This commit updates the devicetree binding documentation for this driver
with the supported ECC strength and step size combinations.
Signed-off-by: Ezequiel Garcia <[email protected]>
Signed-off-by: Brian Norris <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt index 86e0a5601ff5..de8b517a5521 100644 --- a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt +++ b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt @@ -17,6 +17,14 @@ Optional properties: - num-cs: Number of chipselect lines to usw - nand-on-flash-bbt: boolean to enable on flash bbt option if not present false + - nand-ecc-strength: number of bits to correct per ECC step + - nand-ecc-step-size: number of data bytes covered by a single ECC step + +The following ECC strength and step size are currently supported: + + - nand-ecc-strength = <1>, nand-ecc-step-size = <512> + - nand-ecc-strength = <4>, nand-ecc-step-size = <512> + - nand-ecc-strength = <8>, nand-ecc-step-size = <512> Example: |