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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Cc: Chris Zhong <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This driver includes clkdev.h even though it isn't used, so drop
it.
Cc: Peter Ujfalusi <[email protected]>
Cc: Nishanth Menon <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver. This driver also includes clkdev.h even though
it isn't used, so drop it too and add slab.h to make sure
everything still compiles.
Reviewed-by: Linus Walleij <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Acked-by: Uwe Kleine-König <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Cc: Alexander Shiyan <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This clock provider uses the consumer API, so include clk.h
explicitly.
Cc: Max Filippov <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Cc: Lars-Peter Clausen <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Cc: Alexander Shiyan <[email protected]>
Cc: Sascha Hauer <[email protected]>
Cc: Shawn Guo <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file uses the clk API so it should include clk.h directly
instead of indirectly including it through clk-provider.h.
Acked-by: Geert Uytterhoeven <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This driver uses the consumer API, so include clk.h explicitly
instead of impliclty through the provider API.
Cc: Luc Verhaegen <[email protected]>
Cc: Hans de Goede <[email protected]>
Acked-by: Geert Uytterhoeven <[email protected]>
Cc: Maxime Ripard <[email protected]>
Cc: David Herrmann <[email protected]>
Cc: Tomi Valkeinen <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the includes here because these are
a provider drivers.
Cc: Ken Xue <[email protected]>
Cc: Mika Westerberg <[email protected]>
Cc: Rafael J. Wysocki <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Cc: Michal Simek <[email protected]>
Cc: Daniel Lezcano <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the include here because this is a
provider driver.
Cc: Daniel Mack <[email protected]>
Cc: Haojian Zhuang <[email protected]>
Cc: Robert Jarzmik <[email protected]>
Cc: Mark Brown <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This clock provider uses the consumer API, so include clk.h
explicitly.
Acked-by: Sören Brinkmann <[email protected]>
Acked-by: Greg Kroah-Hartman <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This clock provider uses the consumer API, so include clk.h
explicitly.
Cc: Gerhard Sittig <[email protected]>
Cc: Scott Wood <[email protected]>
Acked-by: Anatolij Gustschin <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This clock provider uses the consumer API, so include clk.h
explicitly.
Cc: Manuel Lauss <[email protected]>
Acked-by: Ralf Baechle <[email protected]>
Cc: Linux-MIPS <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Acked-by: Catalin Marinas <[email protected]>
Cc: Will Deacon <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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These files use the consumer API, so include clk.h explicitly.
Acked-by: Tero Kristo <[email protected]>
Cc: Tony Lindgren <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Cc: Thomas Petazzoni <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Cc: Thomas Petazzoni <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Cc: Nishanth Menon <[email protected]>
Cc: Sekhar Nori <[email protected]>
Acked-by: Santosh Shilimkar <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Cc: Haojian Zhuang <[email protected]>
Cc: Wei Xu <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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This file doesn't use the clk provider APIs. Remove the include.
Acked-by: Alexandre Belloni <[email protected]>
Cc: Boris Brezillon <[email protected]>
Cc: Nicolas Ferre <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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The DFLL clocksource was missing from the list of possible parents for
the fast CPU cluster. Add it to the list.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Save and restore this register since the LP1 restore assembly routines
fiddle with it. Otherwise the CPU would keep running on PLLX after
resume from suspend even when DFLL was the original clocksource.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Peter De Schrijver <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Add basic platform driver support for the fast CPU cluster DFLL
clocksource found on Tegra124 SoCs. This small driver selects the
appropriate Tegra124-specific characterization data and integration
code. It relies on the DFLL common code to do most of the work.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
[[email protected]: move setup code into ->probe()]
Signed-off-by: Thierry Reding <[email protected]>
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The DVCO present in the DFLL IP block has a separate reset line,
exposed via the CAR IP block. This reset line is asserted upon SoC
reset. Unless something (such as the DFLL driver) deasserts this
line, the DVCO will not oscillate, although reads and writes to the
DFLL IP block will complete.
Thanks to Aleksandr Frid <[email protected]> for identifying this and
saving hours of debugging time.
Signed-off-by: Paul Walmsley <[email protected]>
[ttynkkynen: ported to tegra124 from tegra114]
Signed-off-by: Tuomas Tynkkynen <[email protected]>
[mikko.perttunen: ported to special reset callback]
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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This patch allows SoC-specific CAR initialization routines to register
their own reset_assert and reset_deassert callbacks with the common Tegra
CAR code. If defined, the common code will call these callbacks when a
reset control with number >= num_periph_banks * 32 is attempted to be asserted
or deasserted respectively. Numbers greater than or equal to num_periph_banks * 32
are used to avoid clashes with low numbers that are automatically mapped to
standard CAR reset lines.
Each SoC with these special resets should specify the defined reset control
numbers in a device tree header file.
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Tegra CVB tables encode the relationship between operating voltage
and optimal frequency as a function of the so-called speedo value.
The speedo value is written to the on-chip fuses at the factory,
which allows the voltage-frequency operating points to be calculated
on an per-chip basis.
Add utility functions to parse the Tegra-specific tables and export the
voltage-frequency pairs to the generic OPP framework for other drivers
to use.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Peter De Schrijver <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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With closed loop support, the clock rate of the DFLL can be adjusted.
The oscillator itself in the DFLL is a free-running oscillator whose
rate is directly determined the supply voltage. However, the DFLL
module contains logic to compare the DFLL output rate to a fixed
reference clock (51 MHz) and make a decision to either lower or raise
the DFLL supply voltage. The DFLL module can then autonomously change
the supply voltage by communicating with an off-chip PMIC via either I2C
or PWM signals. This driver currently supports only I2C.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Peter De Schrijver <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Add shared code to support the Tegra DFLL clocksource in open-loop
mode. This root clocksource is present on the Tegra124 SoCs. The
DFLL is the intended primary clock source for the fast CPU cluster.
This code is very closely based on a patch by Paul Walmsley from
December (http://comments.gmane.org/gmane.linux.ports.tegra/15273),
which in turn comes from the internal driver by originally created
by Aleksandr Frid <[email protected]>.
Subsequent patches will add support for closed loop mode and drivers
for the Tegra124 fast CPU cluster DFLL devices, which rely on this
code.
Signed-off-by: Paul Walmsley <[email protected]>
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Peter De Schrijver <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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The DFLL is the main clocksource for the fast CPU cluster on Tegra124
and also provides automatic CPU rail voltage scaling as well. The DFLL
is a separate IP block from the usual Tegra124 clock-and-reset
controller, so it gets its own node in the device tree.
Signed-off-by: Tuomas Tynkkynen <[email protected]>
Signed-off-by: Mikko Perttunen <[email protected]>
Acked-by: Michael Turquette <[email protected]>
Signed-off-by: Thierry Reding <[email protected]>
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Add imx6ul clock driver support.
Signed-off-by: Anson Huang <[email protected]>
Signed-off-by: Bai Ping <[email protected]>
Signed-off-by: Fugang Duan <[email protected]>
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The error paths in this file leak memory and mappings and test
for pointers being valid after dereferencing them. Fix these
problems and properly free resources on errors. Fix some
stylistic things too like using sizeof(*ptr) and fitting more
code on a single line. Note that we don't unregister clocks here.
That needs a clk_composite_unregister() API that we don't have
right now.
Acked-by: Gabriel Fernandez <[email protected]>
Cc: Pankaj Dev <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Currently it is not possible to use HDMI and LVDS at the same time on a
imx6dl-sabresd board.
Fix this usecase by setting IMX6QDL_CLK_PLL3_PFD1_540M to 540MHz and
also by setting it as the parent of IMX6QDL_CLK_IPU1_SEL.
Based on the configuration done in the FSL kernel.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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* clk-fixes:
drivers: clk: st: Incorrect register offset used for lock_status
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The list isn't used after of_clk_init() is called, so we don't
need to keep an empty list around after init. Put the list on the
stack.
Cc: Gregory CLEMENT <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Dan Carpenter reports that we don't check the allocation here for
failure. Add a failure check and free any previously allocated
providers from the clk_provider_list.
Reported-by: Dan Carpenter <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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* clk-rk3368:
clk: rockchip: add rk3368 clock controller
clk: rockchip: add missing include guards
clk: rockchip: add dt-binding header for rk3368
dt-bindings: add documentation of rk3668 clock controller
clk: rockchip: define the inverters of rk3066/rk3188 and rk3288
clk: rockchip: fix issues in the mmc-phase clock
clk: rockchip: add support for phase inverters
clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant
clk: rockchip: protect register macros against multipart values
clk: rockchip: fix faulty vip parent name on rk3288
clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac
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Add support for SR2 type pll operations. SR2 is optimized for Time Interval
Error (TIE) or absolute jitter.
Signed-off-by: Georgi Djakov <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Remove useless ifdefs around function prototypes to silence the
following sparse warnings when the configs aren't enabled.
drivers/clk/at91/clk-h32mx.c:95:13: warning: symbol
'of_sama5d4_clk_h32mx_setup' was not declared. Should it be
static?
drivers/clk/at91/clk-utmi.c:159:13: warning: symbol
'of_at91sam9x5_clk_utmi_setup' was not declared. Should it be
static?
Plus, using __init and extern in function prototypes doesn't do
anything, so just drop it throughout this file.
Acked-by: Boris BREZILLON <[email protected]>
Acked-by: Alexandre Belloni <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Incorrect register offset used for sthi407 clockgenC
Signed-off-by: Pankaj Dev <[email protected]>
Signed-off-by: Gabriel Fernandez <[email protected]>
Fixes: 51306d56ba81 ("clk: st: STiH407: Support for clockgenC0")
Signed-off-by: Stephen Boyd <[email protected]>
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Make const both the array and the strings, so they can be
moved to .rodata section.
Signed-off-by: Georgi Djakov <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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X-Gene clocks implement it's name in the clock private struct.
This is a duplication of the name field. We can delete the field
and rely on the common implementation to retrieve the name.
Signed-off-by: Matthias Brugger <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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The file clk-gpio-gate.c does not only contain the gate clock, but also
the mux clock. Rename the file to clk-gpio.c.
Cc: Jyri Sarha <[email protected]>
Signed-off-by: Sergej Sawazki <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Add a common clock driver for basic gpio controlled clock multiplexers.
This driver can be used for devices like 5V41068A or 831721I from IDT
or for discrete multiplexer circuits. The 'select' pin selects one of
two parent clocks.
Cc: Jyri Sarha <[email protected]>
Signed-off-by: Sergej Sawazki <[email protected]>
[[email protected]: Fix error paths to free memory and do it
in the correct order]
Signed-off-by: Stephen Boyd <[email protected]>
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Do not output an error message if requesting gpio failes with EPROBE_DEFER.
Cc: Jyri Sarha <[email protected]>
Signed-off-by: Sergej Sawazki <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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Include export.h for EXPORT_SYMBOL_GPL, no need to include module.h.
Cc: Jyri Sarha <[email protected]>
Signed-off-by: Sergej Sawazki <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
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