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2021-12-16arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSBThierry Reding1-8/+0
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the PCIe and XUSB controller device tree nodes. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: smaug: Remove extra PLL power supplies for XUSBThierry Reding1-4/+0
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the XUSB controller device tree node. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSBThierry Reding2-8/+0
The XUSB pad controller handles the various PLL power supplies, so remove any references to them from the PCIe and XUSB controller device tree nodes. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Rename GPIO hog nodes to match schemaThierry Reding1-1/+1
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to the DT schema. Rename all such nodes to allow validation to pass. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Remove unsupported regulator propertiesThierry Reding2-13/+0
Remove the unsupported "regulator-disable-ramp-delay" properties which ended up in various DTS files for some reason. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Rename TCU node to "serial"Thierry Reding1-1/+1
The TCU is basically a serial port (albeit a fancy one), so it should be named "serial". Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clockThierry Reding1-3/+2
The "core_m" clock is not documented in the Tegra194 PCIe device tree bindings, so remove it. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Drop unused properties for Tegra194 PCIeThierry Reding1-15/+0
The num-viewport property is never used and can be dropped, whereas the "iommus" property is not needed since we use "iommu-map-mask" and "iommu-map" already. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fix Tegra194 HSP compatible stringThierry Reding1-2/+2
The HSP instances on Tegra194 are not fully compatible with the version found on Tegra186, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Drop unsupported nvidia,lpdr propertyThierry Reding1-2/+0
The Tegra194 pinmux DT bindings do not define the nvidia,lpdr property, so drop them from the device trees that have listed them. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Use JEDEC vendor prefix for SPI NOR flash chipsThierry Reding2-2/+2
The standard "jedec," vendor prefix should be used for SPI NOR flash chips. This allows the right DT schema to be picked for validation. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Drop unit-address for audio card graph endpointsThierry Reding3-7/+7
Audio graph endpoints don't have a "reg" property, so they shouldn't have a unit-address either. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Adjust length of CCPLEX cluster MMIO regionThierry Reding1-1/+1
The Tegra186 CCPLEX cluster register region is 4 MiB is length, not 4 MiB - 1. This was likely presumed to be the "limit" rather than length. Fix it up. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fix Tegra186 compatible string listThierry Reding1-9/+9
The I2C controller found on Tegra186 is not fully compatible with the Tegra210 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Rename power-monitor input nodesThierry Reding3-16/+16
Child nodes of the TI INA3221 power monitor device tree node should be called input@* according to the DT schema. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Rename thermal zones nodesThierry Reding8-55/+49
The DT schema requires that nodes representing thermal zones include a "-thermal" suffix in their name. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Sort Tegra132 XUSB clocks correctlyThierry Reding1-2/+2
Make the order of the clocks and clock-names properties match the order in the device tree bindings. This isn't strictly necessary from a point of view of the operating system because matching will be done based on the clock-names, but it makes it easier to validate the device trees against the DT schema. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Drop unused AHCI clocks on Tegra132Thierry Reding1-4/+2
The CML1 and PLL_E clocks are never explicitly used by the AHCI controller found on Tegra132, so drop them from the corresponding device tree node. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fix Tegra132 I2C compatible string listThierry Reding1-6/+6
The I2C controller found on Tegra124 is not fully compatible with the Tegra114 version, so drop the fallback compatible string from the list. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add OPP tables on Tegra132Thierry Reding2-1/+438
Add peripheral OPP tables on Tegra132 and wire them up to ACTMON and the EMC. While at it, add the missing "#interconnect-cells" properties to the memory controller and external memory controller nodes. Also set the "#reset-cells" property for the memory controller because it exports the hotflush reset controls. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fix compatible string for Tegra132 timerThierry Reding1-1/+1
The TKE (time-keeping engine) found on Tegra132 is not backwards compatible with the version found on Tegra20, so update the compatible string list accordingly. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Remove unsupported properties on NorrinThierry Reding1-2/+0
The Tegra PMC device tree bindings don't support the "#wake-cells" and "nvidia,reset-gpio" properties, so remove them. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fix unit-addresses on NorrinThierry Reding1-3/+3
The AS3722 pinmux device tree node doesn't have a "reg" property and therefore must not have a unit-address, so drop it. While at it, add missing unit-addresses for the charger and smart battery IC's on the ChromeOS embedded controller's I2C tunnel bus. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add native timer support on Tegra186Thierry Reding1-0/+16
The native timers IP block found on NVIDIA Tegra SoCs implements a watchdog timer that can be used to recover from system hangs. Add the device tree node on Tegra186. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Rename top-level regulatorsThierry Reding12-86/+86
Regulators defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the regulator to the node name. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Rename top-level clocksThierry Reding6-6/+6
Clocks defined at the top level in device tree are no longer part of a simple bus and therefore don't have a reg property. Nodes without a reg property shouldn't have a unit-address either, so drop the unit address from the node names. To ensure nodes aren't duplicated (in which case they would end up merged in the final DTB), append the name of the clock to the node name. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add ISO SMMU controller for Tegra194Jon Hunter1-0/+76
The display controllers are attached to a separate ARM SMMU instance that is dedicated to servicing isochronous memory clients. Add this ISO instance of the ARM SMMU to device tree. Please note that the display controllers are not hooked up to this SMMU yet, because we are still missing a means to transition framebuffers used by the bootloader to the kernel. This based upon an initial patch by Thierry Reding <[email protected]>. Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add NVENC and NVJPG nodes for Tegra186 and Tegra194Jon Hunter2-0/+84
Populate the device-tree nodes for NVENC and NVJPG Host1x engines on Tegra186 and Tegra194. Signed-off-by: Jon Hunter <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add support to enumerate SD in UHS modePrathamesh Shete1-0/+34
Add support to enumerate SD in UHS mode on Tegra194. Add required device-tree properties in SDMMC1 and SDMMC3 instances to enable dynamic pad voltage switching and enumerate SD card in UHS-I modes. Signed-off-by: Prathamesh Shete <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add NVIDIA Jetson AGX Orin Developer Kit supportMikko Perttunen4-0/+55
The Jetson AGX Orin Developer Kit is a continuation of the Jetson Developer Kit line using the new NVIDIA Tegra234 (Orin) SoC. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Describe Tegra234 CPU hierarchyThierry Reding1-2/+363
The NVIDIA Tegra234 SoC has 3 clusters of 4 Cortex-A78AE CPU cores each, for a total of 12 CPUs. Each CPU has 64 KiB instruction and data caches with each cluster having an additional 256 KiB unified L2 cache and a 2 MiB L3 cache. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add main and AON GPIO controllers on Tegra234Thierry Reding1-0/+74
These two controllers expose general purpose I/O pins that can be used to control or monitor a variety of signals. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add Tegra234 TCU deviceMikko Perttunen1-0/+8
Add a device for TCU (Tegra Combined UART) used for serial console. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fill in properties for Tegra234 eMMCMikko Perttunen1-3/+16
Add missing properties to the eMMC controller, as required to use it on actual hardware. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Update Tegra234 BPMP channel addressesMikko Perttunen1-6/+6
On final Tegra234 systems, shared memory for communication with BPMP is located at offset 0x70000 in SYSRAM. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Add clock for Tegra234 RTCMikko Perttunen1-0/+2
The RTC device requires a clock. Add it. Signed-off-by: Mikko Perttunen <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16arm64: tegra: Fixup SYSRAM referencesThierry Reding3-6/+6
The json-schema bindings for SRAM expect the nodes to be called "sram" rather than "sysram" or "shmem". Furthermore, place the brackets around the SYSRAM references such that a two-element array is created rather than a two-element array nested in a single-element array. This is not relevant for device tree itself, but allows the nodes to be properly validated against json-schema bindings. Signed-off-by: Thierry Reding <[email protected]>
2021-12-16Merge tag 'tegra-for-5.17-dt-bindings-memory' into for-5.17/arm64/dtThierry Reding4-16/+152
dt-bindings: memory: Add Tegra234 support This stable tag contains the addition of the EMC clock ID and an initial list of memory client IDs for Tegra234 and will be shared between the memory and ARM SoC trees.
2021-12-16dt-bindings: memory: tegra: Add Tegra234 supportThierry Reding3-0/+61
Document the variant of the memory controller and external memory controllers found on Tegra234 and add some memory client and SMMU stream ID definitions for use in device tree files. Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16dt-bindings: memory: tegra: Update for Tegra194Thierry Reding1-11/+67
The #interconnect-cells properties are required to hook up memory clients to the MC/EMC in interconnects properties. Add a description for these properties. For the nested EMC controller, the list of required properties was missing. Add it so that the validation can be more strict. Also, allow multiple reg entries required by Tegra194 and later. While at it, also remove the dummy BPMP node from the example because it is incomplete and fails validation. It's also not necessary for this file and the BPMP DT schema already has a full example. Signed-off-by: Thierry Reding <[email protected]> Reviewed-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-12-16dt-bindings: Update headers for Tegra234Mikko Perttunen2-5/+24
Add a few more clocks that will be used in follow-up patches to enable more functionality on Tegra234. Signed-off-by: Mikko Perttunen <[email protected]> Reviewed-by: Rob Herring <[email protected]> Signed-off-by: Thierry Reding <[email protected]>
2021-11-14Linux 5.16-rc1Linus Torvalds1-2/+2
2021-11-14kconfig: Add support for -Wimplicit-fallthroughGustavo A. R. Silva2-5/+6
Add Kconfig support for -Wimplicit-fallthrough for both GCC and Clang. The compiler option is under configuration CC_IMPLICIT_FALLTHROUGH, which is enabled by default. Special thanks to Nathan Chancellor who fixed the Clang bug[1][2]. This bugfix only appears in Clang 14.0.0, so older versions still contain the bug and -Wimplicit-fallthrough won't be enabled for them, for now. This concludes a long journey and now we are finally getting rid of the unintentional fallthrough bug-class in the kernel, entirely. :) Link: https://github.com/llvm/llvm-project/commit/9ed4a94d6451046a51ef393cd62f00710820a7e8 [1] Link: https://bugs.llvm.org/show_bug.cgi?id=51094 [2] Link: https://github.com/KSPP/linux/issues/115 Link: https://github.com/ClangBuiltLinux/linux/issues/236 Co-developed-by: Kees Cook <[email protected]> Signed-off-by: Kees Cook <[email protected]> Co-developed-by: Linus Torvalds <[email protected]> Signed-off-by: Linus Torvalds <[email protected]> Signed-off-by: Gustavo A. R. Silva <[email protected]> Reviewed-by: Nathan Chancellor <[email protected]> Tested-by: Nathan Chancellor <[email protected]> Signed-off-by: Linus Torvalds <[email protected]>
2021-11-14Merge tag 'xfs-5.16-merge-5' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linuxLinus Torvalds4-7/+12
Pull xfs cleanups from Darrick Wong: "The most 'exciting' aspect of this branch is that the xfsprogs maintainer and I have worked through the last of the code discrepancies between kernel and userspace libxfs such that there are no code differences between the two except for #includes. IOWs, diff suffices to demonstrate that the userspace tools behave the same as the kernel, and kernel-only bits are clearly marked in the /kernel/ source code instead of just the userspace source. Summary: - Clean up open-coded swap() calls. - A little bit of #ifdef golf to complete the reunification of the kernel and userspace libxfs source code" * tag 'xfs-5.16-merge-5' of git://git.kernel.org/pub/scm/fs/xfs/xfs-linux: xfs: sync xfs_btree_split macros with userspace libxfs xfs: #ifdef out perag code for userspace xfs: use swap() to make dabtree code cleaner
2021-11-14Merge tag 'for-5.16/parisc-3' of ↵Linus Torvalds5-6/+14
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull more parisc fixes from Helge Deller: "Fix a build error in stracktrace.c, fix resolving of addresses to function names in backtraces, fix single-stepping in assembly code and flush userspace pte's when using set_pte_at()" * tag 'for-5.16/parisc-3' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc/entry: fix trace test in syscall exit path parisc: Flush kernel data mapping in set_pte_at() when installing pte for user page parisc: Fix implicit declaration of function '__kernel_text_address' parisc: Fix backtrace to always include init funtion names
2021-11-14Merge tag 'sh-for-5.16' of git://git.libc.org/linux-shLinus Torvalds21-180/+78
Pull arch/sh updates from Rich Felker. * tag 'sh-for-5.16' of git://git.libc.org/linux-sh: sh: pgtable-3level: Fix cast to pointer from integer of different size sh: fix READ/WRITE redefinition warnings sh: define __BIG_ENDIAN for math-emu sh: math-emu: drop unused functions sh: fix kconfig unmet dependency warning for FRAME_POINTER sh: Cleanup about SPARSE_IRQ sh: kdump: add some attribute to function maple: fix wrong return value of maple_bus_init(). sh: boot: avoid unneeded rebuilds under arch/sh/boot/compressed/ sh: boot: add intermediate vmlinux.bin* to targets instead of extra-y sh: boards: Fix the cacography in irq.c sh: check return code of request_irq sh: fix trivial misannotations
2021-11-14Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-armLinus Torvalds2-13/+13
Pull ARM fixes from Russell King: - Fix early_iounmap - Drop cc-option fallbacks for architecture selection * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9156/1: drop cc-option fallbacks for architecture selection ARM: 9155/1: fix early early_iounmap()
2021-11-14Merge tag 'devicetree-fixes-for-5.16-1' of ↵Linus Torvalds107-277/+277
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Two fixes due to DT node name changes on Arm, Ltd. boards - Treewide rename of Ingenic CGU headers - Update ST email addresses - Remove Netlogic DT bindings - Dropping few more cases of redundant 'maxItems' in schemas - Convert toshiba,tc358767 bridge binding to schema * tag 'devicetree-fixes-for-5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: watchdog: sunxi: fix error in schema bindings: media: venus: Drop redundant maxItems for power-domain-names dt-bindings: Remove Netlogic bindings clk: versatile: clk-icst: Ensure clock names are unique of: Support using 'mask' in making device bus id dt-bindings: treewide: Update @st.com email address to @foss.st.com dt-bindings: media: Update maintainers for st,stm32-hwspinlock.yaml dt-bindings: media: Update maintainers for st,stm32-cec.yaml dt-bindings: mfd: timers: Update maintainers for st,stm32-timers dt-bindings: timer: Update maintainers for st,stm32-timer dt-bindings: i2c: imx: hardware do not restrict clock-frequency to only 100 and 400 kHz dt-bindings: display: bridge: Convert toshiba,tc358767.txt to yaml dt-bindings: Rename Ingenic CGU headers to ingenic,*.h
2021-11-14Merge tag 'timers-urgent-2021-11-14' of ↵Linus Torvalds3-2/+20
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull timer fix from Thomas Gleixner: "A single fix for POSIX CPU timers to address a problem where POSIX CPU timer delivery stops working for a new child task because copy_process() copies state information which is only valid for the parent task" * tag 'timers-urgent-2021-11-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: posix-cpu-timers: Clear task::posix_cputimers_work in copy_process()
2021-11-14Merge tag 'irq-urgent-2021-11-14' of ↵Linus Torvalds8-28/+60
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A set of fixes for the interrupt subsystem Core code: - A regression fix for the Open Firmware interrupt mapping code where a interrupt controller property in a node caused a map property in the same node to be ignored. Interrupt chip drivers: - Workaround a limitation in SiFive PLIC interrupt chip which silently ignores an EOI when the interrupt line is masked. - Provide the missing mask/unmask implementation for the CSKY MP interrupt controller. PCI/MSI: - Prevent a use after free when PCI/MSI interrupts are released by destroying the sysfs entries before freeing the memory which is accessed in the sysfs show() function. - Implement a mask quirk for the Nvidia ION AHCI chip which does not advertise masking capability despite implementing it. Even worse the chip comes out of reset with all MSI entries masked, which due to the missing masking capability never get unmasked. - Move the check which prevents accessing the MSI[X] masking for XEN back into the low level accessors. The recent consolidation missed that these accessors can be invoked from places which do not have that check which broke XEN. Move them back to he original place instead of sprinkling tons of these checks all over the code" * tag 'irq-urgent-2021-11-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: of/irq: Don't ignore interrupt-controller when interrupt-map failed irqchip/sifive-plic: Fixup EOI failed when masked irqchip/csky-mpintc: Fixup mask/unmask implementation PCI/MSI: Destroy sysfs before freeing entries PCI: Add MSI masking quirk for Nvidia ION AHCI PCI/MSI: Deal with devices lying about their MSI mask capability PCI/MSI: Move non-mask check back into low level accessors
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