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2023-06-14ASoC: rt711: Use maple tree register cacheMark Brown2-3/+3
The rt711 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-14ASoC: rt700: Use maple tree register cacheMark Brown1-1/+1
The rt700 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: add new trigger ordering methodMark Brown7-71/+93
Merge series from Kuninori Morimoto <[email protected]>: This patch-set adds new "trigger" starting/stopping method.
2023-06-13ASoC: add N cpus to M codecs dai link supportMark Brown6-5/+141
Merge series from Bard Liao <[email protected]>: Currently, ASoC supports dailinks with the following mappings: 1 cpu DAI to N codec DAIs N cpu DAIs to N codec DAIs But the mapping between N cpu DAIs and M codec DAIs is not supported. The reason is that we didn't have a mechanism to map cpu and codec DAIs This series suggests a new snd_soc_dai_link_codec_ch_map struct in struct snd_soc_dai_link{} which provides codec DAI to cpu DAI mapping information used to implement N cpu DAIs to M codec DAIs support. And add the codec_ch_maps to SOF SoundWire machine driver.
2023-06-13ASoC: Use maple tree for Cirrus Logic devicesMark Brown10-10/+10
Merge series from Mark Brown <[email protected]>: A lot of the Cirrus Logic devices only support single register read/write operations so they get no benefit from using the rbtree cache over the more modern maple tree cache, convert them to use maple tree.
2023-06-13ASoC: siu: Add MODULE_FIRMWARE macroJuerg Haefliger1-0/+2
The module loads firmware so add a MODULE_FIRMWARE macro to provide that information via modinfo. Signed-off-by: Juerg Haefliger <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: remove old trigger ordering methodKuninori Morimoto3-18/+0
All drivers switch to use generic trigger ordering method. Let's remove old method. Signed-off-by: Kuninori Morimoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: starfive: use use new trigger ordering methodKuninori Morimoto1-1/+1
ASoC is now supporting generic trigger ordering method. This patch switch to use it. Signed-off-by: Kuninori Morimoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: atmel: use use new trigger ordering methodKuninori Morimoto1-1/+1
ASoC is now supporting generic trigger ordering method. This patch switch to use it. Signed-off-by: Kuninori Morimoto <[email protected]> Reviewed-by: Claudiu Beznea <[email protected]> Tested-by: Claudiu Beznea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: amd: use use new trigger ordering methodKuninori Morimoto2-11/+11
ASoC is now supporting generic trigger ordering method. This patch switch to use it. Signed-off-by: Kuninori Morimoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: add new trigger ordering methodKuninori Morimoto3-50/+90
Current ASoC is assuming that trigger starting order is Link -> Component -> DAI as default, and its reverse order for stopping. But some Driver / Card want to reorder it for some reasons. We have such flags, but is unbalance like below. struct snd_soc_component_driver :: start_dma_last struct snd_soc_dai_link :: stop_dma_first We want to have more flexible, and more generic method. This patch adds new snd_soc_trigger_order for start/stop at component / DAI-link. Signed-off-by: Kuninori Morimoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: Intel: sof_sdw: add dai_link_codec_ch_mapBard Liao3-0/+72
The captured data will be combined from each cpu DAI if the dai link has more than one cpu DAIs. We can set channel number indirectly by adding sdw_codec_ch_maps. Signed-off-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: add N cpus to M codecs dai link supportBard Liao3-5/+69
Currently, ASoC supports dailinks with the following mappings: 1 cpu DAI to N codec DAIs N cpu DAIs to N codec DAIs But the mapping between N cpu DAIs and M codec DAIs is not supported. The reason is that we didn't have a mechanism to map cpu and codec DAIs This patch suggests a new snd_soc_dai_link_codec_ch_map struct in struct snd_soc_dai_link{} which provides codec DAI to cpu DAI mapping information used to implement N cpu DAIs to M codec DAIs support. When a dailink contains two or more cpu DAIs, we should set channel number of cpus based on its channel mask. The new struct also provides channel mask information for each codec and we can construct the cpu channel mask by combining all codec channel masks which map to the cpu. The N:M mapping is however restricted to the N <= M case due to physical restrictions on a time-multiplexed bus such as I2S/TDM, AC97, SoundWire and HDaudio. Signed-off-by: Bard Liao <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs35l30: Use maple tree register cacheMark Brown1-1/+1
The cs35l30 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs43130: Use maple tree register cacheMark Brown1-1/+1
The cs43130 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs42l83: Use maple tree register cacheMark Brown1-1/+1
The cs42l83 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs42l73: Use maple tree register cacheMark Brown1-1/+1
The cs42l73 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs42l42: Use maple tree register cacheMark Brown1-1/+1
The cs42l42 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs4234: Use maple tree register cacheMark Brown1-1/+1
The cs4234 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs35l35: Use maple tree register cacheMark Brown1-1/+1
The cs35l35 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs35l34: Use maple tree register cacheMark Brown1-1/+1
The cs35l34 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs35l33: Use maple tree register cacheMark Brown1-1/+1
The cs35l33 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: cs35l32: Use maple tree register cacheMark Brown1-1/+1
The cs35l32 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ASoC: tegra: Fix Master Volume ControlJon Hunter1-0/+3
Commit 3ed2b549b39f ("ALSA: pcm: fix wait_time calculations") corrected the PCM wait_time calculations and in doing so reduced the calculated wait_time. This exposed an issue with the Tegra Master Volume Control (MVC) device where the reduced wait_time caused the MVC to fail. For now fix this by setting the default wait_time for Tegra to be 500ms. Fixes: 3ed2b549b39f ("ALSA: pcm: fix wait_time calculations") Signed-off-by: Jon Hunter <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-13ALSA: emu10k1: actually show some S/PDIF status in /proc for E-MU cardsOswald Buddenhagen1-0/+8
The file is called spdif-in, but we abused it to show only sample rates from various sources. Rectify it as far as possible (the FPGA doesn't give us a lot of information). Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: add support for 12 kHz capture on AudigyOswald Buddenhagen1-2/+13
Fixes a tentative FIXME. Because we can. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: fix timer for E-MU cards at 44.1 kHz word clockOswald Buddenhagen1-2/+18
The timer was presuming a fixed 48 kHz word clock, like the rest of the code. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: timer: minimize open-coded access to hw.resolutionOswald Buddenhagen1-5/+13
Some info-querying code still used hw.resolution directly instead of calling snd_timer_hw_resolution(), thus missing a possible hw.c_resolution callback. This patch rectifies that. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: fix synthesizer pitch for E-MU cards at 44.1 kHzOswald Buddenhagen4-3/+13
This is only a very partial fix - the frequency-dependent envelope & LFO register values aren't adjusted. But I'm not sure they were even correct at 48 kHz to start with, as most of them are precalculated by common code which assumes an EMU8K-specific 44.1 kHz word clock, and it seems somewhat unlikely that the hardware's register interpretation was adjusted to compensate for the different word clock. In any case I'm not going to spend time on fixing that, as this code is unlikely to be actually used by anyone today. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: fix sample rates for E-MU cards at 44.1 kHz word clockOswald Buddenhagen2-57/+56
Now that we know the actual word clock, we can: - Put the resulting rate into the hardware info - At 44.1 kHz word clock shift the rate for the pitch calculations, which presume a 48 kHz word clock Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: query rate of external clock sources on E-MU cardsOswald Buddenhagen3-21/+78
The value isn't used yet; the subsequent commits will do that. This ignores the existence of rates above 48 kHz, which is fine, as the hardware will just switch to the fallback clock source when fed with a rate which is incompatible with the base clock multiplier, which currently is always x1. The sample rate display in /proc spdif-in is adjusted to reflect our understanding of the input rates. This is tested only with an 0404b card without sync card, so there is a lot of room for improvement. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: make available E-MU clock sources card-specificOswald Buddenhagen4-75/+107
The actually available clock sources depend on the available audio input ports and dedicated clock input ports. This includes refactoring the code to be data-driven to remain manageable. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13ALSA: emu10k1: split off E-MU fallback clock from clock sourceOswald Buddenhagen4-27/+72
So far, we set the fallback as a side effect of setting the source. But the fallback makes no sense at all when an internal clock is selected. Defaulting to 48k for S/PDIF & ADAT makes sense, but as that is the global default and we're not changing it automatically any more, it's just fine to leave it entirely to the explicit setting. This changes the name of the pre-existing control to something more appropriate (regardless of the split), so users will need to adjust their mixer settings. Signed-off-by: Oswald Buddenhagen <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-13Merge branch 'topic/midi20' into for-nextTakashi Iwai10-12/+962
As the updated MIDI 2.0 spec has been published freshly, this is a catch up to add the support for new specs, especially UMP v1.1 features, on Linux kernel. The new UMP v1.1 introduced the concept of Function Blocks (FB), which is a kind of superset of USB MIDI 2.0 Group Terminal Blocks (GTB). The patch set adds the support for FB as the primary information source while keeping the parse of GTB as fallback. Also UMP v1.1 supports the groupless messages, the protocol switch, static FBs, and other new fundamental features, and those are supported as well. Link: https://www.midi.org/midi-articles/details-about-midi-2-0-midi-ci-profiles-and-property-exchange Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ASoC: Intel: avs: remove redundant dapm routesMark Brown12-492/+31
Merge series from Brent Lu <[email protected]>: This patch series remove redundant dapm routes declared in multiple machine drivers. These routes will be created by snd_soc_dapm_connect_dai_link_widgets() during soundcard initialization. Following is the kernel log from a KBL chromebook nocturne. dmic: [ 13.773455] avs_dmic avs_dmic: connected DAI link dmic-codec:Capture -> dmic-platform:DMIC Rx [ 13.773460] avs_dmic avs_dmic: connected DAI link dmic-codec:Capture -> dmic-platform:DMIC WoV Rx max98373: [ 14.079536] avs_max98373 avs_max98373.1: connected DAI link avs_max98373.1-platform:ssp0 Tx -> i2c-MX98373:00:Right HiFi Playback [ 14.079545] avs_max98373 avs_max98373.1: connected DAI link i2c-MX98373:00:Right HiFi Capture -> avs_max98373.1-platform:ssp0 Rx [ 14.079550] avs_max98373 avs_max98373.1: connected DAI link avs_max98373.1-platform:ssp0 Tx -> i2c-MX98373:01:Left HiFi Playback [ 14.079554] avs_max98373 avs_max98373.1: connected DAI link i2c-MX98373:01:Left HiFi Capture -> avs_max98373.1-platform:ssp0 Rx hdaudio: [ 14.094818] avs_hdaudio avs_hdaudio.2: connected DAI link hdaudioB0D2-platform:hdaudioB0D2-cpu0 Tx -> hdaudioB0D2:HDMI 0 Playback [ 14.094824] avs_hdaudio avs_hdaudio.2: connected DAI link hdaudioB0D2-platform:hdaudioB0D2-cpu1 Tx -> hdaudioB0D2:HDMI 1 Playback [ 14.094828] avs_hdaudio avs_hdaudio.2: connected DAI link hdaudioB0D2-platform:hdaudioB0D2-cpu2 Tx -> hdaudioB0D2:HDMI 2 Playback
2023-06-12ASoC: mediatek: mt8173: Fix error pathsMark Brown1-6/+7
Merge series from Ricardo Ribalda Delgado <[email protected]>: ASoC: mediatek: mt8173, presented a couple of error paths errors, lets fix them.
2023-06-12ALSA: docs: Update MIDI 2.0 documentation for UMP 1.1 enhancementTakashi Iwai1-6/+33
There have been a few enhancements for the new UMP 1.1 features. Update the documentation accordingly. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: ump: Add info flag bit for static blocksTakashi Iwai3-0/+16
UMP v1.1 spec allows to inform whether the function blocks are static and not dynamically updated. Add a new flag bit to snd_ump_endpoint_info to reflect that attribute, too. The flag is set when a USB MIDI device is still in the old MIDI 2.0 without UMP 1.1 support. Then the driver falls back to GTBs, and they are supposed to be static-only. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: seq: ump: Notify UMP protocol change to sequencerTakashi Iwai3-0/+24
UMP v1.1 supports the protocol switch via a UMP Stream message. When it's received, we need to take care of the midi_version field in the corresponding sequencer client, too. This patch introduces a new ops to notify the protocol change to snd_seq_ump_ops for handling it. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: seq: ump: Notify port changes to system portTakashi Iwai2-0/+4
For allowing applications to track the FB active changes, this patch adds the notification from the system port at each time a FB change is handled and the active flag or re-grouping happens. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: seq: ump: Handle FB info updateTakashi Iwai3-6/+106
This patch implements the handling of the dynamic update of FB info. When the FB info update is received after the initial parsing, it means the dynamic FB info update. We compare the result, and if the actual update is detected, it's notified via a new ops, notify_fb_change, to the sequencer client, and the corresponding sequencer ports are updated accordingly. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: seq: ump: Handle groupless messagesTakashi Iwai4-2/+14
The UMP Utility and Stream messages are "groupless", i.e. an incoming groupless packet should be sent only to the UMP EP port, and the event with the groupless message is sent to UMP EP as is without the group translation per port. Also, the former reserved bit 0 for the client group filter is now used for groupless events. When the bit 0 is set, the groupless events are filtered out and skipped. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: usb-audio: Add midi2_ump_probe optionTakashi Iwai1-4/+10
Add a new option to enable/disable the UMP Endpoint probing. Some firmware seems screwed up when such a new command issued, and this option allows user to suppress it. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: usb-audio: Parse UMP Endpoint and Function Blocks at firstTakashi Iwai1-1/+33
Try to parse the UMP Endpoint and UMP Function Blocks for building the topology at first. Only when those are missing (e.g. on an older USB MIDI 2.0 spec or a unidirectional endpoint), the driver still creates blocks based on USB group terminal block information as fallback. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: ump: Support UMP Endpoint and Function Block parsingTakashi Iwai3-0/+684
This patch adds the basic support for UMP Endpoint and UMP Function Block parsing, which are extended in the new UMP v1.1 spec. The patch provides a new helper function to perform the query of the UMP Endpoint information and builds up the UMP blocks based on UMP Function Block information. For the communication over the UMP Endpoint, it opens the rawmidi device once internally, inquiries the UMP Endpoint and Function Block info by sending new UMP Stream messages, and waits for the response for each query. The new UMP spec allows to update the FB info and change its associated groups or its activeness on the fly, too. For catching it, the UMP core keeps watching the incoming UMP messages, and snd_ump_receive() handles the incoming UMP Stream messages to refresh the FB info. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ALSA: ump: Add more attributes to UMP EP and FB infoTakashi Iwai2-3/+48
Add a few more fields to snd_ump_endpoint_info and snd_ump_block_info that are added in the new v1.1 spec. Those are filled by the UMP Stream messages. The rawmidi protocol version is bumped to 2.0.4 to indicate those updates. Also, update the proc outputs to show the newly introduced fields. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
2023-06-12ASoC: audio-graph-card2-custom-sample.dtsi: remove DT warningKuninori Morimoto1-50/+101
Current audio-graph-card2-custom-sample.dtsi is missing address-cells / size-cells / reg. Thus it get too many DT warnings. This patch solved it. Signed-off-by: Kuninori Morimoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-12ASoC: Switch two more i2c drivers back to use .probe()Uwe Kleine-König2-2/+2
The previous conversion back to .probe() applied in commit 9abcd24002bf ("ASoC: Switch i2c drivers back to use .probe()") was created based on v6.3. Since then two more drivers were added which need to be convert back in the same way before eventually .probe_new() can be dropped from struct i2c_driver. Signed-off-by: Uwe Kleine-König <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-12ASoC: dt-bindings: cirrus,cs35l45: drop unneeded quotesKrzysztof Kozlowski1-5/+5
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Krzysztof Kozlowski <[email protected]> Acked-by: Charles Keepax <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
2023-06-12ASoC: mediatek: mt8173: Fix irq error pathRicardo Ribalda Delgado1-4/+5
After reordering the irq probe, the error path was not properly done. Lets fix it. Reported-by: Dan Carpenter <[email protected]> Cc: [email protected] Fixes: 4cbb264d4e91 ("ASoC: mediatek: mt8173: Enable IRQ when pdata is ready") Signed-off-by: Ricardo Ribalda Delgado <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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