diff options
| author | Mark Brown <[email protected]> | 2023-06-10 14:56:26 +0100 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2023-06-13 12:11:05 +0100 |
| commit | 6b7fed83c9455f64a1509a9e1d512a92edaaf44e (patch) | |
| tree | 0d1d594f94587f52189440178e27091d39db52fa | |
| parent | bb1bd25ad79cf21b8fa4c0eae474307b2d24b268 (diff) | |
ASoC: cs42l42: Use maple tree register cache
The cs42l42 can only support single register read and write operations
so does not benefit from block writes. This means it gets no benefit from
using the rbtree register cache over the maple tree register cache so
convert it to use maple trees instead, it is more modern.
Acked-by: David Rhodes <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
| -rw-r--r-- | sound/soc/codecs/cs42l42.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c index 8aa6af21e52c..a0de0329406a 100644 --- a/sound/soc/codecs/cs42l42.c +++ b/sound/soc/codecs/cs42l42.c @@ -393,7 +393,7 @@ const struct regmap_config cs42l42_regmap = { .max_register = CS42L42_MAX_REGISTER, .reg_defaults = cs42l42_reg_defaults, .num_reg_defaults = ARRAY_SIZE(cs42l42_reg_defaults), - .cache_type = REGCACHE_RBTREE, + .cache_type = REGCACHE_MAPLE, .use_single_read = true, .use_single_write = true, |