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2013-04-04clk: exynos4: Add E4210 prefix to LCD1 clock registersTomasz Figa1-11/+11
This patch adds E4210 prefix to all registers related to LCD1 clock domain, because they are present only on Exynos4210. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Remove SoC-specific registers from save listTomasz Figa1-16/+0
Current clock save list is shared for all Exynos4 SoCs, so it must contain only registers present in all supported SoCs, because accessing unavailable registers might have undefined effect. This patch removes registers specific for particular SoCs from shared save list, as they should be supported by separate SoC-specific lists. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Use SRC_MASK_PERIL{0,1} definitionsTomasz Figa1-11/+19
There are definitions of SRC_MASK_PERIL0 and SRC_MASK_PERIL1 registers, but they are not used for clock definitions. This patch modifies related clock definitions to use defined macros instead of numeric offsets. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Define {E,V}PLL registersTomasz Figa1-4/+12
This patch adds preprocessor definitions of EPLL and VPLL registers and replaces all occurences of offsets of related registers with new definitions. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Add missing mout_sata on Exynos4210Tomasz Figa1-0/+1
This patch adds missing mout_sata that is a parent of div_sata clock. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Add missing CMU_TOP and ISP clocksAndrzej Hajda2-3/+137
The patch adds missing clocks to TOP and ISP clock domains. It also adds clock gates for ISP sub-blocks. Signed-off-by: Andrzej Hajda <[email protected]> Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Add G3D clocksTomasz Figa2-8/+18
This patch adds clocks needed for G3D block present on Exynos 4 SoCs. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Add camera related clock definitionsSylwester Nawrocki2-17/+53
This patch adds several gate and mux clocks related to camera and ISP blocks. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Andrzej Hajda <[email protected]> Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Export mout_core clock of Exynos4210Tomasz Figa1-1/+2
This patch enables clock lookup registration for mout_core clock used in Exynos4210 cpufreq driver. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: samsung: Remove unimplemented ops for pllTomasz Figa1-80/+0
Unimplemented clock operations should be simply omitted instead of returning error values. This patch removes unimplemented PLL operations to fix problems caused by returning error code in round_rate callback. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Export clocks used by exynos cpufreq driversLukasz Majewski2-3/+7
This patch exports clocks used by Exynos cpufreq drivers to allow lookup using device tree. (Support to cpufreq drivers will be added in further patches.) Signed-off-by: Lukasz Majewski <[email protected]> Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Move dac and mixer to Exynos4210-specific clocksTomasz Figa1-2/+2
The sclk_dac and sclk_mixer clocks are not present on Exynos4x12. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Export sclk_pcm0Tomasz Figa2-2/+3
This clock is used by PCM interface 0. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Add missing sclk_audio0 clockTomasz Figa1-0/+2
This clock is a parent of mout_spdif and sclk_pcm0. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Add missing mout_mipihsi clockTomasz Figa1-0/+1
This patch adds missing output of mux MIPIHSI which is needed for div_mipihsi clock. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Use mout_mpll_user_* on Exynos4x12Tomasz Figa2-61/+113
Many clock muxes of Exynos 4x12 uses mout_mpll_user_* clocks instead of sclk_mpll as one of their parents. This patch moves such clocks from common array into SoC-specific arrays and adjusts their parent lists respectively. Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-04-04clk: exynos4: Correct sclk_mfc clock definitionSylwester Nawrocki2-3/+3
This clock must be exported to allow lookup using device tree. Signed-off-by: Sylwester Nawrocki <[email protected]> Signed-off-by: Tomasz Figa <[email protected]> Signed-off-by: Kyungmin Park <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-28clk: samsung: add infrastructure to add separate aliasesHeiko Stuebner2-0/+54
The current code adds aliases, if necessary, directly when adding the clock, limiting the number of possible aliases to one. Some platforms need more than one alias, like the hsmmc pclocks on s3c2416 which need a "hsmmc" and "mmc_busclk.0" alias for the s3c- sdhci driver. Therefore add the possibility to separately add clock aliases for previously created clocks. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-28clk: samsung: always allocate the clk_tableHeiko Stuebner1-4/+4
This is needed to allow looking up previous created clocks when adding separate aliases to them. Signed-off-by: Heiko Stuebner <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-28clk: samsung: fix pm init on non-dt platformsHeiko Stueber1-12/+13
The clock_init function checked for a dt node, returning immediately for non-dt machines. This let to the suspend init never being reached on those non-DT machines. So fix this by moving the pm init code above the check. Signed-off-by: Heiko Stueber <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-28clk: samsung: register clk_div_tables for divider clocksHeiko Stuebner2-7/+20
On some Samsung platforms divider clocks only use specific divider combinations like the armdiv on s3c2443 and s3c2416. For these usecases the generic divider clock already provides the option of providing a lookup table mapping register values to divider values. Therefore add a new field to samsung_div_clock and if filled with a table, use clk_register_divider_table instead of clk_register_divider to register a divider clock Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: dts: add board specific fixed rate clock nodes for Exynos based platformsThomas Abraham10-0/+100
The clock frequency of xxti and xusbxti clocks is dependent on the frequency of the on-board oscillator that is used to generate these clocks. So allow the frequency of these clocks to be specfied from device tree. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: dts: add clock provider information for all controllers in Exynos5440 SoCThomas Abraham1-0/+18
For all supported peripheral controllers on Exynos5440, add clock lookup information. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: dts: add clock provider information for all controllers in Exynos5250 SoCThomas Abraham1-0/+72
For all supported peripheral controllers on Exynos5250, add clock lookup information. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: dts: add clock provider information for all controllers in Exynos4 SoCsThomas Abraham3-0/+54
For all supported peripheral controllers on Exynos4 SoCs, add clock lookup information. Reviewed-by: Sylwester Nawrocki <[email protected]> Tested-by: Sylwester Nawrocki <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Tested-by: Tomasz Figa <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: dts: add Exynos4 and Exynos5 clock controller nodesThomas Abraham4-0/+24
Add clock controller nodes for EXYNOS4210, EXYNOS4x12, EXYNOS5250 and EXYNOS5440 SoCs. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clocksource: mct: add support for mct clock setupThomas Abraham1-1/+6
Add support for mct clock lookup and setup to ensure that the mct clock is has been turned on. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clocksource: mct: use fin_pll clock as the tick clock source for mctThomas Abraham1-3/+6
With the migration of Exynos4 clocks to use common clock framework, the old styled 'xtal' clock is not used anymore. Instead, the clock 'fin_pll' is used as the tick clock for mct controller. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: EXYNOS: remove auxdata table from exynos4/5 dt machine fileThomas Abraham2-234/+3
With support for device tree based clock lookup now available, remove the auxdata table from exynos4/5 dt-enabled machine file. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: EXYNOS: allow legacy board support to specify xxti and xusbxti clock speedThomas Abraham6-0/+12
The clock speed of xxti and xusbxti clocks depends on the oscillator used on the board to generate these clocks. For non-dt platforms, allow the board support for those platforms to set the clock frequency of xxti and xusbxti clocks. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: EXYNOS: Initialize the clocks prior to timer initializationThomas Abraham8-9/+25
Since the clock initialization should be completed prior to the mct timer initialization, create a new function 'exynos_init_time' that first sets up the clock and then invokes the timer initialization function. The 'init_time' callback in the board files are updated to invoke this new wrapper function. Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25ARM: EXYNOS: Migrate clock support to common clock frameworkThomas Abraham19-3835/+10
Remove Samsung specific clock support in Exynos4/5 and migrate to use common clock framework. Reviewed-by: Sylwester Nawrocki <[email protected]> Tested-by: Sylwester Nawrocki <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Tested-by: Tomasz Figa <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clk: exynos5440: register clocks using common clock frameworkThomas Abraham3-0/+201
The Exynos5440 clocks are statically listed and registered using the Samsung specific common clock helper functions. Signed-off-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clk: exynos5250: register clocks using common clock frameworkThomas Abraham3-0/+686
The Exynos5250 clocks are statically listed and registered using the Samsung specific common clock helper functions. Both device tree based clock lookup and clkdev based clock lookups are supported. Signed-off-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clk: exynos4: register clocks using common clock frameworkThomas Abraham3-0/+1059
The Exynos4 clocks are statically listed and registered using the Samsung specific common clock helper functions. Both device tree based clock lookup and clkdev based clock lookups are supported. Reviewed-by: Sylwester Nawrocki <[email protected]> Tested-by: Sylwester Nawrocki <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Tested-by: Tomasz Figa <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clk: samsung: add pll clock registration helper functionsThomas Abraham3-1/+541
There are several types of pll clocks used in Samsung SoC's and these pll clocks can be represented as Samsung specific pll clock types and registered with the common clock framework. Add support for pll35xx, pll36xx, pll45xx, pll46xx and pll2550x clock types and helper functions to register them. Reviewed-by: Sylwester Nawrocki <[email protected]> Tested-by: Sylwester Nawrocki <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Tested-by: Tomasz Figa <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-25clk: samsung: add common clock framework helper functions for Samsung platformsThomas Abraham4-0/+541
All Samsung platforms include different types of clock including fixed-rate, mux, divider and gate clock types. There are typically hundreds of such clocks on each of the Samsung platforms. To enable Samsung platforms to register these clocks using the common clock framework, a bunch of utility functions are introduced here which simplify the clock registration process. The clocks are usually statically instantiated and registered with common clock framework. Reviewed-by: Sylwester Nawrocki <[email protected]> Tested-by: Sylwester Nawrocki <[email protected]> Reviewed-by: Tomasz Figa <[email protected]> Tested-by: Tomasz Figa <[email protected]> Tested-by: Heiko Stuebner <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Acked-by: Mike Turquette <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09Merge branch 'next/mct-exynos' into next/clk-exynosKukjin Kim23-149/+309
Conflicts: arch/arm/mach-exynos/mach-exynos4-dt.c
2013-03-09Merge branch 'next/timer-samsung' into next/clk-exynosKukjin Kim88-952/+469
2013-03-09ARM: EXYNOS: move mct driver to drivers/clocksourceThomas Abraham6-9/+7
Move the multi core timer (mct) driver to from mach-exynos to drivers/clocksource and update the Kconfig and makefiles. Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Reviewed-by: Stephen Warren <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5Thomas Abraham2-6/+0
With device tree support enabled for MCT controller, the staticio-remapping of the MCT controller address space is removed for Exynos5 platforms (which supports only device tree based boot). Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Reviewed-by: Stephen Warren <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09ARM: dts: add mct device tree node for all supported Exynos SoC'sThomas Abraham4-0/+90
Add MCT device tree node for Exynos4210, Exynos4212, Exynos4412 and Exynos5250. Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Reviewed-by: Stephen Warren <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09ARM: EXYNOS: allow dt based discovery of mct controller using ↵Thomas Abraham10-16/+18
clocksource_of_init Add entries to __clksrc_of_table so that Exynos MCT controller is discoverable using call to clocksource_of_init. With this change, it would be appropriate to rename the function 'exynos4_timer_init' as 'mct_init' since it aptly describes this function. Additionally, the 'init_time' callback of all machine descriptors for exynos platforms that were previously set to 'exynos4_timer_init' are now set to either 'mct_init' or 'clocksource_of_init'. Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Reviewed-by: Stephen Warren <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09ARM: EXYNOS: add device tree support for MCT controller driverThomas Abraham3-18/+105
Allow the MCT controller base address and interrupts to be obtained from device tree and remove unused static definitions of these. The non-dt support for Exynos5250 is removed but retained for Exynos4210 based platforms. Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Reviewed-by: Stephen Warren <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09ARM: EXYNOS: prepare an array of MCT interrupt numbers and use itThomas Abraham1-21/+36
Instead of using soc_is_xxx macro at more than one place in the MCT controller driver to decide the MCT interrpt number to be setup, populate a table of known MCT global and local timer interrupts and use the values in table to setup the MCT interrupts. This also helps in adding device tree support for MCT controller driver by allowing the driver to retrieve interrupt numbers from device tree and populating them into this table, thereby supporting both legacy and dt functionality to co-exist. Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-09ARM: EXYNOS: add a register base address variable in mct controller driverThomas Abraham2-88/+62
All the MCT register read/writes use a fixed remapped address S5P_VA_SYSTIMER. With device tree support for MCT controller, it is possible to remove the static remap of the MCT controller address space and do the remap during the initialization of the MCT controller with the physical address obtained from the device tree. So in preparation of adding device tree support for MCT controller, add a new register base address variable that will hold the remapped MCT controller base address and convert all MCT register read/writes to use this new variable as the base address instead of the fixed S5P_VA_SYSTIMER. While at it, the MCT register offset and bit mask definitions are moved into the MCT controller driver file since there are no other consumers of these definitions. Cc: Changhwan Youn <[email protected]> Signed-off-by: Thomas Abraham <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-07ARM: dts: Add max77686 device tree support for CROS5250Abhilash Kesavan1-0/+138
The exynos5250 based chromebooks have a max77686 pmic on i2c channel 0. Add support for the pmic in the common cros5250 dts file. Tested after enabling cpufreq support for exynos5250 SoC and varying the arm frequency/voltage using the userspace governer. Signed-off-by: Abhilash Kesavan <[email protected]> Acked-by: Doug Anderson <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-07ARM: dts: Add sdhci node for exynos4412-smdk4412Sachin Kamat1-0/+7
Signed-off-by: Sachin Kamat <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-07ARM: dts: Set up power domain for MFC and G-scaler for exynos5250Prasanna Kumar2-0/+17
This patch adds device tree nodes for MFC and G-scaler power domains of exynos5250.It binds these power-domain nodes to repsective device tree nodes It also adds support to enable PM generic domains for exynos5250. Signed-off-by: Prasanna Kumar <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
2013-03-07ARM: dts: Enabling ohci-exynos driver for EXYNOS5250Vivek Gautam2-0/+21
Adding OHCI device tree node for Exynos5250 along with the device base address. Signed-off-by: Vivek Gautam <[email protected]> Acked-by: Jingoo Han <[email protected]> Acked-by: Grant Likely <[email protected]> Signed-off-by: Kukjin Kim <[email protected]>
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