diff options
| author | Tomasz Figa <[email protected]> | 2013-04-04 13:33:08 +0900 |
|---|---|---|
| committer | Kukjin Kim <[email protected]> | 2013-04-04 15:51:14 +0900 |
| commit | fba79e32a7dfe467a0803a372afa20ccb51ba294 (patch) | |
| tree | bb4f9b3cf090f2dde5957fd556dc31ebefe776ab | |
| parent | a8b5a39ecbbe5b00554b5025af4464abe12bfcd8 (diff) | |
clk: exynos4: Export mout_core clock of Exynos4210
This patch enables clock lookup registration for mout_core clock used in
Exynos4210 cpufreq driver.
Signed-off-by: Tomasz Figa <[email protected]>
Signed-off-by: Kyungmin Park <[email protected]>
Reviewed-by: Thomas Abraham <[email protected]>
Acked-by: Mike Turquette <[email protected]>
Signed-off-by: Kukjin Kim <[email protected]>
| -rw-r--r-- | drivers/clk/samsung/clk-exynos4.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index 5592a78b2edc..f81888dfc5c7 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -311,7 +311,8 @@ struct samsung_mux_clock exynos4210_mux_clks[] __initdata = { MUX(none, "mout_fimd1", group1_p4210, SRC_LCD1, 0, 4), MUX(none, "mout_mipi1", group1_p4210, SRC_LCD1, 12, 4), MUX_A(sclk_mpll, "sclk_mpll", mout_mpll_p, SRC_CPU, 8, 1, "sclk_mpll"), - MUX(none, "mout_core", mout_core_p4210, SRC_CPU, 16, 1), + MUX_A(mout_core, "mout_core", mout_core_p4210, + SRC_CPU, 16, 1, "mout_core"), MUX_A(sclk_vpll, "sclk_vpll", sclk_vpll_p4210, SRC_TOP0, 8, 1, "sclk_vpll"), MUX(none, "mout_fimc0", group1_p4210, SRC_CAM, 0, 4), |