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On the LS1028A the FlexSPI clock is connected to the first HWA output,
see Figure 7 "Clock subsystem block diagram".
Fixes: c77fae5ba09a ("arm64: dts: ls1028a: Add FlexSPI support")
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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On the LS1028A the ENETC reference clock is connected to 4th HWA output,
see Figure 7 "Clock subsystem block diagram".
The PHC may run with a wrong frequency. ptp_qoriq_auto_config() will read
the clock speed of the clock given in the device tree. It is likely that,
on the reference board this wasn't noticed because both clocks have the
same frequency. But this must not be always the case. Fix it.
Fixes: 49401003e260 ("arm64: dts: fsl: ls1028a: add ENETC 1588 timer node")
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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While running 'make dtbs_install', the following error occurs:
make[3]: *** No rule to make target 'rootfs/freescale/imx8mm-kontron-n801x-s.dts', needed by '__dtbs_install'.
It should be .dtb, not .dts.
Fixes: 8668d8b2e67f ("arm64: dts: Add the Kontron i.MX8M Mini SoMs and baseboards")
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Nathan Chancellor <[email protected]>
Reviewed-by: Frieder Schrempf <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add IR support on i.MX8MN EVK board.
Signed-off-by: Joakim Zhang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add IR support on i.MX8MM EVK board.
Signed-off-by: Joakim Zhang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add linux,autosuspend-period property for IR, details please refer to:
commit ff1c9223b7b8 ("media: rc: gpio-ir-recv: add QoS support for cpuidle system")
Signed-off-by: Joakim Zhang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add CAN device node and pinctrl on i.MX8MP evk board.
Signed-off-by: Joakim Zhang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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There are two spdif IP on imx8mq, spdif1 is for normal
spdif device, spdif2 is for HDMI ARC interface.
Enable these spdif sound card in this patch.
Signed-off-by: Shengjiu Wang <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Configure clock rate for audio plls. audio pll1 is used
as parent clock for clocks that is multiple of 8kHz.
audio pll2 is used as parent clock for clocks that is
multiple of 11kHz.
Signed-off-by: Shengjiu Wang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add PCIe EP node for ls1088a to support EP mode.
Signed-off-by: Xiaowei Bao <[email protected]>
Signed-off-by: Hou Zhiqiang <[email protected]>
Reviewed-by: Andrew Murray <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Annotate the EMDIO1 node and describe the 2 AQR107 PHYs found on the
LX2160ARDB board. Also, add the necessary phy-handles for DPMACs 3 and 4
to their associated PHY.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add PCS MDIO nodes for the internal MDIO buses on the LX2160A, along
with their internal PCS PHYs, which will be used when the DPMAC is
in TYPE_PHY mode.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add PCS MDIO nodes for the internal MDIO buses on the LS208x SoCs, along
with their internal PCS PHYs which will be used when the DPMAC object is
in TYPE_PHY mode.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Annotate the EMDIO2 node and describe the other 4 10GBASER PHYs found on
the LS2088ARDB board. Also, add phy-handles for DPMACs 5-8 to their
associated PHY.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Annotate the EMDIO1 node and describe the 4 10GBASER PHYs found on the
LS2088ARDB board. Also, add phy-handles for DPMACs 1-4 to their
associated PHY.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the external MDIO device nodes found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Annotate the external MDIO2 node and describe the 10GBASER PHY found on
the LS1088ARDB board and add a phy-handle for DPMAC2 to link it.
Also, add the internal PCS MDIO node for the internal MDIO buses found
on the LS1088A SoC along with its internal PCS PHY and link the
corresponding DPMAC to the PCS through the pcs-handle.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Annotate the external MDIO1 node and describe the 8 QSGMII PHYs found on
the LS1088ARDB board and add phy-handles for DPMACs 3-10 to its
associated PHY. Also, add the internal PCS MDIO nodes for the internal
MDIO buses found on the LS1088A SoC along with their internal PCS PHY
and link the corresponding DPMAC to the PCS through the pcs-handle.
Also, rename the dpmac@x nodes to ethernet@x in order to be compliant
with the naming convention used by ethernet controllers.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add the external MDIO device nodes found in the WRIOP global memory
region. This is needed for management of external PHYs.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add device tree support for LX2162AQDS board.
LX2162A has same die as of LX2160A with different packaging.
Signed-off-by: Ioana Ciornei <[email protected]>
Signed-off-by: Kuldeep Singh <[email protected]>
Signed-off-by: Meenakshi Aggarwal <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The pinmux subnodes are indented too much. This patch does nothing
more than remove an extra tab. There are no functional changes.
Signed-off-by: Adam Ford <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add device tree for RD-AC3X-48G4X2XL board. This has a Armada 382 SoC on
a interposer board connected to a baseboard with a Prestera AC3X ASIC
connected via PCI.
Signed-off-by: Aryan Srivastava <[email protected]>
Reviewed-by: Chris Packham <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.
Signed-off-by: Serge Semin <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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Tested:
- USB3 Gigabit adapter
- USB2 mass storage
The wiring is the same as the pinebook pro according to the schematics,
thus this patch is heavily based on its dts.
Signed-off-by: Alexis Ballier <[email protected]>
Cc: [email protected]
Cc: Heiko Stuebner <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Rockchip RK3288 and RK3399Pro based VMARC SOM has sdio0 for
connecting WiFi/BT devices as a pluggable card via M.2 E-Key.
Add associated sdio0 nodes, properties.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[moved the unrelated rtc addition to a separate patch]
Signed-off-by: Heiko Stuebner <[email protected]>
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Add the hym8563 rtc found on the rk3288 variant of the VMARC SOM.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[split out of the original patch, as it was a change unrelated
to the commit description]
Signed-off-by: Heiko Stuebner <[email protected]>
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Add support for UHS modes for the SD card connected at sdhci1. This
involves adding regulators for voltage switching and power cycling the
SD card and removing the no-1-8-v property.
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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Add output tap delay values as given in the latest Data Manual[1],
SPRSP36E, revised December 2019.
[1] https://www.ti.com/lit/gpn/tda4vm
Signed-off-by: Faiz Abbas <[email protected]>
Signed-off-by: Sekhar Nori <[email protected]>
Signed-off-by: Nishanth Menon <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
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A test with the command below gives for example this error:
/arch/arm/boot/dts/rv1108-evb.dt.yaml:
wdt@10360000: $nodename:0: 'wdt@10360000'
does not match '^watchdog(@.*|-[0-9a-f])?$'
Fix it by renaming the wdt nodename to watchdog
in the rv1108.dtsi file.
make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml
Signed-off-by: Johan Jonker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Only nodes which have status = "disabled" defined from included files
need status = "okay".
The ethernet-phy node and the i2cmux node do not need it, since they are
wholly defined here.
Signed-off-by: Marek Behún <[email protected]>
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Andreas Färber <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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Use property name `phy-handle` instead of the deprecated `phy` to
connect eth2 to the PHY.
Rename the node from "phy@1" to "ethernet-phy@1", since "phy@1" is
incorrect according to device-tree bindings documentation.
Also remove the "ethernet-phy-id0141.0DD1" compatible string, it is not
needed. Kernel can read the PHY identifier itself.
Signed-off-by: Marek Behún <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Andreas Färber <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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Linux now has incomplete support for the LED controller on Turris Omnia:
it can set brightness and colors for each LED.
The controller can also put these LEDs into HW controlled mode, in which
the LEDs are controlled by HW: for example the WAN LED is connected via
MCU to the WAN PHY LED pin.
The driver does not support these HW controlled modes yet, and on probe
puts the LEDs into SW controlled mode.
Add node describing the LED controller, but disable it for now.
Signed-off-by: Marek Behún <[email protected]>
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Andreas Färber <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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Turris Omnia has an SFP cage that, together with WAN PHY, is connected
to eth2 SerDes via a SerDes multiplexor. When a SFP module is present,
the multiplexor switches the SerDes signal from PHY to SFP.
Describe the SFP cage, but leave it disabled. Until phylink has support
for such configuration, we are leaving it to U-Boot to enable SFP and
disable WAN PHY at boot time depending on whether a SFP module is
present.
Signed-off-by: Marek Behún <[email protected]>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Reviewed-by: Andrew Lunn <[email protected]>
Cc: Russell King - ARM Linux admin <[email protected]>
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Andreas Färber <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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Describe switch interrupt for Turris Omnia so that the CPU does not have
to poll the switch. We also need to to set mpp45 pin to gpio function
for this.
Signed-off-by: Marek Behún <[email protected]>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Andreas Färber <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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The eth2 controller on Turris Omnia is connected to SerDes. For SFP to
be able to switch between 1G and 2.5G modes the comphy link has to be
defined.
Signed-off-by: Marek Behún <[email protected]>
Fixes: f3a6a9f3704a ("ARM: dts: add description for Armada 38x ...")
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Andreas Färber <[email protected]>
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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The buffer manager is available on Turris Omnia but needs to be
described in device-tree to be used.
Signed-off-by: Marek Behún <[email protected]>
Fixes: 26ca8b52d6e1 ("ARM: dts: add support for Turris Omnia")
Cc: [email protected]
Cc: Uwe Kleine-König <[email protected]>
Cc: Jason Cooper <[email protected]>
Cc: Gregory CLEMENT <[email protected]>
Cc: Andreas Färber <[email protected]>
Cc: Andrew Lunn <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: [email protected]
Signed-off-by: Gregory CLEMENT <[email protected]>
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Up-to-date version of V7 schematic is on new URL linked from official
tech-spec webpage http://espressobin.net/tech-spec/
Signed-off-by: Pali Rohár <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
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This adds support for the OMNIA Flex Concentrator product
from Kamstrup A/S. It's providing radio mesh communication
infrastructure for smart electricity meters.
Kamstrup OMNIA is a modular and scalable smart grid platform.
Signed-off-by: Bruno Thomsen <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add Kamstrup OMNIA Flex Concentrator compatibles to the schema
so we can make use of them for the validation.
Signed-off-by: Bruno Thomsen <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Update the calibration table to make the temperature more accurate.
Signed-off-by: Yuantian Tang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The range of dcfg reg is wrong, which overlap with other device,
such as rcpm. This issue causing rcpm driver failed to claim
reg resource when calling devm_ioremap_resource().
Signed-off-by: Ran Wang <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The data of property 'fsl,rcpm-wakeup' is not corrcet, which causing
RCPM driver incorrectly program register IPPDEXPCR1, then flextimer is
wrongly clock gated during system suspend, can't send interrupt to
wake.
Signed-off-by: Ran Wang <[email protected]>
Acked-by: Li Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Adds Foxconn Industrial Internet, who have submitted a BMC device tree.
Signed-off-by: Joel Stanley <[email protected]>
Reviewed-by: Benjamin Fair <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joel Stanley <[email protected]>
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Engicam PX30 carrier boards like EDIMM2.2 and C.TOUCH2.0 have
an onboard Sterling-LWD Wifi/BT chip based on BCM43430 connected
on the UART bus.
UART bus on the design routed via USB to UART CP20x bridge. This
bridge powered from 3V3 regualtor gpio.
This patch adds BT enablement nodes for these respective boards.
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Suniel Mahesh <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Engicam PX30 carrier boards like EDIMM2.2 and C.TOUCH2.0 have
an onboard Sterling-LWD Wifi/BT chip based on BCM43430 connected
on the SDIO bus.
The SDIO power sequnce is connacted with exteernal 32KHz oscillator
and it require 3V3 regulator input.
This patch adds WiFi enablement nodes for these respective boards.
Signed-off-by: Michael Trimarchi <[email protected]>
Signed-off-by: Suniel Mahesh <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
Add support for it.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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PX30.Core is an EDIMM SOM based on Rockchip PX30 from Engicam.
C.TOUCH 2.0 is a general purpose carrier board with capacitive
touch interface support.
10.1" OF is a capacitive touch 10.1" Open Frame panel solutions.
PX30.Core needs to mount on top of C.TOUCH 2.0 carrier with pluged
10.1" OF for creating complete PX30.Core C.TOUCH 2.0 10.1" Open Frame.
Add bindings for it.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Engicam PX30.Core EDIMM2.2 developement Kit has on board 10" LVDS
panel from yes-optoelectronics.
This patch adds panel enablement nodes on respective dts(i) files.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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Engicam EDIMM2.2 and C.Touch 2.0 Kits support USB Host
and OTG ports.
Add support to enable USB on these kits while mounting
px30-core SOM.
Signed-off-by: Jagan Teki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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A test with the command below gives for example this error:
/arch/arm64/boot/dts/rockchip/rk3399-evb.dt.yaml:
sdhci@fe330000: $nodename:0: 'sdhci@fe330000'
does not match '^mmc(@.*)?$'
Fix it by renaming sdhci to mmc.
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/
mmc/arasan,sdhci.yaml
Signed-off-by: Johan Jonker <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Heiko Stuebner <[email protected]>
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