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Add sleep pinctrl for SDHC2 for suspend usage.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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timing usage
imx93-11x11-evk dts use the strongest driver strength for
default(high-speed), 100MHz(SDR50/DDR50/DDR52) and
200MHz(SDR104/HS200/HS400) timing. To make usdhc working appropriately for
each timing, add X1 drive strength to default timing and X3 drive
strength to 100MHz timing.
Reviewed-by: Haibo Chen <[email protected]>
Signed-off-by: Luke Wang <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add sleep pinctrl settings for EQoS and FEC to save power when suspend.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Update the resource table to avoid conflict because iMX93 ROM use last 4KB
TCM aream. Also correct vdev1vring node name to align with reg.
Fixes: e1da729459e6 ("arm64: dts: imx93: enable CM33 for 11x11 EVK")
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add nvmem properties for eqos to get mac address.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add nvmem property for fec1 to get mac address.
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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1. Config SDHC1 clock 400MHz to support eMMC HS400ES mode
2. The original usdhc2 and usdhc3 root clock is 200MHz. Then WIFI
on usdhc3 at SDR104 mode can work under 200MHz. But if imx93 work
under Low Drive mode, the usdhc3 pad signal is not good under 200MHz,
SDR104 mode can't work stable. Need to downgrade to 133MHz to let
WIFI work stable. To cover all the cases, for Norminal Drive mode,
keep usdhc root at 400MHz, then card(SD/wifi) can work at SDR104 mode
under 200MHz to get the best performance. For Low Drive mode,
bootloader need override usdhc root clock to 266MHz, and the
card(SD/wifi) work at SDR104 mode under 133MHz, can work stable.
Reviewed-by: Sherry Sun <[email protected]>
Signed-off-by: Haibo Chen <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add dma support for lpspi[1..8]
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add dma support for lpi2c[1..8].
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Use FSL_EDMA_RX for dma rx channel bitmask, which is intuitive.
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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to ENETC
PCI devices should have a compatible string based on the vendor and device
IDs. Add these to the Freescale ENETC devices.
Putting the PCI compatible string first as vendor and device ID is more
specific than a compatible without any device specific information.
Signed-off-by: Rob Herring (Arm) <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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PCI devices should use PCI interrupt binding for their interrupts assuming
they function as standard PCI interrupts. The embedded PCI devices in the
LS1028a are mapping the interrupts directly to the host interrupt
controller. While that works here, it is unusual.
Based on the reference manual, there is not any INTC or INTD to map, so
only INTA and INTB are mapped.
Signed-off-by: Rob Herring (Arm) <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add cm40_i2c, wm8960 and sai[0,1,4,5] for imx8qxp-mek (SCH-38813).
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Configure both CSI2 clock-frequency and assigned-clock-rates
the same way. There does not seem to be any reason for keeping
the two CSI2 pixel clock set to different frequencies.
This also reduces first CSI2 clock from overdrive mode
frequency which is 500 MHz down below the regular mode
frequency of 400 MHz.
Reviewed-by: Alexander Stein <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Ahmad Fatoum <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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On the Dahlia and Development carrier boards for the Verdin family
(iMX8MM and iMX8MP), WM8904 and NAU8822 codecs are used. Instead of
module-specific names, switch to more generic names based on the codec
employed on the carrier board itself.
This modification facilitates access to ALSA card names, ensuring
consistency across iMX8MP and iMX8MM, as they share the same carrier
board.
Signed-off-by: Hiago De Franco <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Enable HDMI nodes and add the output connector.
Signed-off-by: Alexander Stein <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add crypto node in device tree for:
- CAAM job-ring
Signed-off-by: Varun Sethi <[email protected]>
Signed-off-by: Pankaj Gupta <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add i2c{1,6} sda-/scl-gpios with the corresponding pinmux entries.
Signed-off-by: Ian Ray <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Adjust i2c drive strength based on latest Avnet BSP.
Signed-off-by: Ian Ray <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per nxp,imx8-jpeg.yaml, the clock-names entry is not valid.
Remove them.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Mirela Rabulea <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Previously, we had the sleep-moci pin set to always on. However, the
Dahlia carrier board supports disabling the sleep-moci when the system
is suspended to power down peripherals that support it. This reduces
overall power consumption. This commit adds support for this feature by
disabling the reg_force_sleep_moci regulator and adding two new
regulators for the USB hub and PCIe that can be turned off when the
system is suspended.
Signed-off-by: Stefan Eichenberger <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Verdin family has a signal called sleep-moci which can be used to
turn off peripherals on the carrier board when the SoM goes into
suspend. So far we have hogged this signal, which means the peripherals
are always on and it is not possible to add peripherals that depend on
the sleep-moci to be on. With this change, we replace the hog with a
regulator so that peripherals can add their own regulators that use the
same gpio. Carrier boards that allow peripherals to be powered off in
suspend can disable this regulator and implement their own regulator to
control the sleep-moci.
Signed-off-by: Stefan Eichenberger <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Previously, we had the sleep-moci pin set to always on. However, the
Dahlia carrier board supports disabling the sleep-moci when the system
is suspended to power down peripherals that support it. This reduces
overall power consumption. This commit adds support for this feature by
disabling the reg_force_sleep_moci regulator and adding two new
regulators for the USB hub and PCIe that can be turned off when the
system is suspended.
Signed-off-by: Stefan Eichenberger <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Verdin family has a signal called sleep-moci which can be used to
turn off peripherals on the carrier board when the SoM goes into
suspend. So far we have hogged this signal, which means the peripherals
are always on and it is not possible to add peripherals that depend on
the sleep-moci to be on. With this change, we replace the hog with a
regulator so that peripherals can add their own regulators that use the
same gpio. Carrier boards that allow peripherals to be powered off in
suspend can disable this regulator and implement their own regulator to
control the sleep-moci.
Signed-off-by: Stefan Eichenberger <[email protected]>
Reviewed-by: Francesco Dolcini <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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"okay" is the default status, so drop redundant property from the typec
node.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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"okay" is the default status, so drop redundant property from the typec
node.
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per nxp,dwmac-imx.yaml, it is not valid to pass 'phy-supply'.
Remove it to fix the following dt-schema warning:
ethernet@30bf0000: Unevaluated properties are not allowed ('phy-supply' was unexpected)
from schema $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Umang Jain <[email protected]>
Tested-by: Umang Jain <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The I2C2 bus is used for the CSI and DSI connectors only, no devices are
connected to it on neither the Debix Model A nor its IO board. Disable
the bus in the board's .dts and remove its clock frequency settings, as
the value depends solely on the devices conncted to the CSI and DSI
connectors. Display panel or camera sensor overlays will configure and
enable the bus when necessary.
Signed-off-by: Jacopo Mondi <[email protected]>
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
Reviewed-by: Marco Felsch <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per ovti,ov5640.yaml, the OV5640 power supplies are mandatory
properties.
Describe them to fix dt-schema warnings.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per ovti,ov5640.yaml, the OV5640 power supplies are mandatory
properties.
Describe them to fix dt-schema warnings.
As there are two different PMICs used on the imx8mn-evk variants,
describe the DOVDD OV5640 power supply in each board devicetree.
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Currently, there are several ADV7535 dt-schema warnings.
Fx them the same way as in commit efa97aed071e060 ("arm64: dts:
imx8mm-evk: Fix hdmi@3d node").
As there are two different PMICs used on the imx8mn-evk variants,
describe the ADV7535 power supplies in each board devicetree.
Fixes: 5aafda608f73 ("arm64: dts: imx8mn-evk: Add camera support")
Signed-off-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Per nxp,ptn5110.yaml, also pass the fallback "tcpci" compatible
to fix the following dt-schema warning:
usb-typec@50: compatible: ['nxp,ptn5110'] is too short
from schema $id: http://devicetree.org/schemas/usb/nxp,ptn5110.yaml#
Signed-off-by: Fabio Estevam <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The clock-names property is not needed by usb controller node on imx8mm/n.
This will remove it.
Signed-off-by: Xu Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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There are 2 Type-C ports and 2 USB controllers on i.MX93. Enable them.
Signed-off-by: Xu Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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There are 2 USB controllers on i.MX93. Add them.
Acked-by: Alexander Stein <[email protected]>
Tested-by: Alexander Stein <[email protected]> # TQMa9352LA/CA
Signed-off-by: Xu Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Enable 2 USB nodes and add 2 PTN5150 nodes on i.MX8ULP evk board.
Signed-off-by: Xu Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add USB nodes on i.MX8ULP platform which has 2 USB controllers.
Signed-off-by: Xu Yang <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add support for Toradex Colibri iMX8DX SoM and Aster, Evaluation Board v3,
Iris and Iris v2 carrier boards the module can be mated in.
This SoM is a variant of the already supported Colibri iMX8QXP, using an
NXP i.MX8DX SoC instead of i.MX8QXP.
Link: https://www.toradex.com/computer-on-modules/colibri-arm-family/nxp-imx-8x
Signed-off-by: Hiago De Franco <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add DTSI for i.MX8DX processor. According to 'i.MX 8DualX Industrial
Applications Processors Data Sheet', the GPU and shader use a clock of
372MHz. Therefore, this dtsi includes the imx8dxp.dtsi and changes the
clock accordingly.
Signed-off-by: Hiago De Franco <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The devicetree files can be (re-)used in u-boot now, they are imported
on a regular basis (see OF_UPSTREAM option) there. Up until now, it
didn't matter for linux and there was just a combined devicetree
"-var3-ads2" (with ads2 being the carrier board). But if the devicetree
files are now reused in u-boot, we need to have an individual "-var3"
variant, because the bootloader is just using the bare "varN" devicetree
files. Split the "var3" off of the "-var3-ads2" devicetree.
Signed-off-by: Michael Walle <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add lpuart1 and cm40 uart.
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Update cm40 irq number for imx8dxl chip.
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add lpuart device in cm40 subsystem.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Alexander Stein <[email protected]>
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add cm40 subsystem dtsi.
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Dong Aisheng <[email protected]>
Reviewed-by: Alexander Stein <[email protected]>
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Since commit 26c9d152ebf3 ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for arm64
devicetrees:
The compatible property needs to contain the chip's name in addition to
the generic "tcg,tpm_tis-spi".
tpm@1: compatible: ['tcg,tpm_tis-spi'] is too short
from schema $id:
http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#
Fix these schema violations.
Gateworks Venice uses an Atmel ATTPM20P:
https://trac.gateworks.com/wiki/tpm
Cc: Lukas Wunner <[email protected]>
Signed-off-by: Tim Harvey <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The Emcraft Systems NavQ+ kit is a mobile robotics platform
based on NXP i.MX8 MPlus SoC.
The following interfaces and devices are enabled:
- eMMC
- Gigabit Ethernet
- RTC
- SD-Card
- UART console
Signed-off-by: Gilles Talis <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The SoM used on this board does not bring down the pins for the QOS
ethernet and instead offers the 2nd ethernet as a PCI GbE device.
Set the alias as such and add the PCI bus topology for eth1 so that
boot firmware can set the local-mac-address property.
The eth1 device is behind a PCI switch:
# lspci -n
00:00.0 0604: 16c3:abcd (rev 01)
01:00.0 0604: 12d8:2608
02:01.0 0604: 12d8:2608
02:02.0 0604: 12d8:2608
02:03.0 0604: 12d8:2608
02:04.0 0604: 12d8:2608
c0:00.0 0200: 1055:7430 (rev 11)
# lspci -t
-[0000:00]---00.0-[01-ff]----00.0-[02-fe]--+-01.0-[03-41]--
+-02.0-[42-80]--
+-03.0-[81-bf]--
\-04.0-[c0-fe]----00.0
Signed-off-by: Tim Harvey <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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The SoM used on this board does not bring down the pins for the QOS
ethernet and instead offers the 2nd ethernet as a PCI GbE device.
Set the alias as such and add the PCI bus topology for eth1 so that
boot firmware can set the local-mac-address property.
The eth1 device is behind a PCI switch:
# lspci -n
00:00.0 0604: 16c3:abcd (rev 01)
01:00.0 0604: 12d8:b404 (rev 01)
02:01.0 0604: 12d8:b404 (rev 01)
02:02.0 0604: 12d8:b404 (rev 01)
02:03.0 0604: 12d8:b404 (rev 01)
05:00.0 0200: 11ab:4380
# lspci -t
-[0000:00]---00.0-[01-ff]----00.0-[02-05]--+-01.0-[03]--
+-02.0-[04]--
\-03.0-[05]----00.0
Signed-off-by: Tim Harvey <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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Add asrc[0,1], esai0, spdif0, sai[4,5] and related lpcg node for
imx8 audio subsystem.
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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lpcg cell0 should be clock's 'indices' instead of 'index'.
imx_lpcg_of_clk_src_get(struct of_phandle_args *clkspec, void *data)
{
struct clk_hw_onecell_data *hw_data = data;
unsigned int idx = clkspec->args[0] / 4;
....
}
<@sai0_lpcg 1> will be the same as <@sai_lpcg 0>.
Replace 0 with IMX_LPCG_CLK_0 and replace 1 with IMX_LPCG_CLK_4.
It can work at iMX8QXP because IMX_LPCG_CLK_4 is ipg clock, which already
enabled. But for iMX8QM IMX_LPCG_CLK_4 is mclk, which trigger issue.
Fixes: 0a9279e9ae88 ("arm64: dts: imx8qxp: Add audio SAI nodes")
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
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