diff options
| author | Alice Guo <[email protected]> | 2024-04-02 10:41:29 -0400 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2024-04-03 09:43:48 +0800 |
| commit | 651a45f684224b9188de58932bef318bd90a7a21 (patch) | |
| tree | fc805695cb3a05f0edf80ebb9dc8cbb8abbb6346 | |
| parent | 64f86ba290d0c861ce430e9bb4db9eef0bc2315f (diff) | |
arm64: dts: imx8dxl: add lpuart device in cm40 subsystem
Add lpuart device in cm40 subsystem.
Signed-off-by: Alice Guo <[email protected]>
Reviewed-by: Peng Fan <[email protected]>
Reviewed-by: Alexander Stein <[email protected]>
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi index 84d7ae01e5f4..92752c0c5eb5 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-cm40.dtsi @@ -20,6 +20,18 @@ cm40_subsys: bus@34000000 { ranges = <0x34000000 0x0 0x34000000 0x4000000>; interrupt-parent = <&cm40_intmux>; + cm40_lpuart: serial@37220000 { + compatible = "fsl,imx8qxp-lpuart"; + reg = <0x37220000 0x1000>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cm40_uart_lpcg IMX_LPCG_CLK_1>, <&cm40_uart_lpcg IMX_LPCG_CLK_0>; + clock-names = "ipg", "baud"; + assigned-clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + power-domains = <&pd IMX_SC_R_M4_0_UART>; + status = "disabled"; + }; + cm40_i2c: i2c@37230000 { compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x37230000 0x1000>; @@ -53,6 +65,18 @@ cm40_subsys: bus@34000000 { status = "disabled"; }; + cm40_uart_lpcg: clock-controller@37620000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x37620000 0x1000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_M4_0_UART IMX_SC_PM_CLK_PER>, + <&cm40_ipg_clk>; + clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>; + clock-output-names = "cm40_lpcg_uart_clk", + "cm40_lpcg_uart_ipg_clk"; + power-domains = <&pd IMX_SC_R_M4_0_UART>; + }; + cm40_i2c_lpcg: clock-controller@37630000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x37630000 0x1000>; |